/**************************************************
 *
 * I/O definitions for the 7254R SH device.
 *
 * Copyright 2009-2010 IAR Systems AB.
 *
 * $Revision: 2 $
 *
 **************************************************/

#ifndef __IO7254R_H__
#define __IO7254R_H__

#ifdef __IAR_SYSTEMS_ICC__

#pragma language=extended
#pragma system_include

/**************************************************
 *   Compiler definitions
 **************************************************/


 struct st_intc {                                           /* struct INTC      */
    union  {                                                /* ICR0             */
        unsigned short WORD;                                /*  Word Access     */
         struct  {                                          /*  Bit Access      */
            unsigned short NMIL :1;                         /*   NMIL           */
            unsigned short  :6;                             /*   Reserved Bits  */
            unsigned short NMIE :1;                         /*   NMIE           */
            unsigned short  :8;                             /*   Reserved Bits  */
        } BIT;
    } ICR0;
    union  {                                                /* ICR1             */
        unsigned short WORD;                                /*  Word Access     */
         struct  {                                          /*  Bit Access      */
            unsigned short IRQ7S :2;                        /*  IRQ71S & IRQ70S */
            unsigned short IRQ6S :2;                        /*  IRQ61S & IRQ60S */
            unsigned short IRQ5S :2;                        /*  IRQ51S & IRQ50S */
            unsigned short IRQ4S :2;                        /*  IRQ41S & IRQ40S */
            unsigned short IRQ3S :2;                        /*  IRQ31S & IRQ30S */
            unsigned short IRQ2S :2;                        /*  IRQ21S & IRQ20S */
            unsigned short IRQ1S :2;                        /*  IRQ11S & IRQ10S */
            unsigned short IRQ0S :2;                        /*  IRQ01S & IRQ00S */
        } BIT;
    } ICR1;
    unsigned char wk1 [2];                                  /*                  */
    union  {                                                /* IRQRR            */
        unsigned short WORD;                                /*  Word Access     */
         struct  {                                          /*  Bit Access      */
            unsigned short  :8;                             /*   Reserved Bits  */
            unsigned short IRQ7F :1;                        /*   IRQ7F          */
            unsigned short IRQ6F :1;                        /*   IRQ6F          */
            unsigned short IRQ5F :1;                        /*   IRQ5F          */
            unsigned short IRQ4F :1;                        /*   IRQ4F          */
            unsigned short IRQ3F :1;                        /*   IRQ3F          */
            unsigned short IRQ2F :1;                        /*   IRQ2F          */
            unsigned short IRQ1F :1;                        /*   IRQ1F          */
            unsigned short IRQ0F :1;                        /*   IRQ0F          */
        } BIT;
    } IRQRR;
    unsigned char wk2 [4];                                  /*                  */
    union  {                                                /* IBCR             */
        unsigned short WORD;                                /*  Word Access     */
         struct  {                                          /*  Bit Access      */
            unsigned short E15 :1;                          /*   E15            */
            unsigned short E14 :1;                          /*   E14            */
            unsigned short E13 :1;                          /*   E13            */
            unsigned short E12 :1;                          /*   E12            */
            unsigned short E11 :1;                          /*   E11            */
            unsigned short E10 :1;                          /*   E10            */
            unsigned short E9 :1;                           /*   E9             */
            unsigned short E8 :1;                           /*   E8             */
            unsigned short E7 :1;                           /*   E7             */
            unsigned short E6 :1;                           /*   E6             */
            unsigned short E5 :1;                           /*   E5             */
            unsigned short E4 :1;                           /*   E4             */
            unsigned short E3 :1;                           /*   E3             */
            unsigned short E2 :1;                           /*   E2             */
            unsigned short E1 :1;                           /*   E1             */
            unsigned short  :1;                             /*   Reserved Bits  */
        } BIT;
    } IBCR;
    union  {                                                /* IBNR             */
        unsigned short WORD;                                /*  Word Access     */
         struct  {                                          /*  Bit Access      */
            unsigned short BE :2;                           /*   BE[1:0]        */
            unsigned short BOVE :1;                         /*   BOVE           */
            unsigned short  :9;                             /*   Reserved Bits  */
            unsigned short BN :4;                           /*   BN[3:0]        */
        } BIT;
    } IBNR;
    union  {                                                /* SINTR1           */
        unsigned char BYTE;                                 /*  Byte Access     */
         struct  {                                          /*  Bit Access      */
            unsigned char  :7;                              /*   Reserved Bits  */
            unsigned char SINTC :1;                         /*   SINTC          */
        } BIT;
    } SINTR1;
    union  {                                                /* SINTR2           */
        unsigned char BYTE;                                 /*  Byte Access     */
         struct  {                                          /*  Bit Access      */
            unsigned char  :7;                              /*   Reserved Bits  */
            unsigned char SINTC :1;                         /*   SINTC          */
        } BIT;
    } SINTR2;
    union  {                                                /* SINTR3           */
        unsigned char BYTE;                                 /*  Byte Access     */
         struct  {                                          /*  Bit Access      */
            unsigned char  :7;                              /*   Reserved Bits  */
            unsigned char SINTC :1;                         /*   SINTC          */
        } BIT;
    } SINTR3;
    union  {                                                /* SINTR4           */
        unsigned char BYTE;                                 /*  Byte Access     */
         struct  {                                          /*  Bit Access      */
            unsigned char  :7;                              /*   Reserved Bits  */
            unsigned char SINTC :1;                         /*   SINTC          */
        } BIT;
    } SINTR4;
    union  {                                                /* SINTR5           */
        unsigned char BYTE;                                 /*  Byte Access     */
         struct  {                                          /*  Bit Access      */
            unsigned char  :7;                              /*   Reserved Bits  */
            unsigned char SINTC :1;                         /*   SINTC          */
        } BIT;
    } SINTR5;
    union  {                                                /* SINTR6           */
        unsigned char BYTE;                                 /*  Byte Access     */
         struct  {                                          /*  Bit Access      */
            unsigned char  :7;                              /*   Reserved Bits  */
            unsigned char SINTC :1;                         /*   SINTC          */
        } BIT;
    } SINTR6;
    union  {                                                /* SINTR7           */
        unsigned char BYTE;                                 /*  Byte Access     */
         struct  {                                          /*  Bit Access      */
            unsigned char  :7;                              /*   Reserved Bits  */
            unsigned char SINTC :1;                         /*   SINTC          */
        } BIT;
    } SINTR7;
    union  {                                                /* SINTR8           */
        unsigned char BYTE;                                 /*  Byte Access     */
         struct  {                                          /*  Bit Access      */
            unsigned char  :7;                              /*   Reserved Bits  */
            unsigned char SINTC :1;                         /*   SINTC          */
        } BIT;
    } SINTR8;
    union  {                                                /* IPR01            */
        unsigned short WORD;                                /*  Word Access     */
         struct  {                                          /*  Bit Access      */
            unsigned short IPL_IRQ0 :4;                     /*   IRQ0[3:0]      */
            unsigned short IPL_IRQ1 :4;                     /*   IRQ1[3:0]      */
            unsigned short IPL_IRQ2 :4;                     /*   IRQ2[3:0]      */
            unsigned short IPL_IRQ3 :4;                     /*   IRQ3[3:0]      */
        } BIT;
    } IPR01;
    union  {                                                /* IPR02            */
        unsigned short WORD;                                /*  Word Access     */
         struct  {                                          /*  Bit Access      */
            unsigned short IPL_IRQ4 :4;                     /*   IRQ4[3:0]      */
            unsigned short IPL_IRQ5 :4;                     /*   IRQ5[3:0]      */
            unsigned short IPL_IRQ6 :4;                     /*   IRQ6[3:0]      */
            unsigned short IPL_IRQ7 :4;                     /*   IRQ7[3:0]      */
        } BIT;
    } IPR02;
    unsigned char wk3 [12];                                 /*                  */
    union  {                                                /* SINTR9           */
        unsigned char BYTE;                                 /*  Byte Access     */
         struct  {                                          /*  Bit Access      */
            unsigned char  :7;                              /*   Reserved Bits  */
            unsigned char SINTC :1;                         /*   SINTC          */
        } BIT;
    } SINTR9;
    union  {                                                /* SINTR10          */
        unsigned char BYTE;                                 /*  Byte Access     */
         struct  {                                          /*  Bit Access      */
            unsigned char  :7;                              /*   Reserved Bits  */
            unsigned char SINTC :1;                         /*   SINTC          */
        } BIT;
    } SINTR10;
    union  {                                                /* SINTR11          */
        unsigned char BYTE;                                 /*  Byte Access     */
         struct  {                                          /*  Bit Access      */
            unsigned char  :7;                              /*   Reserved Bits  */
            unsigned char SINTC :1;                         /*   SINTC          */
        } BIT;
    } SINTR11;
    union  {                                                /* SINTR12          */
        unsigned char BYTE;                                 /*  Byte Access     */
         struct  {                                          /*  Bit Access      */
            unsigned char  :7;                              /*   Reserved Bits  */
            unsigned char SINTC :1;                         /*   SINTC          */
        } BIT;
    } SINTR12;
    union  {                                                /* SINTR13          */
        unsigned char BYTE;                                 /*  Byte Access     */
         struct  {                                          /*  Bit Access      */
            unsigned char  :7;                              /*   Reserved Bits  */
            unsigned char SINTC :1;                         /*   SINTC          */
        } BIT;
    } SINTR13;
    union  {                                                /* SINTR14          */
        unsigned char BYTE;                                 /*  Byte Access     */
         struct  {                                          /*  Bit Access      */
            unsigned char  :7;                              /*   Reserved Bits  */
            unsigned char SINTC :1;                         /*   SINTC          */
        } BIT;
    } SINTR14;
    union  {                                                /* SINTR15          */
        unsigned char BYTE;                                 /*  Byte Access     */
         struct  {                                          /*  Bit Access      */
            unsigned char  :7;                              /*   Reserved Bits  */
            unsigned char SINTC :1;                         /*   SINTC          */
        } BIT;
    } SINTR15;
    unsigned char wk4 [977];                                /*                  */
    union  {                                                /* IPR03            */
        unsigned short WORD;                                /*  Word Access     */
         struct  {                                          /*  Bit Access      */
            unsigned short IPL_DMAC0 :4;                    /*   DMAC0[3:0]     */
            unsigned short IPL_DMAC1 :4;                    /*   DMAC1[3:0]     */
            unsigned short IPL_DMAC2 :4;                    /*   DMAC2[3:0]     */
            unsigned short IPL_DMAC3 :4;                    /*   DMAC3[3:0]     */
        } BIT;
    } IPR03;
    union  {                                                /* IPR04            */
        unsigned short WORD;                                /*  Word Access     */
         struct  {                                          /*  Bit Access      */
            unsigned short IPL_DMAC4 :4;                    /*   DMAC4[3:0]     */
            unsigned short IPL_DMAC5 :4;                    /*   DMAC5[3:0]     */
            unsigned short IPL_DMAC6 :4;                    /*   DMAC6[3:0]     */
            unsigned short IPL_DMAC7 :4;                    /*   DMAC7[3:0]     */
        } BIT;
    } IPR04;
    union  {                                                /* IPR05            */
        unsigned short WORD;                                /*  Word Access     */
         struct  {                                          /*  Bit Access      */
            unsigned short IPL_CMT0 :4;                     /*   CMT0[3:0]      */
            unsigned short IPL_CMT1 :4;                     /*   CMT1[3:0]      */
            unsigned short  :4;                             /*   Reserved Bits  */
            unsigned short IPL_WDT :4;                      /*   WDT[3:0]       */
        } BIT;
    } IPR05;
    union  {                                                /* IPR06            */
        unsigned short WORD;                                /*  Word Access     */
         struct  {                                          /*  Bit Access      */
            unsigned short IPL_ICIA0_1 :4;                  /*   ICIA0_1[3:0]   */
            unsigned short IPL_ICIA2_3 :4;                  /*   ICIA2_3[3:0]   */
            unsigned short IPL_ICIA4_5 :4;                  /*   ICIA4_5[3:0]   */
            unsigned short IPL_OVIA :4;                     /*   OVIA[3:0]      */
        } BIT;
    } IPR06;
    union  {                                                /* IPR07            */
        unsigned short WORD;                                /*  Word Access     */
         struct  {                                          /*  Bit Access      */
            unsigned short IPL_CMIB0_1 :4;                  /*   CMIB0_1[3:0]   */
            unsigned short IPL_CMIB6_ICIB0 :4;              /* CMIB6_ICIB0[3:0] */
            unsigned short IPL_IMIC00_03 :4;                /*  IMIC00_03[3:0]  */
            unsigned short IPL_OVIC0 :4;                    /*   OVIC0[3:0]     */
        } BIT;
    } IPR07;
    union  {                                                /* IPR08            */
        unsigned short WORD;                                /*  Word Access     */
         struct  {                                          /*  Bit Access      */
            unsigned short IPL_IMIC10_13 :4;                /*  IMIC10_13[3:0]  */
            unsigned short IPL_OVIC1 :4;                    /*   OVIC1[3:0]     */
            unsigned short IPL_IMIC20_23 :4;                /*  IMIC20_23[3:0]  */
            unsigned short IPL_OVIC2 :4;                    /*   OVIC2[3:0]     */
        } BIT;
    } IPR08;
    union  {                                                /* IPR09            */
        unsigned short WORD;                                /*  Word Access     */
         struct  {                                          /*  Bit Access      */
            unsigned short IPL_IMIC30_33 :4;                /*  IMIC30_33[3:0]  */
            unsigned short IPL_OVIC3 :4;                    /*   OVIC3[3:0]     */
            unsigned short IPL_IMIC40_43 :4;                /*  IMIC40_43[3:0]  */
            unsigned short IPL_OVIC4 :4;                    /*   OVIC4[3:0]     */
        } BIT;
    } IPR09;
    union  {                                                /* IPR10            */
        unsigned short WORD;                                /*  Word Access     */
         struct  {                                          /*  Bit Access      */
            unsigned short IPL_CMID00_03 :4;                /*  CMID00_03[3:0]  */
            unsigned short IPL_OVI1D0_2D0 :4;               /*  OVI1D0_2D0[3:0] */
            unsigned short IPL_UDID00_03 :4;                /*  UDID00_03[3:0]  */
            unsigned short IPL_CMID10_13 :4;                /*  CMID10_13[3:0]  */
        } BIT;
    } IPR10;
    union  {                                                /* IPR11            */
        unsigned short WORD;                                /*  Word Access     */
         struct  {                                          /*  Bit Access      */
            unsigned short IPL_OVI1D1_2D1 :4;               /*  OVI1D1_2D1[3:0] */
            unsigned short IPL_UDID10_13 :4;                /*  UDID10_13[3:0]  */
            unsigned short IPL_CMID20_23 :4;                /*  CMID20_23[3:0]  */
            unsigned short IPL_OVI1D2_2D2 :4;               /*  OVI1D2_2D2[3:0] */
        } BIT;
    } IPR11;
    union  {                                                /* IPR12            */
        unsigned short WORD;                                /*  Word Access     */
         struct  {                                          /*  Bit Access      */
            unsigned short IPL_UDID20_23 :4;                /*  UDID20_23[3:0]  */
            unsigned short IPL_CMID30_33 :4;                /*  CMID30_33[3:0]  */
            unsigned short IPL_OVI1D3_2D3 :4;               /*  OVI1D3_2D3[3:0] */
            unsigned short IPL_UDID30_33 :4;                /*  UDID30_33[3:0]  */
        } BIT;
    } IPR12;
    union  {                                                /* IPR13            */
        unsigned short WORD;                                /*  Word Access     */
         struct  {                                          /*  Bit Access      */
            unsigned short IPL_CMID40_43 :4;                /*  CMID40_43[3:0]  */
            unsigned short IPL_OVI1D4_2D4 :4;               /*  OVI1D4_2D4[3:0] */
            unsigned short IPL_UDID40_43 :4;                /*  UDID40_43[3:0]  */
            unsigned short IPL_CMID50_53 :4;                /*  CMID50_53[3:0]  */
        } BIT;
    } IPR13;
    union  {                                                /* IPR14            */
        unsigned short WORD;                                /*  Word Access     */
         struct  {                                          /*  Bit Access      */
            unsigned short IPL_OVI1D5_2D5 :4;               /*  OVI1D5_2D5[3:0] */
            unsigned short IPL_UDID50_53 :4;                /*  UDID50_53[3:0]  */
            unsigned short IPL_CMIE00_03 :4;                /*  CMIE00_03[3:0]  */
            unsigned short IPL_CMIE10_13 :4;                /*  CMIE10_13[3:0]  */
        } BIT;
    } IPR14;
    union  {                                                /* IPR15            */
        unsigned short WORD;                                /*  Word Access     */
         struct  {                                          /*  Bit Access      */
            unsigned short IPL_CMIE20_23 :4;                /*  CMIE20_23[3:0]  */
            unsigned short IPL_CMIE30_33 :4;                /*  CMIE30_33[3:0]  */
            unsigned short IPL_CMIE40_43 :4;                /*  CMIE40_43[3:0]  */
            unsigned short IPL_CMIE50_53 :4;                /*  CMIE50_53[3:0]  */
        } BIT;
    } IPR15;
    union  {                                                /* IPR16            */
        unsigned short WORD;                                /*  Word Access     */
         struct  {                                          /*  Bit Access      */
            unsigned short IPL_ICIF0_3 :4;                  /*   ICIF0_3[3:0]   */
            unsigned short IPL_ICIF4_7 :4;                  /*   ICIF4_7[3:0]   */
            unsigned short IPL_ICIF8_11 :4;                 /*   ICIF8_11[3:0]  */
            unsigned short IPL_ICIF12_15 :4;                /*   ICIF12_15[3:0] */
        } BIT;
    } IPR16;
    union  {                                                /* IPR17            */
        unsigned short WORD;                                /*  Word Access     */
         struct  {                                          /*  Bit Access      */
            unsigned short IPL_ICIF16_19 :4;                /*   ICIF16_19[3:0] */
            unsigned short  :4;                             /*   Reserved Bits  */
            unsigned short  :4;                             /*   Reserved Bits  */
            unsigned short  :4;                             /*   Reserved Bits  */
        } BIT;
    } IPR17;
    union  {                                                /* IPR18            */
        unsigned short WORD;                                /*  Word Access     */
         struct  {                                          /*  Bit Access      */
            unsigned short IPL_OVIF0_3 :4;                  /*   OVIF0_3[3:0]   */
            unsigned short IPL_OVIF4_7 :4;                  /*   OVIF4_7[3:0]   */
            unsigned short IPL_OVIF8_11 :4;                 /*   OVIF8_11[3:0]  */
            unsigned short IPL_OVIF12_15 :4;                /*   OVIF12_15[3:0] */
        } BIT;
    } IPR18;
    union  {                                                /* IPR19            */
        unsigned short WORD;                                /*  Word Access     */
         struct  {                                          /*  Bit Access      */
            unsigned short IPL_OVIF16_19 :4;                /*   OVIF16_19[3:0] */
            unsigned short  :4;                             /*   Reserved Bits  */
            unsigned short  :4;                             /*   Reserved Bits  */
            unsigned short  :4;                             /*   Reserved Bits  */
        } BIT;
    } IPR19;
    union  {                                                /* IPR20            */
        unsigned short WORD;                                /*  Word Access     */
         struct  {                                          /*  Bit Access      */
            unsigned short IPL_CMIG0_3 :4;                  /*   CMIG0_3[3:0]   */
            unsigned short IPL_CMIG4_5 :4;                  /*   CMIG4_5[3:0]   */
            unsigned short IPL_CMIH :4;                     /*   CMIH[3:0]      */
            unsigned short  :4;                             /*   Reserved Bits  */
        } BIT;
    } IPR20;
    union  {                                                /* IPR21            */
        unsigned short WORD;                                /*  Word Access     */
         struct  {                                          /*  Bit Access      */
            unsigned short IPL_DFIJ0_1 :4;                  /*   DFIJ0_1[3:0]   */
            unsigned short IPL_OVIJ0_1 :4;                  /*   OVIJ0_1[3:0]   */
            unsigned short IPL_DOVIJ0_1 :4;                 /*   DOVIJ0_1[3:0]  */
            unsigned short  :4;                             /*   Reserved Bits  */
        } BIT;
    } IPR21;
    union  {                                                /* IPR22            */
        unsigned short WORD;                                /*  Word Access     */
         struct  {                                          /*  Bit Access      */
            unsigned short IPL_ADI0 :4;                     /*   ADI0[3:0]      */
            unsigned short IPL_ADI1 :4;                     /*   ADI1[3:0]      */
            unsigned short IPL_ADID0_3 :4;                  /*   ADID0_3[3:0]   */
            unsigned short IPL_ADID4_7 :4;                  /*   ADID4_7[3:0]   */
        } BIT;
    } IPR22;
    union  {                                                /* IPR23            */
        unsigned short WORD;                                /*  Word Access     */
         struct  {                                          /*  Bit Access      */
            unsigned short IPL_ADID8_11 :4;                 /*   ADID8_11[3:0]  */
            unsigned short IPL_ADID12_15 :4;                /*   ADID12_15[3:0] */
            unsigned short IPL_ADID40 :4;                   /*   ADID40[3:0]    */
            unsigned short IPL_ADID41 :4;                   /*   ADID41[3:0]    */
        } BIT;
    } IPR23;
    union  {                                                /* IPR24            */
        unsigned short WORD;                                /*  Word Access     */
         struct  {                                          /*  Bit Access      */
            unsigned short IPL_ADID42 :4;                   /*   ADID42[3:0]    */
            unsigned short IPL_ADID43 :4;                   /*   ADID43[3:0]    */
            unsigned short IPL_ADID44 :4;                   /*   ADID44[3:0]    */
            unsigned short IPL_ADID45 :4;                   /*   ADID45[3:0]    */
        } BIT;
    } IPR24;
    union  {                                                /* IPR25            */
        unsigned short WORD;                                /*  Word Access     */
         struct  {                                          /*  Bit Access      */
            unsigned short IPL_ADID46 :4;                   /*   ADID46[3:0]    */
            unsigned short IPL_ADID47 :4;                   /*   ADID47[3:0]    */
            unsigned short  :4;                             /*   Reserved Bits  */
            unsigned short  :4;                             /*   Reserved Bits  */
        } BIT;
    } IPR25;
    union  {                                                /* IPR26            */
        unsigned short WORD;                                /*  Word Access     */
         struct  {                                          /*  Bit Access      */
            unsigned short IPL_SCIA :4;                     /*   SCIA[3:0]      */
            unsigned short IPL_SCIB :4;                     /*   SCIB[3:0]      */
            unsigned short IPL_SCIC :4;                     /*   SCIC[3:0]      */
            unsigned short IPL_SCID :4;                     /*   SCID[3:0]      */
        } BIT;
    } IPR26;
    union  {                                                /* IPR27            */
        unsigned short WORD;                                /*  Word Access     */
         struct  {                                          /*  Bit Access      */
            unsigned short IPL_SCIE :4;                     /*   SCIE[3:0]      */
            unsigned short IPL_RSPIA :4;                    /*   RSPIA[3:0]     */
            unsigned short IPL_RSPIB :4;                    /*   RSPIB[3:0]     */
            unsigned short IPL_RSPIC :4;                    /*   RSPIC[3:0]     */
        } BIT;
    } IPR27;
    union  {                                                /* IPR28            */
        unsigned short WORD;                                /*  Word Access     */
         struct  {                                          /*  Bit Access      */
            unsigned short IPL_RCANA :4;                    /*   RCANA[3:0]     */
            unsigned short IPL_RCANB :4;                    /*   RCANB[3:0]     */
            unsigned short IPL_RCANC :4;                    /*   RCANC[3:0]     */
            unsigned short  :4;                             /*   Reserved Bits  */
        } BIT;
    } IPR28;
    union  {                                                /* IPR29            */
        unsigned short WORD;                                /*  Word Access     */
         struct  {                                          /*  Bit Access      */
            unsigned short IPL_A_DMAC :4;                   /*   A_DMAC[3:0]    */
            unsigned short  :4;                             /*   Reserved Bits  */
            unsigned short  :4;                             /*   Reserved Bits  */
            unsigned short  :4;                             /*   Reserved Bits  */
        } BIT;
    } IPR29;
};

 struct st_ubc {                                            /* struct UBC       */
    unsigned long BAR_0;                                    /* BAR_0            */
    unsigned long BAMR_0;                                   /* BAMR_0           */
    unsigned char wk1 [8];                                  /*                  */
    unsigned long BAR_1;                                    /* BAR_1            */
    unsigned long BAMR_1;                                   /* BAMR_1           */
    unsigned char wk2 [8];                                  /*                  */
    unsigned long BAR_2;                                    /* BAR_2            */
    unsigned long BAMR_2;                                   /* BAMR_2           */
    unsigned char wk3 [8];                                  /*                  */
    unsigned long BAR_3;                                    /* BAR_3            */
    unsigned long BAMR_3;                                   /* BAMR_3           */
    unsigned char wk4 [104];                                /*                  */
    union  {                                                /* BBR_0            */
        unsigned short WORD;                                /*  Word Access     */
         struct  {                                          /*  Bit Access      */
            unsigned short  :2;                             /*   Reserved Bits  */
            unsigned short UBID0 :1;                        /*   UBID0          */
            unsigned short  :2;                             /*   Reserved Bits  */
            unsigned short CP0_ :3;                         /*   CP0_ [2:0]     */
            unsigned short CD0_ :2;                         /*   CD0_ [1:0]     */
            unsigned short ID0_ :2;                         /*   ID0_ [1:0]     */
            unsigned short RW0_ :2;                         /*   RW0_ [1:0]     */
            unsigned short SZ0_ :2;                         /*   SZ0_ [1:0]     */
        } BIT;
    } BBR_0;
    unsigned char wk5 [2];                                  /*                  */
    union  {                                                /* BBR_2            */
        unsigned short WORD;                                /*  Word Access     */
         struct  {                                          /*  Bit Access      */
            unsigned short  :2;                             /*   Reserved Bits  */
            unsigned short UBID2 :1;                        /*   UBID2          */
            unsigned short  :2;                             /*   Reserved Bits  */
            unsigned short CP2_ :3;                         /*   CP2_ [2:0]     */
            unsigned short CD2_ :2;                         /*   CD2_ [1:0]     */
            unsigned short ID2_ :2;                         /*   ID2_ [1:0]     */
            unsigned short RW2_ :2;                         /*   RW2_ [1:0]     */
            unsigned short SZ2_ :2;                         /*   SZ2_ [1:0]     */
        } BIT;
    } BBR_2;
    unsigned char wk6 [10];                                 /*                  */
    union  {                                                /* BBR_1            */
        unsigned short WORD;                                /*  Word Access     */
         struct  {                                          /*  Bit Access      */
            unsigned short  :2;                             /*   Reserved Bits  */
            unsigned short UBID1 :1;                        /*   UBID1          */
            unsigned short  :2;                             /*   Reserved Bits  */
            unsigned short CP1_ :3;                         /*   CP1_ [2:0]     */
            unsigned short CD1_ :2;                         /*   CD1_ [1:0]     */
            unsigned short ID1_ :2;                         /*   ID1_ [1:0]     */
            unsigned short RW1_ :2;                         /*   RW1_ [1:0]     */
            unsigned short SZ1_ :2;                         /*   SZ1_ [1:0]     */
        } BIT;
    } BBR_1;
    unsigned char wk7 [2];                                  /*                  */
    union  {                                                /* BBR_3            */
        unsigned short WORD;                                /*  Word Access     */
         struct  {                                          /*  Bit Access      */
            unsigned short  :2;                             /*   Reserved Bits  */
            unsigned short UBID3 :1;                        /*   UBID3          */
            unsigned short  :2;                             /*   Reserved Bits  */
            unsigned short CP3_ :3;                         /*   CP3_ [2:0]     */
            unsigned short CD3_ :2;                         /*   CD3_ [1:0]     */
            unsigned short ID3_ :2;                         /*   ID3_ [1:0]     */
            unsigned short RW3_ :2;                         /*   RW3_ [1:0]     */
            unsigned short SZ3_ :2;                         /*   SZ3_ [1:0]     */
        } BIT;
    } BBR_3;
    unsigned char wk8 [10];                                 /*                  */
    union  {                                                /* BRCR             */
        unsigned long LONG;                                 /*  Long Access     */
         struct  {                                          /*  Bit Access      */
            unsigned char  :8;                              /*   Reserved Bits  */
            unsigned char  :2;                              /*   Reserved Bits  */
            unsigned char UTOD3 :1;                         /*   UTOD3          */
            unsigned char UTOD2 :1;                         /*   UTOD2          */
            unsigned char UTOD1 :1;                         /*   UTOD1          */
            unsigned char UTOD0 :1;                         /*   UTOD0          */
            unsigned char CKS :2;                           /*   CKS[1:0]       */
            unsigned char SCMFC0 :1;                        /*   SCMFC0         */
            unsigned char SCMFC1 :1;                        /*   SCMFC1         */
            unsigned char SCMFC2 :1;                        /*   SCMFC2         */
            unsigned char SCMFC3 :1;                        /*   SCMFC3         */
            unsigned char SCMFD0 :1;                        /*   SCMFD0         */
            unsigned char SCMFD1 :1;                        /*   SCMFD1         */
            unsigned char SCMFD2 :1;                        /*   SCMFD2         */
            unsigned char SCMFD3 :1;                        /*   SCMFD3         */
            unsigned char PCB3 :1;                          /*   PCB3           */
            unsigned char PCB2 :1;                          /*   PCB2           */
            unsigned char PCB1 :1;                          /*   PCB1           */
            unsigned char PCB0 :1;                          /*   PCB0           */
            unsigned char  :4;                              /*   Reserved Bits  */
        } BIT;
    } BRCR;
};

 struct st_bsc {                                            /* struct BSC       */
    union  {                                                /* CS0BCR           */
        unsigned long LONG;                                 /*  Long Access     */
         struct  {                                          /*  Bit Access      */
            unsigned long  :1;                              /*   Reserved Bits  */
            unsigned long IWW :3;                           /*   IWW[2:0]       */
            unsigned long IWRWD :3;                         /*   IWRWD[2:0]     */
            unsigned long IWRWS :3;                         /*   IWRWS[2:0]     */
            unsigned long IWRRD :3;                         /*   IWRRD[2:0]     */
            unsigned long IWRRS :3;                         /*   IWRRS[2:0]     */
            unsigned long  :2;                              /*   Reserved Bits  */
            unsigned long TYPE :2;                          /*   TYPE[1:0]      */
            unsigned long  :1;                              /*   Reserved Bits  */
            unsigned long BSZ :2;                           /*   BSZ[1:0]       */
            unsigned long  :9;                              /*   Reserved Bits  */
        } BIT;
    } CS0BCR;
    union  {                                                /* CS1BCR           */
        unsigned long LONG;                                 /*  Long Access     */
         struct  {                                          /*  Bit Access      */
            unsigned long  :1;                              /*   Reserved Bits  */
            unsigned long IWW :3;                           /*   IWW[2:0]       */
            unsigned long IWRWD :3;                         /*   IWRWD[2:0]     */
            unsigned long IWRWS :3;                         /*   IWRWS[2:0]     */
            unsigned long IWRRD :3;                         /*   IWRRD[2:0]     */
            unsigned long IWRRS :3;                         /*   IWRRS[2:0]     */
            unsigned long  :2;                              /*   Reserved Bits  */
            unsigned long TYPE :2;                          /*   TYPE[1:0]      */
            unsigned long  :1;                              /*   Reserved Bits  */
            unsigned long BSZ :2;                           /*   BSZ[1:0]       */
            unsigned long  :9;                              /*   Reserved Bits  */
        } BIT;
    } CS1BCR;
    union  {                                                /* CS2BCR           */
        unsigned long LONG;                                 /*  Long Access     */
         struct  {                                          /*  Bit Access      */
            unsigned long  :1;                              /*   Reserved Bits  */
            unsigned long IWW :3;                           /*   IWW[2:0]       */
            unsigned long IWRWD :3;                         /*   IWRWD[2:0]     */
            unsigned long IWRWS :3;                         /*   IWRWS[2:0]     */
            unsigned long IWRRD :3;                         /*   IWRRD[2:0]     */
            unsigned long IWRRS :3;                         /*   IWRRS[2:0]     */
            unsigned long  :2;                              /*   Reserved Bits  */
            unsigned long TYPE :2;                          /*   TYPE[1:0]      */
            unsigned long  :1;                              /*   Reserved Bits  */
            unsigned long BSZ :2;                           /*   BSZ[1:0]       */
            unsigned long  :9;                              /*   Reserved Bits  */
        } BIT;
    } CS2BCR;
    union  {                                                /* CS3BCR           */
        unsigned long LONG;                                 /*  Long Access     */
         struct  {                                          /*  Bit Access      */
            unsigned long  :1;                              /*   Reserved Bits  */
            unsigned long IWW :3;                           /*   IWW[2:0]       */
            unsigned long IWRWD :3;                         /*   IWRWD[2:0]     */
            unsigned long IWRWS :3;                         /*   IWRWS[2:0]     */
            unsigned long IWRRD :3;                         /*   IWRRD[2:0]     */
            unsigned long IWRRS :3;                         /*   IWRRS[2:0]     */
            unsigned long  :2;                              /*   Reserved Bits  */
            unsigned long TYPE :2;                          /*   TYPE[1:0]      */
            unsigned long  :1;                              /*   Reserved Bits  */
            unsigned long BSZ :2;                           /*   BSZ[1:0]       */
            unsigned long  :9;                              /*   Reserved Bits  */
        } BIT;
    } CS3BCR;
    unsigned char wk [20];                                  /*                  */
    union  {                                                /* CS0WCR           */
        unsigned long LONG;                                 /*  Long Access     */
         struct  {                                          /*  Bit Access      */
            unsigned long  :11;                             /*   Reserved Bits  */
            unsigned long BAS :1;                           /*   BAS            */
            unsigned long  :1;                              /*   Reserved Bits  */
            unsigned long WW :3;                            /*   WW[2:0]        */
            unsigned long  :3;                              /*   Reserved Bits  */
            unsigned long SW :2;                            /*   SW[1:0]        */
            unsigned long WR :4;                            /*   WR[3:0]        */
            unsigned long WM :1;                            /*   WM             */
            unsigned long  :4;                              /*   Reserved Bits  */
            unsigned long HW :2;                            /*   HW[1:0]        */
        } BIT;
    } CS0WCR;
    union  {                                                /* CS1WCR           */
        unsigned long LONG;                                 /*  Long Access     */
         struct  {                                          /*  Bit Access      */
            unsigned long  :11;                             /*   Reserved Bits  */
            unsigned long BAS :1;                           /*   BAS            */
            unsigned long  :1;                              /*   Reserved Bits  */
            unsigned long WW :3;                            /*   WW[2:0]        */
            unsigned long  :3;                              /*   Reserved Bits  */
            unsigned long SW :2;                            /*   SW[1:0]        */
            unsigned long WR :4;                            /*   WR[3:0]        */
            unsigned long WM :1;                            /*   WM             */
            unsigned long  :4;                              /*   Reserved Bits  */
            unsigned long HW :2;                            /*   HW[1:0]        */
        } BIT;
    } CS1WCR;
    union  {                                                /* CS2WCR           */
        unsigned long LONG;                                 /*  Long Access     */
         struct  {                                          /*  Bit Access      */
            unsigned long  :11;                             /*   Reserved Bits  */
            unsigned long BAS :1;                           /*   BAS            */
            unsigned long  :1;                              /*   Reserved Bits  */
            unsigned long WW :3;                            /*   WW[2:0]        */
            unsigned long  :3;                              /*   Reserved Bits  */
            unsigned long SW :2;                            /*   SW[1:0]        */
            unsigned long WR :4;                            /*   WR[3:0]        */
            unsigned long WM :1;                            /*   WM             */
            unsigned long  :4;                              /*   Reserved Bits  */
            unsigned long HW :2;                            /*   HW[1:0]        */
        } BIT;
    } CS2WCR;
    union  {                                                /* CS3WCR           */
        unsigned long LONG;                                 /*  Long Access     */
         struct  {                                          /*  Bit Access      */
            unsigned long  :11;                             /*   Reserved Bits  */
            unsigned long BAS :1;                           /*   BAS            */
            unsigned long  :1;                              /*   Reserved Bits  */
            unsigned long WW :3;                            /*   WW[2:0]        */
            unsigned long  :3;                              /*   Reserved Bits  */
            unsigned long SW :2;                            /*   SW[1:0]        */
            unsigned long WR :4;                            /*   WR[3:0]        */
            unsigned long WM :1;                            /*   WM             */
            unsigned long  :4;                              /*   Reserved Bits  */
            unsigned long HW :2;                            /*   HW[1:0]        */
        } BIT;
    } CS3WCR;
};

 struct st_dmac {                                           /* struct DMAC      */
    unsigned long SAR;                                      /* SAR              */
    unsigned long DAR;                                      /* DAR              */
    unsigned long DMATCR;                                   /* DMATCR           */
    union  {                                                /* CHCR             */
        unsigned long LONG;                                 /*  Long Access     */
         struct  {                                          /*  Bit Access      */
            unsigned char TC :2;                            /*   TC[1:0]        */
            unsigned char  :1;                              /*   Reserved Bits  */
            unsigned char RLD1 :1;                          /*   RLD1           */
            unsigned char RLD2 :2;                          /*   RLD2[1:0]      */
            unsigned char  :1;                              /*   Reserved Bits  */
            unsigned char IFT :1;                           /*   IFT            */
            unsigned char  :5;                              /*   Reserved Bits  */
            unsigned char HIE :1;                           /*   HIE            */
            unsigned char  :2;                              /*   Reserved Bits  */
            unsigned char DM :2;                            /*   DM[1:0]        */
            unsigned char SM :2;                            /*   SM[1:0]        */
            unsigned char RS :4;                            /*   RS[3:0]        */
            unsigned char  :2;                              /*   Reserved Bits  */
            unsigned char TB :1;                            /*   TB             */
            unsigned char TS :2;                            /*   TS[1:0]        */
            unsigned char IE :1;                            /*   IE             */
            unsigned char  :1;                              /*   Reserved Bits  */
            unsigned char DE :1;                            /*   DE             */
        } BIT;
    } CHCR;
    unsigned char wk1 [124];                                /*                  */
    union  {                                                /* CHFR             */
        unsigned char BYTE;                                 /*  Byte Access     */
         struct  {                                          /*  Bit Access      */
            unsigned char  :3;                              /*   Reserved Bits  */
            unsigned char HE :1;                            /*   HE             */
            unsigned char  :3;                              /*   Reserved Bits  */
            unsigned char TE :1;                            /*   TE             */
        } BIT;
    } CHFR;
    unsigned char wk2 [1];                                  /*                  */
    union  {                                                /*                  */
        unsigned short WORD;                                /*                  */
         struct  {                                          /*                  */
            unsigned short TEMKEY :8;                       /*    TEMKEY        */
            unsigned short  :7;                             /*    Reserved Bits */
            unsigned short TEMASK :1;                       /*    TEMASK        */
        } BIT;
    } TEMSK;
    unsigned char wk3 [112];                                /*                  */
    unsigned long RSAR;                                     /* RSAR             */
    unsigned long RDAR;                                     /* RDAR             */
    unsigned long RDMATCR;                                  /* RDMATCR          */
    unsigned short ARCR;                                    /* ARCR             */
    unsigned short RARCR;                                   /* RARCR            */
};

 struct st_dmaccom {                                        /* DMAC Common      */
    union  {                                                /* DMAOR            */
        unsigned short WORD;                                /*  Word Access     */
         struct  {                                          /*  Bit Access      */
            unsigned char  :2;                              /*   Reserved Bits  */
            unsigned char CMS :2;                           /*   CMS[1:0]       */
            unsigned char  :2;                              /*   Reserved Bits  */
            unsigned char PR :2;                            /*   PR[1:0]        */
            unsigned char  :7;                              /*   Reserved Bits  */
            unsigned char DME :1;                           /*   DME            */
        } BIT;
    } DMAOR;
    unsigned char wk1 [2];                                  /*                  */
    union  {                                                /* DMAFR            */
        unsigned char BYTE;                                 /*  Byte Access     */
         struct  {                                          /*  Bit Access      */
            unsigned char  :3;                              /*   Reserved Bits  */
            unsigned char AE :1;                            /*   AE             */
            unsigned char  :3;                              /*   Reserved Bits  */
            unsigned char NMIF :1;                          /*   NMIF           */
        } BIT;
    } DMAFR;
    unsigned char wk2 [251];                                /*                  */
     struct  {                                              /*                  */
        union  {                                            /* DMARS            */
            unsigned short WORD;                            /* Word Access      */
             struct  {                                      /* Bit Access       */
                unsigned short ODDCHMID :6;                 /* ODD CH MID[5:0]  */
                unsigned short ODDCHRID :2;                 /* ODD CH RID[1:0]  */
                unsigned short EVENCHMID :6;                /* EVEN CH MID[5:0] */
                unsigned short EVENCHRID :2;                /* EVEN CH RID[1:0] */
            } BIT;
        } DMARS;
        unsigned char wk [2];                               /*                  */
    } DMARS0;
     struct  {                                              /*                  */
        union  {                                            /* DMARS            */
            unsigned short WORD;                            /* Word Access      */
             struct  {                                      /* Bit Access       */
                unsigned short ODDCHMID :6;                 /* ODD CH MID[5:0]  */
                unsigned short ODDCHRID :2;                 /* ODD CH RID[1:0]  */
                unsigned short EVENCHMID :6;                /* EVEN CH MID[5:0] */
                unsigned short EVENCHRID :2;                /* EVEN CH RID[1:0] */
            } BIT;
        } DMARS;
        unsigned char wk [2];                               /*                  */
    } DMARS1;
     struct  {                                              /*                  */
        union  {                                            /* DMARS            */
            unsigned short WORD;                            /* Word Access      */
             struct  {                                      /* Bit Access       */
                unsigned short ODDCHMID :6;                 /* ODD CH MID[5:0]  */
                unsigned short ODDCHRID :2;                 /* ODD CH RID[1:0]  */
                unsigned short EVENCHMID :6;                /* EVEN CH MID[5:0] */
                unsigned short EVENCHRID :2;                /* EVEN CH RID[1:0] */
            } BIT;
        } DMARS;
        unsigned char wk [2];                               /*                  */
    } DMARS2;
     struct  {                                              /*                  */
        union  {                                            /* DMARS            */
            unsigned short WORD;                            /* Word Access      */
             struct  {                                      /* Bit Access       */
                unsigned short ODDCHMID :6;                 /* ODD CH MID[5:0]  */
                unsigned short ODDCHRID :2;                 /* ODD CH RID[1:0]  */
                unsigned short EVENCHMID :6;                /* EVEN CH MID[5:0] */
                unsigned short EVENCHRID :2;                /* EVEN CH RID[1:0] */
            } BIT;
        } DMARS;
        unsigned char wk [2];                               /*                  */
    } DMARS3;
};

 struct st_admac {                                          /* struct ADMAC     */
    union  {                                                /* ADMAOR           */
        unsigned char BYTE;                                 /*  Byte Access     */
         struct  {                                          /*  Bit Access      */
            unsigned char  :7;                              /*   Reserved Bits  */
            unsigned char DME :1;                           /*   DME            */
        } BIT;
    } ADMAOR;
    unsigned char wk1 [1];                                  /*                  */
    union  {                                                /* ADMAABR          */
        unsigned char BYTE;                                 /*  Byte Access     */
         struct  {                                          /*  Bit Access      */
            unsigned char  :5;                              /*   Reserved Bits  */
            unsigned char AA :3;                            /*   AA[2:0]        */
        } BIT;
    } ADMAABR;
    unsigned char wk2 [13];                                 /*                  */
    union  {                                                /* ADMAIE0          */
        unsigned char BYTE;                                 /*  Byte Access     */
         struct  {                                          /*  Bit Access      */
            unsigned char Channel7 :1;                      /*   Channel7       */
            unsigned char Channel6 :1;                      /*   Channel6       */
            unsigned char Channel5 :1;                      /*   Channel5       */
            unsigned char Channel4 :1;                      /*   Channel4       */
            unsigned char Channel3 :1;                      /*   Channel3       */
            unsigned char Channel2 :1;                      /*   Channel2       */
            unsigned char  :2;                              /*   Reserved Bits  */
        } BIT;
    } ADMAIE0;
    union  {                                                /* ADMAIE1          */
        unsigned char BYTE;                                 /*  Byte Access     */
         struct  {                                          /*  Bit Access      */
            unsigned char Channel15 :1;                     /*   Channel15      */
            unsigned char Channel14 :1;                     /*   Channel14      */
            unsigned char Channel13 :1;                     /*   Channel13      */
            unsigned char Channel12 :1;                     /*   Channel12      */
            unsigned char Channel11 :1;                     /*   Channel11      */
            unsigned char Channel10 :1;                     /*   Channel10      */
            unsigned char Channel9 :1;                      /*   Channel9       */
            unsigned char Channel8 :1;                      /*   Channel8       */
        } BIT;
    } ADMAIE1;
    union  {                                                /* ADMAIE2          */
        unsigned char BYTE;                                 /*  Byte Access     */
         struct  {                                          /*  Bit Access      */
            unsigned char Channel23 :1;                     /*   Channel23      */
            unsigned char Channel22 :1;                     /*   Channel22      */
            unsigned char Channel21 :1;                     /*   Channel21      */
            unsigned char Channel20 :1;                     /*   Channel20      */
            unsigned char Channel19 :1;                     /*   Channel19      */
            unsigned char Channel18 :1;                     /*   Channel18      */
            unsigned char Channel17 :1;                     /*   Channel17      */
            unsigned char Channel16 :1;                     /*   Channel16      */
        } BIT;
    } ADMAIE2;
    union  {                                                /* ADMAIE3          */
        unsigned char BYTE;                                 /*  Byte Access     */
         struct  {                                          /*  Bit Access      */
            unsigned char Channel31 :1;                     /*   Channel31      */
            unsigned char Channel30 :1;                     /*   Channel30      */
            unsigned char Channel29 :1;                     /*   Channel29      */
            unsigned char Channel28 :1;                     /*   Channel28      */
            unsigned char Channel27 :1;                     /*   Channel27      */
            unsigned char Channel26 :1;                     /*   Channel26      */
            unsigned char Channel25 :1;                     /*   Channel25      */
            unsigned char Channel24 :1;                     /*   Channel24      */
        } BIT;
    } ADMAIE3;
    union  {                                                /* ADMAIE4          */
        unsigned char BYTE;                                 /*  Byte Access     */
         struct  {                                          /*  Bit Access      */
            unsigned char Channel39 :1;                     /*   Channel39      */
            unsigned char Channel38 :1;                     /*   Channel38      */
            unsigned char Channel37 :1;                     /*   Channel37      */
            unsigned char Channel36 :1;                     /*   Channel36      */
            unsigned char Channel35 :1;                     /*   Channel35      */
            unsigned char Channel34 :1;                     /*   Channel34      */
            unsigned char Channel33 :1;                     /*   Channel33      */
            unsigned char Channel32 :1;                     /*   Channel32      */
        } BIT;
    } ADMAIE4;
    union  {                                                /* ADMAIE5          */
        unsigned char BYTE;                                 /*  Byte Access     */
         struct  {                                          /*  Bit Access      */
            unsigned char Channel47 :1;                     /*   Channel47      */
            unsigned char Channel46 :1;                     /*   Channel46      */
            unsigned char Channel45 :1;                     /*   Channel45      */
            unsigned char Channel44 :1;                     /*   Channel44      */
            unsigned char Channel43 :1;                     /*   Channel43      */
            unsigned char Channel42 :1;                     /*   Channel42      */
            unsigned char Channel41 :1;                     /*   Channel41      */
            unsigned char Channel40 :1;                     /*   Channel40      */
        } BIT;
    } ADMAIE5;
    unsigned char wk3 [1];                                  /*                  */
    union  {                                                /* ADMAIE7          */
        unsigned char BYTE;                                 /*  Byte Access     */
         struct  {                                          /*  Bit Access      */
            unsigned char Channel63 :1;                     /*   Channel63      */
            unsigned char Channel62 :1;                     /*   Channel62      */
            unsigned char Channel61 :1;                     /*   Channel61      */
            unsigned char Channel60 :1;                     /*   Channel60      */
            unsigned char Channel59 :1;                     /*   Channel59      */
            unsigned char Channel58 :1;                     /*   Channel58      */
            unsigned char Channel57 :1;                     /*   Channel57      */
            unsigned char Channel56 :1;                     /*   Channel56      */
        } BIT;
    } ADMAIE7;
    union  {                                                /* ADMAIE8          */
        unsigned char BYTE;                                 /*  Byte Access     */
         struct  {                                          /*  Bit Access      */
            unsigned char Channel71 :1;                     /*   Channel71      */
            unsigned char Channel70 :1;                     /*   Channel70      */
            unsigned char Channel69 :1;                     /*   Channel69      */
            unsigned char Channel68 :1;                     /*   Channel68      */
            unsigned char Channel67 :1;                     /*   Channel67      */
            unsigned char Channel66 :1;                     /*   Channel66      */
            unsigned char Channel65 :1;                     /*   Channel65      */
            unsigned char Channel64 :1;                     /*   Channel64      */
        } BIT;
    } ADMAIE8;
    union  {                                                /* ADMAIE9          */
        unsigned char BYTE;                                 /*  Byte Access     */
         struct  {                                          /*  Bit Access      */
            unsigned char  :5;                              /*   Reserved Bits  */
            unsigned char Channel74 :1;                     /*   Channel74      */
            unsigned char  :2;                              /*   Reserved Bits  */
        } BIT;
    } ADMAIE9;
    unsigned char wk4 [6];                                  /*                  */
    union  {                                                /* ADMADV0          */
        unsigned char BYTE;                                 /*  Byte Access     */
         struct  {                                          /*  Bit Access      */
            unsigned char Channel7 :1;                      /*   Channel7       */
            unsigned char Channel6 :1;                      /*   Channel6       */
            unsigned char Channel5 :1;                      /*   Channel5       */
            unsigned char Channel4 :1;                      /*   Channel4       */
            unsigned char Channel3 :1;                      /*   Channel3       */
            unsigned char Channel2 :1;                      /*   Channel2       */
            unsigned char  :2;                              /*   Reserved Bits  */
        } BIT;
    } ADMADV0;
    union  {                                                /* ADMADV1          */
        unsigned char BYTE;                                 /*  Byte Access     */
         struct  {                                          /*  Bit Access      */
            unsigned char Channel15 :1;                     /*   Channel15      */
            unsigned char Channel14 :1;                     /*   Channel14      */
            unsigned char Channel13 :1;                     /*   Channel13      */
            unsigned char Channel12 :1;                     /*   Channel12      */
            unsigned char Channel11 :1;                     /*   Channel11      */
            unsigned char Channel10 :1;                     /*   Channel10      */
            unsigned char Channel9 :1;                      /*   Channel9       */
            unsigned char Channel8 :1;                      /*   Channel8       */
        } BIT;
    } ADMADV1;
    union  {                                                /* ADMADV2          */
        unsigned char BYTE;                                 /*  Byte Access     */
         struct  {                                          /*  Bit Access      */
            unsigned char Channel23 :1;                     /*   Channel23      */
            unsigned char Channel22 :1;                     /*   Channel22      */
            unsigned char Channel21 :1;                     /*   Channel21      */
            unsigned char Channel20 :1;                     /*   Channel20      */
            unsigned char Channel19 :1;                     /*   Channel19      */
            unsigned char Channel18 :1;                     /*   Channel18      */
            unsigned char Channel17 :1;                     /*   Channel17      */
            unsigned char Channel16 :1;                     /*   Channel16      */
        } BIT;
    } ADMADV2;
    union  {                                                /* ADMADV3          */
        unsigned char BYTE;                                 /*  Byte Access     */
         struct  {                                          /*  Bit Access      */
            unsigned char Channel31 :1;                     /*   Channel31      */
            unsigned char Channel30 :1;                     /*   Channel30      */
            unsigned char Channel29 :1;                     /*   Channel29      */
            unsigned char Channel28 :1;                     /*   Channel28      */
            unsigned char Channel27 :1;                     /*   Channel27      */
            unsigned char Channel26 :1;                     /*   Channel26      */
            unsigned char Channel25 :1;                     /*   Channel25      */
            unsigned char Channel24 :1;                     /*   Channel24      */
        } BIT;
    } ADMADV3;
    union  {                                                /* ADMADV4          */
        unsigned char BYTE;                                 /*  Byte Access     */
         struct  {                                          /*  Bit Access      */
            unsigned char Channel39 :1;                     /*   Channel39      */
            unsigned char Channel38 :1;                     /*   Channel38      */
            unsigned char Channel37 :1;                     /*   Channel37      */
            unsigned char Channel36 :1;                     /*   Channel36      */
            unsigned char Channel35 :1;                     /*   Channel35      */
            unsigned char Channel34 :1;                     /*   Channel34      */
            unsigned char Channel33 :1;                     /*   Channel33      */
            unsigned char Channel32 :1;                     /*   Channel32      */
        } BIT;
    } ADMADV4;
    union  {                                                /* ADMADV5          */
        unsigned char BYTE;                                 /*  Byte Access     */
         struct  {                                          /*  Bit Access      */
            unsigned char Channel47 :1;                     /*   Channel47      */
            unsigned char Channel46 :1;                     /*   Channel46      */
            unsigned char Channel45 :1;                     /*   Channel45      */
            unsigned char Channel44 :1;                     /*   Channel44      */
            unsigned char Channel43 :1;                     /*   Channel43      */
            unsigned char Channel42 :1;                     /*   Channel42      */
            unsigned char Channel41 :1;                     /*   Channel41      */
            unsigned char Channel40 :1;                     /*   Channel40      */
        } BIT;
    } ADMADV5;
    unsigned char wk5 [10];                                 /*                  */
    union  {                                                /* ADMATE0          */
        unsigned char BYTE;                                 /*  Byte Access     */
         struct  {                                          /*  Bit Access      */
            unsigned char Channel63 :1;                     /*   Channel63      */
            unsigned char Channel62 :1;                     /*   Channel62      */
            unsigned char Channel61 :1;                     /*   Channel61      */
            unsigned char Channel60 :1;                     /*   Channel60      */
            unsigned char Channel59 :1;                     /*   Channel59      */
            unsigned char Channel58 :1;                     /*   Channel58      */
            unsigned char Channel57 :1;                     /*   Channel57      */
            unsigned char Channel56 :1;                     /*   Channel56      */
        } BIT;
    } ADMATE0;
    union  {                                                /* ADMATE1          */
        unsigned char BYTE;                                 /*  Byte Access     */
         struct  {                                          /*  Bit Access      */
            unsigned char Channel71 :1;                     /*   Channel71      */
            unsigned char Channel70 :1;                     /*   Channel70      */
            unsigned char Channel69 :1;                     /*   Channel69      */
            unsigned char Channel68 :1;                     /*   Channel68      */
            unsigned char Channel67 :1;                     /*   Channel67      */
            unsigned char Channel66 :1;                     /*   Channel66      */
            unsigned char Channel65 :1;                     /*   Channel65      */
            unsigned char Channel64 :1;                     /*   Channel64      */
        } BIT;
    } ADMATE1;
    union  {                                                /* ADMATE2          */
        unsigned char BYTE;                                 /*  Byte Access     */
         struct  {                                          /*  Bit Access      */
            unsigned char  :5;                              /*   Reserved Bits  */
            unsigned char Channel74 :1;                     /*   Channel74      */
            unsigned char  :2;                              /*   Reserved Bits  */
        } BIT;
    } ADMATE2;
    unsigned char wk6 [13];                                 /*                  */
    union  {                                                /* ADMADE0          */
        unsigned char BYTE;                                 /*  Byte Access     */
         struct  {                                          /*  Bit Access      */
            unsigned char Channel7 :1;                      /*   Channel7       */
            unsigned char Channel6 :1;                      /*   Channel6       */
            unsigned char Channel5 :1;                      /*   Channel5       */
            unsigned char Channel4 :1;                      /*   Channel4       */
            unsigned char Channel3 :1;                      /*   Channel3       */
            unsigned char Channel2 :1;                      /*   Channel2       */
            unsigned char  :2;                              /*   Reserved Bits  */
        } BIT;
    } ADMADE0;
    union  {                                                /* ADMADE1          */
        unsigned char BYTE;                                 /*  Byte Access     */
         struct  {                                          /*  Bit Access      */
            unsigned char Channel15 :1;                     /*   Channel15      */
            unsigned char Channel14 :1;                     /*   Channel14      */
            unsigned char Channel13 :1;                     /*   Channel13      */
            unsigned char Channel12 :1;                     /*   Channel12      */
            unsigned char Channel11 :1;                     /*   Channel11      */
            unsigned char Channel10 :1;                     /*   Channel10      */
            unsigned char Channel9 :1;                      /*   Channel9       */
            unsigned char Channel8 :1;                      /*   Channel8       */
        } BIT;
    } ADMADE1;
    union  {                                                /* ADMADE2          */
        unsigned char BYTE;                                 /*  Byte Access     */
         struct  {                                          /*  Bit Access      */
            unsigned char Channel23 :1;                     /*   Channel23      */
            unsigned char Channel22 :1;                     /*   Channel22      */
            unsigned char Channel21 :1;                     /*   Channel21      */
            unsigned char Channel20 :1;                     /*   Channel20      */
            unsigned char Channel19 :1;                     /*   Channel19      */
            unsigned char Channel18 :1;                     /*   Channel18      */
            unsigned char Channel17 :1;                     /*   Channel17      */
            unsigned char Channel16 :1;                     /*   Channel16      */
        } BIT;
    } ADMADE2;
    union  {                                                /* ADMADE3          */
        unsigned char BYTE;                                 /*  Byte Access     */
         struct  {                                          /*  Bit Access      */
            unsigned char Channel31 :1;                     /*   Channel31      */
            unsigned char Channel30 :1;                     /*   Channel30      */
            unsigned char Channel29 :1;                     /*   Channel29      */
            unsigned char Channel28 :1;                     /*   Channel28      */
            unsigned char Channel27 :1;                     /*   Channel27      */
            unsigned char Channel26 :1;                     /*   Channel26      */
            unsigned char Channel25 :1;                     /*   Channel25      */
            unsigned char Channel24 :1;                     /*   Channel24      */
        } BIT;
    } ADMADE3;
    union  {                                                /* ADMADE4          */
        unsigned char BYTE;                                 /*  Byte Access     */
         struct  {                                          /*  Bit Access      */
            unsigned char Channel39 :1;                     /*   Channel39      */
            unsigned char Channel38 :1;                     /*   Channel38      */
            unsigned char Channel37 :1;                     /*   Channel37      */
            unsigned char Channel36 :1;                     /*   Channel36      */
            unsigned char Channel35 :1;                     /*   Channel35      */
            unsigned char Channel34 :1;                     /*   Channel34      */
            unsigned char Channel33 :1;                     /*   Channel33      */
            unsigned char Channel32 :1;                     /*   Channel32      */
        } BIT;
    } ADMADE4;
    union  {                                                /* ADMADE5          */
        unsigned char BYTE;                                 /*  Byte Access     */
         struct  {                                          /*  Bit Access      */
            unsigned char Channel47 :1;                     /*   Channel47      */
            unsigned char Channel46 :1;                     /*   Channel46      */
            unsigned char Channel45 :1;                     /*   Channel45      */
            unsigned char Channel44 :1;                     /*   Channel44      */
            unsigned char Channel43 :1;                     /*   Channel43      */
            unsigned char Channel42 :1;                     /*   Channel42      */
            unsigned char Channel41 :1;                     /*   Channel41      */
            unsigned char Channel40 :1;                     /*   Channel40      */
        } BIT;
    } ADMADE5;
    unsigned char wk7 [1];                                  /*                  */
    union  {                                                /* ADMADE7          */
        unsigned char BYTE;                                 /*  Byte Access     */
         struct  {                                          /*  Bit Access      */
            unsigned char  :5;                              /*   Reserved Bits  */
            unsigned char Channel74 :1;                     /*   Channel74      */
            unsigned char  :1;                              /*   Reserved Bits  */
            unsigned char Channel72 :1;                     /*   Channel72      */
        } BIT;
    } ADMADE7;
    unsigned char wk8 [8];                                  /*                  */
    union  {                                                /* ADMAMODE0        */
        unsigned char BYTE;                                 /*  Byte Access     */
         struct  {                                          /*  Bit Access      */
            unsigned char Channel31 :1;                     /*   Channel31      */
            unsigned char Channel30 :1;                     /*   Channel30      */
            unsigned char Channel29 :1;                     /*   Channel29      */
            unsigned char Channel28 :1;                     /*   Channel28      */
            unsigned char  :4;                              /*   Reserved Bits  */
        } BIT;
    } ADMAMODE0;
    union  {                                                /* ADMAMODE1        */
        unsigned char BYTE;                                 /*  Byte Access     */
         struct  {                                          /*  Bit Access      */
            unsigned char Channel39 :1;                     /*   Channel39      */
            unsigned char Channel38 :1;                     /*   Channel38      */
            unsigned char Channel37 :1;                     /*   Channel37      */
            unsigned char Channel36 :1;                     /*   Channel36      */
            unsigned char Channel35 :1;                     /*   Channel35      */
            unsigned char Channel34 :1;                     /*   Channel34      */
            unsigned char Channel33 :1;                     /*   Channel33      */
            unsigned char Channel32 :1;                     /*   Channel32      */
        } BIT;
    } ADMAMODE1;
    union  {                                                /* ADMAMODE2        */
        unsigned char BYTE;                                 /*  Byte Access     */
         struct  {                                          /*  Bit Access      */
            unsigned char Channel47 :1;                     /*   Channel47      */
            unsigned char Channel46 :1;                     /*   Channel46      */
            unsigned char Channel45 :1;                     /*   Channel45      */
            unsigned char Channel44 :1;                     /*   Channel44      */
            unsigned char Channel43 :1;                     /*   Channel43      */
            unsigned char Channel42 :1;                     /*   Channel42      */
            unsigned char Channel41 :1;                     /*   Channel41      */
            unsigned char Channel40 :1;                     /*   Channel40      */
        } BIT;
    } ADMAMODE2;
    unsigned char wk9 [13];                                 /*                  */
    unsigned short ADMATCR0;                                /* ADMATCR0         */
    unsigned short ADMARTCR0;                               /* ADMARTCR0        */
    unsigned short ADMATCR1;                                /* ADMATCR1         */
    unsigned short ADMARTCR1;                               /* ADMARTCR1        */
    unsigned char wk10 [8];                                 /*                  */
    unsigned short ADMATCR56;                               /* ADMATCR56        */
    unsigned short ADMATCR57;                               /* ADMATCR57        */
    unsigned short ADMATCR58;                               /* ADMATCR58        */
    unsigned short ADMATCR59;                               /* ADMATCR59        */
    unsigned short ADMATCR60;                               /* ADMATCR60        */
    unsigned short ADMATCR61;                               /* ADMATCR61        */
    unsigned short ADMATCR62;                               /* ADMATCR62        */
    unsigned short ADMATCR63;                               /* ADMATCR63        */
    unsigned short ADMATCR64;                               /* ADMATCR64        */
    unsigned short ADMATCR65;                               /* ADMATCR65        */
    unsigned short ADMATCR66;                               /* ADMATCR66        */
    unsigned short ADMATCR67;                               /* ADMATCR67        */
    unsigned short ADMATCR68;                               /* ADMATCR68        */
    unsigned short ADMATCR69;                               /* ADMATCR69        */
    unsigned short ADMATCR70;                               /* ADMATCR70        */
    unsigned short ADMATCR71;                               /* ADMATCR71        */
    unsigned short ADMAAR0;                                 /* ADMAAR0          */
    unsigned short ADMARAR0;                                /* ADMARAR0         */
    unsigned short ADMAAR1;                                 /* ADMAAR1          */
    unsigned short ADMARAR1;                                /* ADMARAR1         */
    unsigned char wk11 [8];                                 /*                  */
    unsigned short ADMAAR56;                                /* ADMAAR56         */
    unsigned short ADMAAR57;                                /* ADMAAR57         */
    unsigned short ADMAAR58;                                /* ADMAAR58         */
    unsigned short ADMAAR59;                                /* ADMAAR59         */
    unsigned short ADMAAR60;                                /* ADMAAR60         */
    unsigned short ADMAAR61;                                /* ADMAAR61         */
    unsigned short ADMAAR62;                                /* ADMAAR62         */
    unsigned short ADMAAR63;                                /* ADMAAR63         */
    unsigned short ADMAAR64;                                /* ADMAAR64         */
    unsigned short ADMAAR65;                                /* ADMAAR65         */
    unsigned short ADMAAR66;                                /* ADMAAR66         */
    unsigned short ADMAAR67;                                /* ADMAAR67         */
    unsigned short ADMAAR68;                                /* ADMAAR68         */
    unsigned short ADMAAR69;                                /* ADMAAR69         */
    unsigned short ADMAAR70;                                /* ADMAAR70         */
    unsigned short ADMAAR71;                                /* ADMAAR71         */
    unsigned long ADMABUF2;                                 /* ADMABUF2         */
    unsigned long ADMABUF3;                                 /* ADMABUF3         */
    unsigned long ADMABUF4;                                 /* ADMABUF4         */
    unsigned long ADMABUF5;                                 /* ADMABUF5         */
    unsigned long ADMABUF6;                                 /* ADMABUF6         */
    unsigned long ADMABUF7;                                 /* ADMABUF7         */
    unsigned char wk12 [8];                                 /*                  */
    union  {                                                /* ADMARVPR0        */
        unsigned short WORD;                                /*  Word Access     */
         struct  {                                          /*  Bit Access      */
            unsigned char RCANAMB31 :1;                     /*   RCANAMB31      */
            unsigned char RCANAMB30 :1;                     /*   RCANAMB30      */
            unsigned char RCANAMB29 :1;                     /*   RCANAMB29      */
            unsigned char RCANAMB28 :1;                     /*   RCANAMB28      */
            unsigned char RCANAMB27 :1;                     /*   RCANAMB27      */
            unsigned char RCANAMB26 :1;                     /*   RCANAMB26      */
            unsigned char RCANAMB25 :1;                     /*   RCANAMB25      */
            unsigned char RCANAMB24 :1;                     /*   RCANAMB24      */
            unsigned char RCANAMB23 :1;                     /*   RCANAMB23      */
            unsigned char RCANAMB22 :1;                     /*   RCANAMB22      */
            unsigned char RCANAMB21 :1;                     /*   RCANAMB21      */
            unsigned char RCANAMB20 :1;                     /*   RCANAMB20      */
            unsigned char RCANAMB19 :1;                     /*   RCANAMB19      */
            unsigned char RCANAMB18 :1;                     /*   RCANAMB18      */
            unsigned char RCANAMB17 :1;                     /*   RCANAMB17      */
            unsigned char RCANAMB16 :1;                     /*   RCANAMB16      */
        } BIT;
    } ADMARVPR0;
    union  {                                                /* ADMARVPR1        */
        unsigned short WORD;                                /*  Word Access     */
         struct  {                                          /*  Bit Access      */
            unsigned char RCANAMB15 :1;                     /*   RCANAMB15      */
            unsigned char RCANAMB14 :1;                     /*   RCANAMB14      */
            unsigned char RCANAMB13 :1;                     /*   RCANAMB13      */
            unsigned char RCANAMB12 :1;                     /*   RCANAMB12      */
            unsigned char RCANAMB11 :1;                     /*   RCANAMB11      */
            unsigned char RCANAMB10 :1;                     /*   RCANAMB10      */
            unsigned char RCANAMB9 :1;                      /*   RCANAMB9       */
            unsigned char RCANAMB8 :1;                      /*   RCANAMB8       */
            unsigned char RCANAMB7 :1;                      /*   RCANAMB7       */
            unsigned char RCANAMB6 :1;                      /*   RCANAMB6       */
            unsigned char RCANAMB5 :1;                      /*   RCANAMB5       */
            unsigned char RCANAMB4 :1;                      /*   RCANAMB4       */
            unsigned char RCANAMB3 :1;                      /*   RCANAMB3       */
            unsigned char RCANAMB2 :1;                      /*   RCANAMB2       */
            unsigned char RCANAMB1 :1;                      /*   RCANAMB1       */
            unsigned char RCANAMB0 :1;                      /*   RCANAMB0       */
        } BIT;
    } ADMARVPR1;
    union  {                                                /* ADMARVPR2        */
        unsigned short WORD;                                /*  Word Access     */
         struct  {                                          /*  Bit Access      */
            unsigned char RCANBMB31 :1;                     /*   RCANBMB31      */
            unsigned char RCANBMB30 :1;                     /*   RCANBMB30      */
            unsigned char RCANBMB29 :1;                     /*   RCANBMB29      */
            unsigned char RCANBMB28 :1;                     /*   RCANBMB28      */
            unsigned char RCANBMB27 :1;                     /*   RCANBMB27      */
            unsigned char RCANBMB26 :1;                     /*   RCANBMB26      */
            unsigned char RCANBMB25 :1;                     /*   RCANBMB25      */
            unsigned char RCANBMB24 :1;                     /*   RCANBMB24      */
            unsigned char RCANBMB23 :1;                     /*   RCANBMB23      */
            unsigned char RCANBMB22 :1;                     /*   RCANBMB22      */
            unsigned char RCANBMB21 :1;                     /*   RCANBMB21      */
            unsigned char RCANBMB20 :1;                     /*   RCANBMB20      */
            unsigned char RCANBMB19 :1;                     /*   RCANBMB19      */
            unsigned char RCANBMB18 :1;                     /*   RCANBMB18      */
            unsigned char RCANBMB17 :1;                     /*   RCANBMB17      */
            unsigned char RCANBMB16 :1;                     /*   RCANBMB16      */
        } BIT;
    } ADMARVPR2;
    union  {                                                /* ADMARVPR3        */
        unsigned short WORD;                                /*  Word Access     */
         struct  {                                          /*  Bit Access      */
            unsigned char RCANBMB15 :1;                     /*   RCANBMB15      */
            unsigned char RCANBMB14 :1;                     /*   RCANBMB14      */
            unsigned char RCANBMB13 :1;                     /*   RCANBMB13      */
            unsigned char RCANBMB12 :1;                     /*   RCANBMB12      */
            unsigned char RCANBMB11 :1;                     /*   RCANBMB11      */
            unsigned char RCANBMB10 :1;                     /*   RCANBMB10      */
            unsigned char RCANBMB9 :1;                      /*   RCANBMB9       */
            unsigned char RCANBMB8 :1;                      /*   RCANBMB8       */
            unsigned char RCANBMB7 :1;                      /*   RCANBMB7       */
            unsigned char RCANBMB6 :1;                      /*   RCANBMB6       */
            unsigned char RCANBMB5 :1;                      /*   RCANBMB5       */
            unsigned char RCANBMB4 :1;                      /*   RCANBMB4       */
            unsigned char RCANBMB3 :1;                      /*   RCANBMB3       */
            unsigned char RCANBMB2 :1;                      /*   RCANBMB2       */
            unsigned char RCANBMB1 :1;                      /*   RCANBMB1       */
            unsigned char RCANBMB0 :1;                      /*   RCANBMB0       */
        } BIT;
    } ADMARVPR3;
    union  {                                                /* ADMARVPR4        */
        unsigned short WORD;                                /*  Word Access     */
         struct  {                                          /*  Bit Access      */
            unsigned char RCANCMB31 :1;                     /*   RCANCMB31      */
            unsigned char RCANCMB30 :1;                     /*   RCANCMB30      */
            unsigned char RCANCMB29 :1;                     /*   RCANCMB29      */
            unsigned char RCANCMB28 :1;                     /*   RCANCMB28      */
            unsigned char RCANCMB27 :1;                     /*   RCANCMB27      */
            unsigned char RCANCMB26 :1;                     /*   RCANCMB26      */
            unsigned char RCANCMB25 :1;                     /*   RCANCMB25      */
            unsigned char RCANCMB24 :1;                     /*   RCANCMB24      */
            unsigned char RCANCMB23 :1;                     /*   RCANCMB23      */
            unsigned char RCANCMB22 :1;                     /*   RCANCMB22      */
            unsigned char RCANCMB21 :1;                     /*   RCANCMB21      */
            unsigned char RCANCMB20 :1;                     /*   RCANCMB20      */
            unsigned char RCANCMB19 :1;                     /*   RCANCMB19      */
            unsigned char RCANCMB18 :1;                     /*   RCANCMB18      */
            unsigned char RCANCMB17 :1;                     /*   RCANCMB17      */
            unsigned char RCANCMB16 :1;                     /*   RCANCMB16      */
        } BIT;
    } ADMARVPR4;
    union  {                                                /* ADMARVPR5        */
        unsigned short WORD;                                /*  Word Access     */
         struct  {                                          /*  Bit Access      */
            unsigned char RCANCMB15 :1;                     /*   RCANCMB15      */
            unsigned char RCANCMB14 :1;                     /*   RCANCMB14      */
            unsigned char RCANCMB13 :1;                     /*   RCANCMB13      */
            unsigned char RCANCMB12 :1;                     /*   RCANCMB12      */
            unsigned char RCANCMB11 :1;                     /*   RCANCMB11      */
            unsigned char RCANCMB10 :1;                     /*   RCANCMB10      */
            unsigned char RCANCMB9 :1;                      /*   RCANCMB9       */
            unsigned char RCANCMB8 :1;                      /*   RCANCMB8       */
            unsigned char RCANCMB7 :1;                      /*   RCANCMB7       */
            unsigned char RCANCMB6 :1;                      /*   RCANCMB6       */
            unsigned char RCANCMB5 :1;                      /*   RCANCMB5       */
            unsigned char RCANCMB4 :1;                      /*   RCANCMB4       */
            unsigned char RCANCMB3 :1;                      /*   RCANCMB3       */
            unsigned char RCANCMB2 :1;                      /*   RCANCMB2       */
            unsigned char RCANCMB1 :1;                      /*   RCANCMB1       */
            unsigned char RCANCMB0 :1;                      /*   RCANCMB0       */
        } BIT;
    } ADMARVPR5;
    unsigned char wk13 [4];                                 /*                  */
    union  {                                                /* ADMATVPR0        */
        unsigned short WORD;                                /*  Word Access     */
         struct  {                                          /*  Bit Access      */
            unsigned char RCANAMB31 :1;                     /*   RCANAMB31      */
            unsigned char RCANAMB30 :1;                     /*   RCANAMB30      */
            unsigned char RCANAMB29 :1;                     /*   RCANAMB29      */
            unsigned char RCANAMB28 :1;                     /*   RCANAMB28      */
            unsigned char RCANAMB27 :1;                     /*   RCANAMB27      */
            unsigned char RCANAMB26 :1;                     /*   RCANAMB26      */
            unsigned char RCANAMB25 :1;                     /*   RCANAMB25      */
            unsigned char RCANAMB24 :1;                     /*   RCANAMB24      */
            unsigned char RCANAMB23 :1;                     /*   RCANAMB23      */
            unsigned char RCANAMB22 :1;                     /*   RCANAMB22      */
            unsigned char RCANAMB21 :1;                     /*   RCANAMB21      */
            unsigned char RCANAMB20 :1;                     /*   RCANAMB20      */
            unsigned char RCANAMB19 :1;                     /*   RCANAMB19      */
            unsigned char RCANAMB18 :1;                     /*   RCANAMB18      */
            unsigned char RCANAMB17 :1;                     /*   RCANAMB17      */
            unsigned char RCANAMB16 :1;                     /*   RCANAMB16      */
        } BIT;
    } ADMATVPR0;
    union  {                                                /* ADMATVPR1        */
        unsigned short WORD;                                /*  Word Access     */
         struct  {                                          /*  Bit Access      */
            unsigned char RCANAMB15 :1;                     /*   RCANAMB15      */
            unsigned char RCANAMB14 :1;                     /*   RCANAMB14      */
            unsigned char RCANAMB13 :1;                     /*   RCANAMB13      */
            unsigned char RCANAMB12 :1;                     /*   RCANAMB12      */
            unsigned char RCANAMB11 :1;                     /*   RCANAMB11      */
            unsigned char RCANAMB10 :1;                     /*   RCANAMB10      */
            unsigned char RCANAMB9 :1;                      /*   RCANAMB9       */
            unsigned char RCANAMB8 :1;                      /*   RCANAMB8       */
            unsigned char RCANAMB7 :1;                      /*   RCANAMB7       */
            unsigned char RCANAMB6 :1;                      /*   RCANAMB6       */
            unsigned char RCANAMB5 :1;                      /*   RCANAMB5       */
            unsigned char RCANAMB4 :1;                      /*   RCANAMB4       */
            unsigned char RCANAMB3 :1;                      /*   RCANAMB3       */
            unsigned char RCANAMB2 :1;                      /*   RCANAMB2       */
            unsigned char RCANAMB1 :1;                      /*   RCANAMB1       */
            unsigned char  :1;                              /*   Reserved Bits  */
        } BIT;
    } ADMATVPR1;
    union  {                                                /* ADMATVPR2        */
        unsigned short WORD;                                /*  Word Access     */
         struct  {                                          /*  Bit Access      */
            unsigned char RCANBMB31 :1;                     /*   RCANBMB31      */
            unsigned char RCANBMB30 :1;                     /*   RCANBMB30      */
            unsigned char RCANBMB29 :1;                     /*   RCANBMB29      */
            unsigned char RCANBMB28 :1;                     /*   RCANBMB28      */
            unsigned char RCANBMB27 :1;                     /*   RCANBMB27      */
            unsigned char RCANBMB26 :1;                     /*   RCANBMB26      */
            unsigned char RCANBMB25 :1;                     /*   RCANBMB25      */
            unsigned char RCANBMB24 :1;                     /*   RCANBMB24      */
            unsigned char RCANBMB23 :1;                     /*   RCANBMB23      */
            unsigned char RCANBMB22 :1;                     /*   RCANBMB22      */
            unsigned char RCANBMB21 :1;                     /*   RCANBMB21      */
            unsigned char RCANBMB20 :1;                     /*   RCANBMB20      */
            unsigned char RCANBMB19 :1;                     /*   RCANBMB19      */
            unsigned char RCANBMB18 :1;                     /*   RCANBMB18      */
            unsigned char RCANBMB17 :1;                     /*   RCANBMB17      */
            unsigned char RCANBMB16 :1;                     /*   RCANBMB16      */
        } BIT;
    } ADMATVPR2;
    union  {                                                /* ADMATVPR3        */
        unsigned short WORD;                                /*  Word Access     */
         struct  {                                          /*  Bit Access      */
            unsigned char RCANBMB15 :1;                     /*   RCANBMB15      */
            unsigned char RCANBMB14 :1;                     /*   RCANBMB14      */
            unsigned char RCANBMB13 :1;                     /*   RCANBMB13      */
            unsigned char RCANBMB12 :1;                     /*   RCANBMB12      */
            unsigned char RCANBMB11 :1;                     /*   RCANBMB11      */
            unsigned char RCANBMB10 :1;                     /*   RCANBMB10      */
            unsigned char RCANBMB9 :1;                      /*   RCANBMB9       */
            unsigned char RCANBMB8 :1;                      /*   RCANBMB8       */
            unsigned char RCANBMB7 :1;                      /*   RCANBMB7       */
            unsigned char RCANBMB6 :1;                      /*   RCANBMB6       */
            unsigned char RCANBMB5 :1;                      /*   RCANBMB5       */
            unsigned char RCANBMB4 :1;                      /*   RCANBMB4       */
            unsigned char RCANBMB3 :1;                      /*   RCANBMB3       */
            unsigned char RCANBMB2 :1;                      /*   RCANBMB2       */
            unsigned char RCANBMB1 :1;                      /*   RCANBMB1       */
            unsigned char  :1;                              /*   Reserved Bits  */
        } BIT;
    } ADMATVPR3;
    union  {                                                /* ADMATVPR4        */
        unsigned short WORD;                                /*  Word Access     */
         struct  {                                          /*  Bit Access      */
            unsigned char RCANCMB31 :1;                     /*   RCANCMB31      */
            unsigned char RCANCMB30 :1;                     /*   RCANCMB30      */
            unsigned char RCANCMB29 :1;                     /*   RCANCMB29      */
            unsigned char RCANCMB28 :1;                     /*   RCANCMB28      */
            unsigned char RCANCMB27 :1;                     /*   RCANCMB27      */
            unsigned char RCANCMB26 :1;                     /*   RCANCMB26      */
            unsigned char RCANCMB25 :1;                     /*   RCANCMB25      */
            unsigned char RCANCMB24 :1;                     /*   RCANCMB24      */
            unsigned char RCANCMB23 :1;                     /*   RCANCMB23      */
            unsigned char RCANCMB22 :1;                     /*   RCANCMB22      */
            unsigned char RCANCMB21 :1;                     /*   RCANCMB21      */
            unsigned char RCANCMB20 :1;                     /*   RCANCMB20      */
            unsigned char RCANCMB19 :1;                     /*   RCANCMB19      */
            unsigned char RCANCMB18 :1;                     /*   RCANCMB18      */
            unsigned char RCANCMB17 :1;                     /*   RCANCMB17      */
            unsigned char RCANCMB16 :1;                     /*   RCANCMB16      */
        } BIT;
    } ADMATVPR4;
    union  {                                                /* ADMATVPR5        */
        unsigned short WORD;                                /*  Word Access     */
         struct  {                                          /*  Bit Access      */
            unsigned char RCANCMB15 :1;                     /*   RCANCMB15      */
            unsigned char RCANCMB14 :1;                     /*   RCANCMB14      */
            unsigned char RCANCMB13 :1;                     /*   RCANCMB13      */
            unsigned char RCANCMB12 :1;                     /*   RCANCMB12      */
            unsigned char RCANCMB11 :1;                     /*   RCANCMB11      */
            unsigned char RCANCMB10 :1;                     /*   RCANCMB10      */
            unsigned char RCANCMB9 :1;                      /*   RCANCMB9       */
            unsigned char RCANCMB8 :1;                      /*   RCANCMB8       */
            unsigned char RCANCMB7 :1;                      /*   RCANCMB7       */
            unsigned char RCANCMB6 :1;                      /*   RCANCMB6       */
            unsigned char RCANCMB5 :1;                      /*   RCANCMB5       */
            unsigned char RCANCMB4 :1;                      /*   RCANCMB4       */
            unsigned char RCANCMB3 :1;                      /*   RCANCMB3       */
            unsigned char RCANCMB2 :1;                      /*   RCANCMB2       */
            unsigned char RCANCMB1 :1;                      /*   RCANCMB1       */
            unsigned char  :1;                              /*   Reserved Bits  */
        } BIT;
    } ADMATVPR5;
};

 struct st_timerA {                                         /* TIMER A          */
    unsigned char wk [2];                                   /*                  */
    union  {                                                /* TCRA             */
        unsigned char BYTE;                                 /*  Byte Access     */
         struct  {                                          /*  Bit Access      */
            unsigned char EVOSEL2A :1;                      /*   EVOSEL2A       */
            unsigned char EVOSEL2B :1;                      /*   EVOSEL2B       */
            unsigned char EVOSEL1 :3;                       /*   EVOSEL1[2:0]   */
            unsigned char CKSELA :3;                        /*   CKSELA[2:0]    */
        } BIT;
    } TCRA;
    unsigned char wk1 [1];                                  /*                  */
    union  {                                                /* TIOR1A           */
        unsigned short WORD;                                /*  Word Access     */
         struct  {                                          /*  Bit Access      */
            unsigned char  :4;                              /*   Reserved Bits  */
            unsigned char IOA5 :2;                          /*   IOA5[1:0]      */
            unsigned char IOA4 :2;                          /*   IOA4[1:0]      */
            unsigned char IOA3 :2;                          /*   IOA3[1:0]      */
            unsigned char IOA2 :2;                          /*   IOA2[1:0]      */
            unsigned char IOA1 :2;                          /*   IOA1[1:0]      */
            unsigned char IOA0 :2;                          /*   IOA0[1:0]      */
        } BIT;
    } TIOR1A;
    union  {                                                /* TIOR2A           */
        unsigned short WORD;                                /*  Word Access     */
         struct  {                                          /*  Bit Access      */
            unsigned char  :2;                              /*   Reserved Bits  */
            unsigned char NCKA5 :1;                         /*   NCKA5          */
            unsigned char NCKA4 :1;                         /*   NCKA4          */
            unsigned char NCKA3 :1;                         /*   NCKA3          */
            unsigned char NCKA2 :1;                         /*   NCKA2          */
            unsigned char NCKA1 :1;                         /*   NCKA1          */
            unsigned char NCKA0 :1;                         /*   NCKA0          */
            unsigned char  :2;                              /*   Reserved Bits  */
            unsigned char NCEA5 :1;                         /*   NCEA5          */
            unsigned char NCEA4 :1;                         /*   NCEA4          */
            unsigned char NCEA3 :1;                         /*   NCEA3          */
            unsigned char NCEA2 :1;                         /*   NCEA2          */
            unsigned char NCEA1 :1;                         /*   NCEA1          */
            unsigned char NCEA0 :1;                         /*   NCEA0          */
        } BIT;
    } TIOR2A;
    union  {                                                /* TSRA             */
        unsigned char BYTE;                                 /*  Byte Access     */
         struct  {                                          /*  Bit Access      */
            unsigned char OVFA :1;                          /*   OVFA           */
            unsigned char  :1;                              /*   Reserved Bits  */
            unsigned char ICFA5 :1;                         /*   ICFA5          */
            unsigned char ICFA4 :1;                         /*   ICFA4          */
            unsigned char ICFA3 :1;                         /*   ICFA3          */
            unsigned char ICFA2 :1;                         /*   ICFA2          */
            unsigned char ICFA1 :1;                         /*   ICFA1          */
            unsigned char ICFA0 :1;                         /*   ICFA0          */
        } BIT;
    } TSRA;
    union  {                                                /* TIERA            */
        unsigned char BYTE;                                 /*  Byte Access     */
         struct  {                                          /*  Bit Access      */
            unsigned char OVEA :1;                          /*   OVEA           */
            unsigned char  :1;                              /*   Reserved Bits  */
            unsigned char ICEA5 :1;                         /*   ICEA5          */
            unsigned char ICEA4 :1;                         /*   ICEA4          */
            unsigned char ICEA3 :1;                         /*   ICEA3          */
            unsigned char ICEA2 :1;                         /*   ICEA2          */
            unsigned char ICEA1 :1;                         /*   ICEA1          */
            unsigned char ICEA0 :1;                         /*   ICEA0          */
        } BIT;
    } TIERA;
    unsigned char wk2 [6];                                  /*                  */
    unsigned char NCNTA0;                                   /* NCNTA0           */
    unsigned char NCRA0;                                    /* NCRA0            */
    unsigned char NCNTA1;                                   /* NCNTA1           */
    unsigned char NCRA1;                                    /* NCRA1            */
    unsigned char NCNTA2;                                   /* NCNTA2           */
    unsigned char NCRA2;                                    /* NCRA2            */
    unsigned char NCNTA3;                                   /* NCNTA3           */
    unsigned char NCRA3;                                    /* NCRA3            */
    unsigned char NCNTA4;                                   /* NCNTA4           */
    unsigned char NCRA4;                                    /* NCRA4            */
    unsigned char NCNTA5;                                   /* NCNTA5           */
    unsigned char NCRA5;                                    /* NCRA5            */
    unsigned char wk3 [4];                                  /*                  */
    unsigned long TCNTA;                                    /* TCNTA            */
    unsigned char wk4 [4];                                  /*                  */
    unsigned long ICRA0;                                    /* ICRA0            */
    unsigned long ICRA1;                                    /* ICRA1            */
    unsigned long ICRA2;                                    /* ICRA2            */
    unsigned long ICRA3;                                    /* ICRA3            */
    unsigned long ICRA4;                                    /* ICRA4            */
    unsigned long ICRA5;                                    /* ICRA5            */
};

 struct st_timerB {                                         /* TIMER B          */
    unsigned char wk [4];                                   /*                  */
    union  {                                                /* TCRB             */
        unsigned char BYTE;                                 /*  Byte Access     */
         struct  {                                          /*  Bit Access      */
            unsigned char  :6;                              /*   Reserved Bits  */
            unsigned char CKSELB :2;                        /*   CKSELB[1:0]    */
        } BIT;
    } TCRB;
    union  {                                                /* TIORB            */
        unsigned char BYTE;                                 /*  Byte Access     */
         struct  {                                          /*  Bit Access      */
            unsigned char LDSEL :1;                         /*   LDSEL          */
            unsigned char CTCNTB5 :1;                       /*   CTCNTB5        */
            unsigned char EVCNTB :1;                        /*   EVCNTB         */
            unsigned char LDEN :1;                          /*   LDEN           */
            unsigned char CCS :1;                           /*   CCS            */
            unsigned char  :2;                              /*   Reserved Bits  */
            unsigned char IOB6 :1;                          /*   IOB6           */
        } BIT;
    } TIORB;
    union  {                                                /* TSRB             */
        unsigned char BYTE;                                 /*  Byte Access     */
         struct  {                                          /*  Bit Access      */
            unsigned char  :4;                              /*   Reserved Bits  */
            unsigned char CMFB6 :1;                         /*   CMFB6          */
            unsigned char CMFB1 :1;                         /*   CMFB1          */
            unsigned char ICFB0 :1;                         /*   ICFB0          */
            unsigned char CMFB0 :1;                         /*   CMFB0          */
        } BIT;
    } TSRB;
    union  {                                                /* TIERB            */
        unsigned char BYTE;                                 /*  Byte Access     */
         struct  {                                          /*  Bit Access      */
            unsigned char  :2;                              /*   Reserved Bits  */
            unsigned char IREG :2;                          /*   IREG[1:0]      */
            unsigned char CMEB6 :1;                         /*   CMEB6          */
            unsigned char CMEB1 :1;                         /*   CMEB1          */
            unsigned char ICEB0 :1;                         /*   ICEB0          */
            unsigned char CMEB0 :1;                         /*   CMEB0          */
        } BIT;
    } TIERB;
    unsigned char wk1 [8];                                  /*                  */
    unsigned long TCNTB0;                                   /* TCNTB0           */
    unsigned long ICRB0;                                    /* ICRB0            */
    unsigned long OCRB0;                                    /* OCRB0            */
    unsigned char TCNTB1;                                   /* TCNTB1           */
    unsigned char OCRB1;                                    /* OCRB1            */
    unsigned char wk2 [2];                                  /*                  */
    unsigned long ICRB1;                                    /* ICRB1            */
    unsigned long ICRB2;                                    /* ICRB2            */
    unsigned char wk3 [8];                                  /*                  */
    union  {                                                /* LDB              */
        unsigned long LONG;                                 /*  Long Access     */
         struct  {                                          /*  Bit Access      */
            unsigned long  :8;                              /*   Reserved Bits  */
            unsigned long LDVAL :24;                        /*   LDVAL[23:0]    */
        } BIT;
    } LDB;
    union  {                                                /* RLDB             */
        unsigned long LONG;                                 /*  Long Access     */
         struct  {                                          /*  Bit Access      */
            unsigned long RLDVAL :24;                       /*   RLDVAL[23:0]   */
            unsigned long  :8;                              /*   Reserved Bits  */
        } BIT;
    } RLDB;
    union  {                                                /* PIMR             */
        unsigned short WORD;                                /*  Word Access     */
         struct  {                                          /*  Bit Access      */
            unsigned short  :4;                             /*   Reserved Bits  */
            unsigned short PIM :12;                         /*   PIM[11:0]      */
        } BIT;
    } PIMR;
    unsigned char wk4 [2];                                  /*                  */
    union  {                                                /* TCNTB2           */
        unsigned long LONG;                                 /*  Long Access     */
         struct  {                                          /*  Bit Access      */
            unsigned long CNTB2 :24;                        /*   CNTB2[23:0]    */
            unsigned long  :8;                              /*   Reserved Bits  */
        } BIT;
    } TCNTB2;
    union  {                                                /* TCNTB6           */
        unsigned long LONG;                                 /*  Long Access     */
         struct  {                                          /*  Bit Access      */
            unsigned long CNTB6 :20;                        /*   CNTB6[19:0]    */
            unsigned long  :12;                             /*   Reserved Bits  */
        } BIT;
    } TCNTB6;
    union  {                                                /* OCRB6            */
        unsigned long LONG;                                 /*  Long Access     */
         struct  {                                          /*  Bit Access      */
            unsigned long OCB6 :20;                         /*   OCB6[19:0]     */
            unsigned long  :12;                             /*   Reserved Bits  */
        } BIT;
    } OCRB6;
    union  {                                                /* OCRB7            */
        unsigned long LONG;                                 /*  Long Access     */
         struct  {                                          /*  Bit Access      */
            unsigned long OCB7 :20;                         /*   OCB7[19:0]     */
            unsigned long  :12;                             /*   Reserved Bits  */
        } BIT;
    } OCRB7;
    unsigned char wk5 [4];                                  /*                  */
    union  {                                                /* TCNTB3           */
        unsigned long LONG;                                 /*  Long Access     */
         struct  {                                          /*  Bit Access      */
            unsigned long CNTB3 :20;                        /*   CNTB3[19:0]    */
            unsigned long  :12;                             /*   Reserved Bits  */
        } BIT;
    } TCNTB3;
    union  {                                                /* TCNTB4           */
        unsigned long LONG;                                 /*  Long Access     */
         struct  {                                          /*  Bit Access      */
            unsigned long CNTB4 :20;                        /*   CNTB4[19:0]    */
            unsigned long  :12;                             /*   Reserved Bits  */
        } BIT;
    } TCNTB4;
    union  {                                                /* TCNTB5           */
        unsigned long LONG;                                 /*  Long Access     */
         struct  {                                          /*  Bit Access      */
            unsigned long CNTB5 :20;                        /*   CNTB5[19:0]    */
            unsigned long  :12;                             /*   Reserved Bits  */
        } BIT;
    } TCNTB5;
    union  {                                                /* TCCLRB           */
        unsigned long LONG;                                 /*  Long Access     */
         struct  {                                          /*  Bit Access      */
            unsigned long CCLRB :20;                        /*   CCLRB[19:0]    */
            unsigned long  :12;                             /*   Reserved Bits  */
        } BIT;
    } TCCLRB;
};

typedef  struct st_timerC_subblock {                        /*                  */
    union  {                                                /* TCRC             */
        unsigned char BYTE;                                 /*  Byte Access     */
         struct  {                                          /*  Bit Access      */
            unsigned char FCMC3 :1;                         /*   FCMC3          */
            unsigned char FCMC2 :1;                         /*   FCMC2          */
            unsigned char FCMC1 :1;                         /*   FCMC1          */
            unsigned char FCMC0 :1;                         /*   FCMC0          */
            unsigned char PWMC0 :1;                         /*   PWMC0          */
            unsigned char CKSELC :3;                        /*   CKSELC[2:0]    */
        } BIT;
    } TCRC;
    union  {                                                /* TIERC            */
        unsigned char BYTE;                                 /*  Byte Access     */
         struct  {                                          /*  Bit Access      */
            unsigned char  :3;                              /*   Reserved Bits  */
            unsigned char OVEC :1;                          /*   OVEC           */
            unsigned char IMEC3 :1;                         /*   IMEC3          */
            unsigned char IMEC2 :1;                         /*   IMEC2          */
            unsigned char IMEC1 :1;                         /*   IMEC1          */
            unsigned char IMEC0 :1;                         /*   IMEC0          */
        } BIT;
    } TIERC;
    union  {                                                /* TIORC            */
        unsigned short WORD;                                /*  Word Access     */
         struct  {                                          /*  Bit Access      */
            unsigned char  :1;                              /*   Reserved Bits  */
            unsigned char IOC3 :3;                          /*   IOC3[2:0]      */
            unsigned char  :1;                              /*   Reserved Bits  */
            unsigned char IOC2 :3;                          /*   IOC2[2:0]      */
            unsigned char  :1;                              /*   Reserved Bits  */
            unsigned char IOC1 :3;                          /*   IOC1[2:0]      */
            unsigned char  :1;                              /*   Reserved Bits  */
            unsigned char IOC0 :3;                          /*   IOC0[2:0]      */
        } BIT;
    } TIORC;
    union  {                                                /* TSRC             */
        unsigned char BYTE;                                 /*  Byte Access     */
         struct  {                                          /*  Bit Access      */
            unsigned char  :3;                              /*   Reserved Bits  */
            unsigned char OVFC :1;                          /*   OVFC           */
            unsigned char IMFC3 :1;                         /*   IMFC3          */
            unsigned char IMFC2 :1;                         /*   IMFC2          */
            unsigned char IMFC1 :1;                         /*   IMFC1          */
            unsigned char IMFC0 :1;                         /*   IMFC0          */
        } BIT;
    } TSRC;
    unsigned char wk1 [3];                                  /*                  */
    unsigned long GRC [4];                                  /* GRC              */
    unsigned long TCNTC;                                    /* TCNTC            */
    unsigned char wk2 [4];                                  /*                  */
} t_timerC_subblock;

 struct st_timerC {                                         /* TIMER C          */
    union  {                                                /* TSTRC            */
        unsigned char BYTE;                                 /*  Byte Access     */
         struct  {                                          /*  Bit Access      */
            unsigned char  :3;                              /*   Reserved Bits  */
            unsigned char STRC4 :1;                         /*   STRC4          */
            unsigned char STRC3 :1;                         /*   STRC3          */
            unsigned char STRC2 :1;                         /*   STRC2          */
            unsigned char STRC1 :1;                         /*   STRC1          */
            unsigned char STRC0 :1;                         /*   STRC0          */
        } BIT;
    } TSTRC;
    unsigned char wk1 [1];                                  /*                  */
    union  {                                                /* NCCRC0           */
        unsigned char BYTE;                                 /*  Byte Access     */
         struct  {                                          /*  Bit Access      */
            unsigned char  :4;                              /*   Reserved Bits  */
            unsigned char NCEC03 :1;                        /*   NCEC03         */
            unsigned char NCEC02 :1;                        /*   NCEC02         */
            unsigned char NCEC01 :1;                        /*   NCEC01         */
            unsigned char NCEC00 :1;                        /*   NCEC00         */
        } BIT;
    } NCCRC0;
    union  {                                                /* NCCRC1           */
        unsigned char BYTE;                                 /*  Byte Access     */
         struct  {                                          /*  Bit Access      */
            unsigned char  :4;                              /*   Reserved Bits  */
            unsigned char NCEC13 :1;                        /*   NCEC13         */
            unsigned char NCEC12 :1;                        /*   NCEC12         */
            unsigned char NCEC11 :1;                        /*   NCEC11         */
            unsigned char NCEC10 :1;                        /*   NCEC10         */
        } BIT;
    } NCCRC1;
    union  {                                                /* NCCRC2           */
        unsigned char BYTE;                                 /*  Byte Access     */
         struct  {                                          /*  Bit Access      */
            unsigned char  :4;                              /*   Reserved Bits  */
            unsigned char NCEC23 :1;                        /*   NCEC23         */
            unsigned char NCEC22 :1;                        /*   NCEC22         */
            unsigned char NCEC21 :1;                        /*   NCEC21         */
            unsigned char NCEC20 :1;                        /*   NCEC20         */
        } BIT;
    } NCCRC2;
    union  {                                                /* NCCRC3           */
        unsigned char BYTE;                                 /*  Byte Access     */
         struct  {                                          /*  Bit Access      */
            unsigned char  :4;                              /*   Reserved Bits  */
            unsigned char NCEC33 :1;                        /*   NCEC33         */
            unsigned char NCEC32 :1;                        /*   NCEC32         */
            unsigned char NCEC31 :1;                        /*   NCEC31         */
            unsigned char NCEC30 :1;                        /*   NCEC30         */
        } BIT;
    } NCCRC3;
    union  {                                                /* NCCRC4           */
        unsigned char BYTE;                                 /*  Byte Access     */
         struct  {                                          /*  Bit Access      */
            unsigned char  :4;                              /*   Reserved Bits  */
            unsigned char NCEC43 :1;                        /*   NCEC43         */
            unsigned char NCEC42 :1;                        /*   NCEC42         */
            unsigned char NCEC41 :1;                        /*   NCEC41         */
            unsigned char NCEC40 :1;                        /*   NCEC40         */
        } BIT;
    } NCCRC4;
    unsigned char wk2 [9];                                  /*                  */
    unsigned char NCNTC00;                                  /* NCNTC00          */
    unsigned char NCNTC01;                                  /* NCNTC01          */
    unsigned char NCNTC02;                                  /* NCNTC02          */
    unsigned char NCNTC03;                                  /* NCNTC03          */
    unsigned char NCRC00;                                   /* NCRC00           */
    unsigned char NCRC01;                                   /* NCRC01           */
    unsigned char NCRC02;                                   /* NCRC02           */
    unsigned char NCRC03;                                   /* NCRC03           */
    unsigned char NCNTC10;                                  /* NCNTC10          */
    unsigned char NCNTC11;                                  /* NCNTC11          */
    unsigned char NCNTC12;                                  /* NCNTC12          */
    unsigned char NCNTC13;                                  /* NCNTC13          */
    unsigned char NCRC10;                                   /* NCRC10           */
    unsigned char NCRC11;                                   /* NCRC11           */
    unsigned char NCRC12;                                   /* NCRC12           */
    unsigned char NCRC13;                                   /* NCRC13           */
    unsigned char NCNTC20;                                  /* NCNTC20          */
    unsigned char NCNTC21;                                  /* NCNTC21          */
    unsigned char NCNTC22;                                  /* NCNTC22          */
    unsigned char NCNTC23;                                  /* NCNTC23          */
    unsigned char NCRC20;                                   /* NCRC20           */
    unsigned char NCRC21;                                   /* NCRC21           */
    unsigned char NCRC22;                                   /* NCRC22           */
    unsigned char NCRC23;                                   /* NCRC23           */
    unsigned char NCNTC30;                                  /* NCNTC30          */
    unsigned char NCNTC31;                                  /* NCNTC31          */
    unsigned char NCNTC32;                                  /* NCNTC32          */
    unsigned char NCNTC33;                                  /* NCNTC33          */
    unsigned char NCRC30;                                   /* NCRC30           */
    unsigned char NCRC31;                                   /* NCRC31           */
    unsigned char NCRC32;                                   /* NCRC32           */
    unsigned char NCRC33;                                   /* NCRC33           */
    unsigned char NCNTC40;                                  /* NCNTC40          */
    unsigned char NCNTC41;                                  /* NCNTC41          */
    unsigned char NCNTC42;                                  /* NCNTC42          */
    unsigned char NCNTC43;                                  /* NCNTC43          */
    unsigned char NCRC40;                                   /* NCRC40           */
    unsigned char NCRC41;                                   /* NCRC41           */
    unsigned char NCRC42;                                   /* NCRC42           */
    unsigned char NCRC43;                                   /* NCRC43           */
    unsigned char wk3 [8];                                  /*                  */
    t_timerC_subblock SUBBLOCK[5];                          /* Timer C Subblock */
};

typedef  struct st_timerD_subblockA {                       /*                  */
    unsigned long TCNT1D;                                   /* TCNT1D          */
    unsigned long TCNT2D;                                   /* TCNT2D          */
    unsigned long OSBRD;                                    /* OSBRD           */
    union  {                                                /* TCRD             */
        unsigned short WORD;                                /*  Word Access     */
         struct  {                                          /*  Bit Access      */
            unsigned char  :1;                              /*   Reserved Bits  */
            unsigned char OBRED :1;                         /*   OBRED          */
            unsigned char C2CED :1;                         /*   C2CED          */
            unsigned char C1CED :1;                         /*   C1CED          */
            unsigned char  :1;                              /*   Reserved Bits  */
            unsigned char CKSEL2D :3;                       /*   CKSEL2D[2:0]   */
            unsigned char  :1;                              /*   Reserved Bits  */
            unsigned char CKSEL1D :3;                       /*   CKSEL1D[2:0]   */
            unsigned char  :1;                              /*   Reserved Bits  */
            unsigned char DCSELD :3;                        /*   DCSELD[2:0]    */
        } BIT;
    } TCRD;
    union  {                                                /* TOCRD            */
        unsigned char BYTE;                                 /*  Byte Access     */
         struct  {                                          /*  Bit Access      */
            unsigned char  :6;                              /*   Reserved Bits  */
            unsigned char TONEBD :1;                        /*   TONEBD         */
            unsigned char TONEAD :1;                        /*   TONEAD         */
        } BIT;
    } TOCRD;
    union  {                                                /* CMPOD            */
        unsigned char BYTE;                                 /*  Byte Access     */
         struct  {                                          /*  Bit Access      */
            unsigned char CMPBD3 :1;                        /*   CMPBD3         */
            unsigned char CMPBD2 :1;                        /*   CMPBD2         */
            unsigned char CMPBD1 :1;                        /*   CMPBD1         */
            unsigned char CMPBD0 :1;                        /*   CMPBD0         */
            unsigned char CMPAD3 :1;                        /*   CMPAD3         */
            unsigned char CMPAD2 :1;                        /*   CMPAD2         */
            unsigned char CMPAD1 :1;                        /*   CMPAD1         */
            unsigned char CMPAD0 :1;                        /*   CMPAD0         */
        } BIT;
    } CMPOD;
} t_timerD_subblockA;

typedef  struct st_timerD_subblockB {                       /*                  */
    union  {                                                /* TIOR1D           */
        unsigned short WORD;                                /*  Word Access     */
         struct  {                                          /*  Bit Access      */
            unsigned short OSSD3 :2;                        /*   OSSD3[1:0]     */
            unsigned short OSSD2 :2;                        /*   OSSD2[1:0]     */
            unsigned short OSSD1 :2;                        /*   OSSD1[1:0]     */
            unsigned short OSSD0 :2;                        /*   OSSD0[1:0]     */
            unsigned short IOAD3 :2;                        /*   IOAD3[1:0]     */
            unsigned short IOAD2 :2;                        /*   IOAD2[1:0]     */
            unsigned short IOAD1 :2;                        /*   IOAD1[1:0]     */
            unsigned short IOAD0 :2;                        /*   IOAD0[1:0]     */
        } BIT;
    } TIOR1D;
    union  {                                                /* TIOR2D           */
        unsigned short WORD;                                /*  Word Access     */
         struct  {                                          /*  Bit Access      */
            unsigned short  :1;                             /*   Reserved Bits  */
            unsigned short IOBD3 :3;                        /*   IOBD3[2:0]     */
            unsigned short  :1;                             /*   Reserved Bits  */
            unsigned short IOBD2 :3;                        /*   IOBD2[2:0]     */
            unsigned short  :1;                             /*   Reserved Bits  */
            unsigned short IOBD1 :3;                        /*   IOBD1[2:0]     */
            unsigned short  :1;                             /*   Reserved Bits  */
            unsigned short IOBD0 :3;                        /*   IOBD0[2:0]     */
        } BIT;
    } TIOR2D;
    unsigned char wk1 [1];                                  /*                  */
    union  {                                                /* DSTRD            */
        unsigned char BYTE;                                 /*  Byte Access     */
         struct  {                                          /*  Bit Access      */
            unsigned char  :4;                              /*   Reserved Bits  */
            unsigned char DSTD3 :1;                         /*   DSTD3          */
            unsigned char DSTD2 :1;                         /*   DSTD2          */
            unsigned char DSTD1 :1;                         /*   DSTD1          */
            unsigned char DSTD0 :1;                         /*   DSTD0          */
        } BIT;
    } DSTRD;
    unsigned char wk2 [1];                                  /*                  */
    union  {                                                /* DSRD             */
        unsigned char BYTE;                                 /*  Byte Access     */
         struct  {                                          /*  Bit Access      */
            unsigned char  :4;                              /*   Reserved Bits  */
            unsigned char DSFD3 :1;                         /*   DSFD3          */
            unsigned char DSFD2 :1;                         /*   DSFD2          */
            unsigned char DSFD1 :1;                         /*   DSFD1          */
            unsigned char DSFD0 :1;                         /*   DSFD0          */
        } BIT;
    } DSRD;
    union  {                                                /* DCRD             */
        unsigned short WORD;                                /*  Word Access     */
         struct  {                                          /*  Bit Access      */
            unsigned short  :1;                             /*   Reserved Bits  */
            unsigned short TRGSELD3 :3;                     /*   TRGSELD3[2:0]  */
            unsigned short  :1;                             /*   Reserved Bits  */
            unsigned short TRGSELD2 :3;                     /*   TRGSELD2[2:0]  */
            unsigned short  :1;                             /*   Reserved Bits  */
            unsigned short TRGSELD1 :3;                     /*   TRGSELD1[2:0]  */
            unsigned short  :1;                             /*   Reserved Bits  */
            unsigned short TRGSELD0 :3;                     /*   TRGSELD0[2:0]  */
        } BIT;
    } DCRD;
    unsigned char wk3 [2];                                  /*                  */
    union  {                                                /* TSRD             */
        unsigned short WORD;                                /*  Word Access     */
         struct  {                                          /*  Bit Access      */
            unsigned char  :2;                              /*   Reserved Bits  */
            unsigned char OVF2D :1;                         /*   OVF2D          */
            unsigned char OVF1D :1;                         /*   OVF1D          */
            unsigned char UDFD3 :1;                         /*   UDFD3          */
            unsigned char UDFD2 :1;                         /*   UDFD2          */
            unsigned char UDFD1 :1;                         /*   UDFD1          */
            unsigned char UDFD0 :1;                         /*   UDFD0          */
            unsigned char CMFAD3 :1;                        /*   CMFAD3         */
            unsigned char CMFAD2 :1;                        /*   CMFAD2         */
            unsigned char CMFAD1 :1;                        /*   CMFAD1         */
            unsigned char CMFAD0 :1;                        /*   CMFAD0         */
            unsigned char CMFBD3 :1;                        /*   CMFBD3         */
            unsigned char CMFBD2 :1;                        /*   CMFBD2         */
            unsigned char CMFBD1 :1;                        /*   CMFBD1         */
            unsigned char CMFBD0 :1;                        /*   CMFBD0         */
        } BIT;
    } TSRD;
    union  {                                                /* TIERD            */
        unsigned short WORD;                                /*  Word Access     */
         struct  {                                          /*  Bit Access      */
            unsigned char  :2;                              /*   Reserved Bits  */
            unsigned char OVE2D :1;                         /*   OVE2D          */
            unsigned char OVE1D :1;                         /*   OVE1D          */
            unsigned char UDED3 :1;                         /*   UDED3          */
            unsigned char UDED2 :1;                         /*   UDED2          */
            unsigned char UDED1 :1;                         /*   UDED1          */
            unsigned char UDED0 :1;                         /*   UDED0          */
            unsigned char CMEAD3 :1;                        /*   CMEAD3         */
            unsigned char CMEAD2 :1;                        /*   CMEAD2         */
            unsigned char CMEAD1 :1;                        /*   CMEAD1         */
            unsigned char CMEAD0 :1;                        /*   CMEAD0         */
            unsigned char CMEBD3 :1;                        /*   CMEBD3         */
            unsigned char CMEBD2 :1;                        /*   CMEBD2         */
            unsigned char CMEBD1 :1;                        /*   CMEBD1         */
            unsigned char CMEBD0 :1;                        /*   CMEBD0         */
        } BIT;
    } TIERD;
    unsigned long OCRD [4];                                 /* OCRD             */
    unsigned long GRD [4];                                  /* GRD              */
    unsigned long DCNTD [4];                                /* DCNTD            */
} t_timerD_subblockB;

 struct st_timerD {                                         /* TIMER D          */
    union  {                                                /* TSTRD            */
        unsigned char BYTE;                                 /*  Byte Access     */
         struct  {                                          /*  Bit Access      */
            unsigned char  :4;                              /*   Reserved Bits  */
            unsigned char STRD3 :1;                         /*   STRD3          */
            unsigned char STRD2 :1;                         /*   STRD2          */
            unsigned char STRD1 :1;                         /*   STRD1          */
            unsigned char STRD0 :1;                         /*   STRD0          */
        } BIT;
    } TSTRD;
    unsigned char wk1 [31];                                 /*                  */
    t_timerD_subblockA SUBBLOCKA[4];                        /*                  */
    unsigned char wk2 [32];                                 /*                  */
    t_timerD_subblockB SUBBLOCKB[4];                        /*                  */
};

typedef  struct st_timerE_subblock {                        /*                  */
    union  {                                                /* TCRE             */
        unsigned char BYTE;                                 /*  Byte Access     */
         struct  {                                          /*  Bit Access      */
            unsigned char  :5;                              /*   Reserved Bits  */
            unsigned char CKSELE :3;                        /*   CKSELE[2:0]    */
        } BIT;
    } TCRE;
    union  {                                                /* TOCRE            */
        unsigned char BYTE;                                 /*  Byte Access     */
         struct  {                                          /*  Bit Access      */
            unsigned char  :4;                              /*   Reserved Bits  */
            unsigned char TONEE3 :1;                        /*   TONEE3         */
            unsigned char TONEE2 :1;                        /*   TONEE2         */
            unsigned char TONEE1 :1;                        /*   TONEE1         */
            unsigned char TONEE0 :1;                        /*   TONEE0         */
        } BIT;
    } TOCRE;
    union  {                                                /* TIERE            */
        unsigned char BYTE;                                 /*  Byte Access     */
         struct  {                                          /*  Bit Access      */
            unsigned char  :4;                              /*   Reserved Bits  */
            unsigned char CMEE3 :1;                         /*   CMEE3          */
            unsigned char CMEE2 :1;                         /*   CMEE2          */
            unsigned char CMEE1 :1;                         /*   CMEE1          */
            unsigned char CMEE0 :1;                         /*   CMEE0          */
        } BIT;
    } TIERE;
    union  {                                                /* RLDCRE           */
        unsigned char BYTE;                                 /*  Byte Access     */
         struct  {                                          /*  Bit Access      */
            unsigned char  :4;                              /*   Reserved Bits  */
            unsigned char RLDENE3 :1;                       /*   RLDENE3        */
            unsigned char RLDENE2 :1;                       /*   RLDENE2        */
            unsigned char RLDENE1 :1;                       /*   RLDENE1        */
            unsigned char RLDENE0 :1;                       /*   RLDENE0        */
        } BIT;
    } RLDCRE;
    union  {                                                /* TSRE             */
        unsigned char BYTE;                                 /*  Byte Access     */
         struct  {                                          /*  Bit Access      */
            unsigned char OVFE3 :1;                         /*   OVFE3          */
            unsigned char OVFE2 :1;                         /*   OVFE2          */
            unsigned char OVFE1 :1;                         /*   OVFE1          */
            unsigned char OVFE0 :1;                         /*   OVFE0          */
            unsigned char CMFE3 :1;                         /*   CMFE3          */
            unsigned char CMFE2 :1;                         /*   CMFE2          */
            unsigned char CMFE1 :1;                         /*   CMFE1          */
            unsigned char CMFE0 :1;                         /*   CMFE0          */
        } BIT;
    } TSRE;
    unsigned char wk1 [3];                                  /*                  */
    union  {                                                /* PSCRE            */
        unsigned char BYTE;                                 /*  Byte Access     */
         struct  {                                          /*  Bit Access      */
            unsigned char  :5;                              /*   Reserved Bits  */
            unsigned char PSCE :3;                          /*   PSCE[2:0]      */
        } BIT;
    } PSCRE;
    unsigned char wk2 [3];                                  /*                  */
    union  {                                                /* SSTRE            */
        unsigned char BYTE;                                 /*  Byte Access     */
         struct  {                                          /*  Bit Access      */
            unsigned char  :4;                              /*   Reserved Bits  */
            unsigned char SSTRE3 :1;                        /*   SSTRE3         */
            unsigned char SSTRE2 :1;                        /*   SSTRE2         */
            unsigned char SSTRE1 :1;                        /*   SSTRE1         */
            unsigned char SSTRE0 :1;                        /*   SSTRE0         */
        } BIT;
    } SSTRE;
    unsigned char wk3 [3];                                  /*                  */
    unsigned short CYLRE [4];                               /* CYLRE            */
    unsigned short DTRE [4];                                /* DTRE             */
    unsigned short CRLDE [4];                               /* CRLDE            */
    unsigned short DRLDE [4];                               /* DRLDE            */
    unsigned short TCNTE [4];                               /* TCNTE            */
    unsigned char wk4 [8];                                  /*                  */
} t_timerE_subblock;

 struct st_timerE {                                         /* TIMER E          */
    union  {                                                /* TSTRE            */
        unsigned char BYTE;                                 /*  Byte Access     */
         struct  {                                          /*  Bit Access      */
            unsigned char  :2;                              /*   Reserved Bits  */
            unsigned char STRE5 :1;                         /*   STRE5          */
            unsigned char STRE4 :1;                         /*   STRE4          */
            unsigned char STRE3 :1;                         /*   STRE3          */
            unsigned char STRE2 :1;                         /*   STRE2          */
            unsigned char STRE1 :1;                         /*   STRE1          */
            unsigned char STRE0 :1;                         /*   STRE0          */
        } BIT;
    } TSTRE;
    unsigned char wk1 [255];                                /*                  */
    t_timerE_subblock SUBBLOCK[6];                          /* Timer E Subblock */
};

typedef  struct st_timerF_subblock {                        /*                  */
    union  {                                                /* TCRF             */
        unsigned char BYTE;                                 /*  Byte Access     */
         struct  {                                          /*  Bit Access      */
            unsigned char CKSELF :3;                        /*   CKSELF[2:0]    */
            unsigned char MDF :3;                           /*   MDF[2:0]       */
            unsigned char EGSELF :2;                        /*   EGSELF[1:0]    */
        } BIT;
    } TCRF;
    union  {                                                /* TIERF            */
        unsigned char BYTE;                                 /*  Byte Access     */
         struct  {                                          /*  Bit Access      */
            unsigned char  :4;                              /*   Reserved Bits  */
            unsigned char OVECF :1;                         /*   OVECF          */
            unsigned char OVEBF :1;                         /*   OVEBF          */
            unsigned char OVEAF :1;                         /*   OVEAF          */
            unsigned char ICEF :1;                          /*   ICEF           */
        } BIT;
    } TIERF;
    unsigned char wk1 [1];                                  /*                  */
    union  {                                                /* TSRF             */
        unsigned char BYTE;                                 /*  Byte Access     */
         struct  {                                          /*  Bit Access      */
            unsigned char  :4;                              /*   Reserved Bits  */
            unsigned char OVFCF :1;                         /*   OVFCF          */
            unsigned char OVFBF :1;                         /*   OVFBF          */
            unsigned char OVFAF :1;                         /*   OVFAF          */
            unsigned char ICFF :1;                          /*   ICFF           */
        } BIT;
    } TSRF;
    unsigned long ECNTAF;                                   /* ECNTAF           */
    unsigned short ECNTBF;                                  /* ECNTBF           */
    unsigned short GRBF;                                    /* GRBF             */
    unsigned long ECNTCF;                                   /* ECNTCF           */
    unsigned long GRAF;                                     /* GRAF             */
    unsigned long CDRF;                                     /* CDRF             */
    unsigned long GRCF;                                     /* GRCF             */
    unsigned long GRDF;                                     /* GRDF (12-15 only)*/
} t_timerF_subblock;

 struct st_timerF {                                         /*                  */
    union  {                                                /* TSTRF            */
        unsigned long LONG;                                 /*  Long Access     */
         struct  {                                          /*  Bit Access      */
            unsigned char  :8;                              /*   Reserved Bits  */
            unsigned char  :4;                              /*   Reserved Bits  */
            unsigned char STRF19 :1;                        /*   STRF19         */
            unsigned char STRF18 :1;                        /*   STRF18         */
            unsigned char STRF17 :1;                        /*   STRF17         */
            unsigned char STRF16 :1;                        /*   STRF16         */
            unsigned char STRF15 :1;                        /*   STRF15         */
            unsigned char STRF14 :1;                        /*   STRF14         */
            unsigned char STRF13 :1;                        /*   STRF13         */
            unsigned char STRF12 :1;                        /*   STRF12         */
            unsigned char STRF11 :1;                        /*   STRF11         */
            unsigned char STRF10 :1;                        /*   STRF10         */
            unsigned char STRF9 :1;                         /*   STRF9          */
            unsigned char STRF8 :1;                         /*   STRF8          */
            unsigned char STRF7 :1;                         /*   STRF7          */
            unsigned char STRF6 :1;                         /*   STRF6          */
            unsigned char STRF5 :1;                         /*   STRF5          */
            unsigned char STRF4 :1;                         /*   STRF4          */
            unsigned char STRF3 :1;                         /*   STRF3          */
            unsigned char STRF2 :1;                         /*   STRF2          */
            unsigned char STRF1 :1;                         /*   STRF1          */
            unsigned char STRF0 :1;                         /*   STRF0          */
        } BIT;
    } TSTRF;
    union  {                                                /* NCCRF            */
        unsigned long LONG;                                 /*  Long Access     */
         struct  {                                          /*  Bit Access      */
            unsigned char  :8;                              /*   Reserved Bits  */
            unsigned char  :4;                              /*   Reserved Bits  */
            unsigned char NCEF19 :1;                        /*   NCEF19         */
            unsigned char NCEF18 :1;                        /*   NCEF18         */
            unsigned char NCEF17 :1;                        /*   NCEF17         */
            unsigned char NCEF16 :1;                        /*   NCEF16         */
            unsigned char NCEF15 :1;                        /*   NCEF15         */
            unsigned char NCEF14 :1;                        /*   NCEF14         */
            unsigned char NCEF13 :1;                        /*   NCEF13         */
            unsigned char NCEF12 :1;                        /*   NCEF12         */
            unsigned char NCEF11 :1;                        /*   NCEF11         */
            unsigned char NCEF10 :1;                        /*   NCEF10         */
            unsigned char NCEF9 :1;                         /*   NCEF9          */
            unsigned char NCEF8 :1;                         /*   NCEF8          */
            unsigned char NCEF7 :1;                         /*   NCEF7          */
            unsigned char NCEF6 :1;                         /*   NCEF6          */
            unsigned char NCEF5 :1;                         /*   NCEF5          */
            unsigned char NCEF4 :1;                         /*   NCEF4          */
            unsigned char NCEF3 :1;                         /*   NCEF3          */
            unsigned char NCEF2 :1;                         /*   NCEF2          */
            unsigned char NCEF1 :1;                         /*   NCEF1          */
            unsigned char NCEF0 :1;                         /*   NCEF0          */
        } BIT;
    } NCCRF;
    unsigned char wk1 [8];                                  /*                  */
    unsigned char NCNTFA0;                                  /* NCNTFA0          */
    unsigned char NCRFA0;                                   /* NCRFA0           */
    unsigned char NCNTFA1;                                  /* NCNTFA1          */
    unsigned char NCRFA1;                                   /* NCRFA1           */
    unsigned char NCNTFA2;                                  /* NCNTFA2          */
    unsigned char NCRFA2;                                   /* NCRFA2           */
    unsigned char NCNTFA3;                                  /* NCNTFA3          */
    unsigned char NCRFA3;                                   /* NCRFA3           */
    unsigned char NCNTFA4;                                  /* NCNTFA4          */
    unsigned char NCRFA4;                                   /* NCRFA4           */
    unsigned char NCNTFA5;                                  /* NCNTFA5          */
    unsigned char NCRFA5;                                   /* NCRFA5           */
    unsigned char NCNTFA6;                                  /* NCNTFA6          */
    unsigned char NCRFA6;                                   /* NCRFA6           */
    unsigned char NCNTFA7;                                  /* NCNTFA7          */
    unsigned char NCRFA7;                                   /* NCRFA7           */
    unsigned char NCNTFA8;                                  /* NCNTFA8          */
    unsigned char NCRFA8;                                   /* NCRFA8           */
    unsigned char NCNTFA9;                                  /* NCNTFA9          */
    unsigned char NCRFA9;                                   /* NCRFA9           */
    unsigned char NCNTFA10;                                 /* NCNTFA10         */
    unsigned char NCRFA10;                                  /* NCRFA10          */
    unsigned char NCNTFA11;                                 /* NCNTFA11         */
    unsigned char NCRFA11;                                  /* NCRFA11          */
    unsigned char NCNTFA12;                                 /* NCNTFA12         */
    unsigned char NCRFA12;                                  /* NCRFA12          */
    unsigned char NCNTFA13;                                 /* NCNTFA13         */
    unsigned char NCRFA13;                                  /* NCRFA13          */
    unsigned char NCNTFA14;                                 /* NCNTFA14         */
    unsigned char NCRFA14;                                  /* NCRFA14          */
    unsigned char NCNTFA15;                                 /* NCNTFA15         */
    unsigned char NCRFA15;                                  /* NCRFA15          */
    unsigned char NCNTFA16;                                 /* NCNTFA16         */
    unsigned char NCRFA16;                                  /* NCRFA16          */
    unsigned char NCNTFA17;                                 /* NCNTFA17         */
    unsigned char NCRFA17;                                  /* NCRFA17          */
    unsigned char NCNTFA18;                                 /* NCNTFA18         */
    unsigned char NCRFA18;                                  /* NCRFA18          */
    unsigned char NCNTFA19;                                 /* NCNTFA19         */
    unsigned char NCRFA19;                                  /* NCRFA19          */
    unsigned char wk2 [24];                                 /*                  */
    unsigned char NCNTFB0;                                  /* NCNTFB0          */
    unsigned char NCRFB0;                                   /* NCRFB0           */
    unsigned char NCNTFB1;                                  /* NCNTFB1          */
    unsigned char NCRFB1;                                   /* NCRFB1           */
    unsigned char NCNTFB2;                                  /* NCNTFB2          */
    unsigned char NCRFB2;                                   /* NCRFB2           */
    unsigned char wk3 [42];                                 /*                  */
    t_timerF_subblock SUBBLOCK[20];                         /* Timer F Subblock */
};

typedef  struct st_timerG_subblock {                        /*                  */
    union  {                                                /* TCRG             */
        unsigned char BYTE;                                 /*  Byte Access     */
         struct  {                                          /*  Bit Access      */
            unsigned char  :1;                              /*   Reserved Bits  */
            unsigned char CKSELG :3;                        /*   CKSELG[2:0]    */
            unsigned char  :2;                              /*   Reserved Bits  */
            unsigned char CMPOEG :1;                        /*   CMPOEG         */
            unsigned char CMEG :1;                          /*   CMEG           */
        } BIT;
    } TCRG;
    union  {                                                /* TSRG             */
        unsigned char BYTE;                                 /*  Byte Access     */
         struct  {                                          /*  Bit Access      */
            unsigned char  :6;                              /*   Reserved Bits  */
            unsigned char OVFG :1;                          /*   OVFG           */
            unsigned char CMFG :1;                          /*   CMFG           */
        } BIT;
    } TSRG;
    unsigned char wk1 [2];                                  /*                  */
    unsigned short TCNTG;                                   /* TCNTG            */
    unsigned short OCRG;                                    /* OCRG             */
    unsigned char wk2 [8];                                  /*                  */
} t_timerG_subblock;

 struct st_timerG {                                         /*                  */
    unsigned char wk [1];                                   /*                  */
    union  {                                                /* TSTRG            */
        unsigned char BYTE;                                 /*  Byte Access     */
         struct  {                                          /*  Bit Access      */
            unsigned char  :2;                              /*   Reserved Bits  */
            unsigned char STRG5 :1;                         /*   STRG5          */
            unsigned char STRG4 :1;                         /*   STRG4          */
            unsigned char STRG3 :1;                         /*   STRG3          */
            unsigned char STRG2 :1;                         /*   STRG2          */
            unsigned char STRG1 :1;                         /*   STRG1          */
            unsigned char STRG0 :1;                         /*   STRG0          */
        } BIT;
    } TSTRG;
    unsigned char wk1 [126];                                /*                  */
    t_timerG_subblock SUBBLOCK[6];                          /* Timer G Subblock */
};

 struct st_timerH {                                         /*                  */
    unsigned char wk [64];                                  /*                  */
    union  {                                                /* TCRH             */
        unsigned char BYTE;                                 /*  Byte Access     */
         struct  {                                          /*  Bit Access      */
            unsigned char  :1;                              /*   Reserved Bits  */
            unsigned char CKSELH :3;                        /*   CKSELH[2:0]    */
            unsigned char  :3;                              /*   Reserved Bits  */
            unsigned char CMEH :1;                          /*   CMEH           */
        } BIT;
    } TCRH;
    union  {                                                /* TSRH             */
        unsigned char BYTE;                                 /*  Byte Access     */
         struct  {                                          /*  Bit Access      */
            unsigned char  :5;                              /*   Reserved Bits  */
            unsigned char OVF2H :1;                         /*   OVF2H          */
            unsigned char OVF1H :1;                         /*   OVF1H          */
            unsigned char CMFH :1;                          /*   CMFH           */
        } BIT;
    } TSRH;
    unsigned char wk1 [2];                                  /*                  */
    unsigned short TCNT1H;                                  /* TCNT1H           */
    unsigned short OCR1H;                                   /* OCR1H            */
    unsigned long TCNT2H;                                   /* TCNT2H           */
};

typedef  struct st_timerJ_subblock {                        /*                  */
    union  {                                                /* TCRJ             */
        unsigned char BYTE;                                 /*  Byte Access     */
         struct  {                                          /*  Bit Access      */
            unsigned char  :1;                              /*   Reserved Bits  */
            unsigned char CKSELJ :3;                        /*   CKSELJ[2:0]    */
            unsigned char  :1;                              /*   Reserved Bits  */
            unsigned char NCEJ :1;                          /*   NCEJ           */
            unsigned char IOJ :2;                           /*   IOJ[1:0]       */
        } BIT;
    } TCRJ;
    union  {                                                /* FCRJ             */
        unsigned char BYTE;                                 /*  Byte Access     */
         struct  {                                          /*  Bit Access      */
            unsigned char FIFOENJ :1;                       /*   FIFOENJ        */
            unsigned char  :1;                              /*   Reserved Bits  */
            unsigned char FVCRENJ :1;                       /*   FVCRENJ        */
            unsigned char FRSTJ :1;                         /*   FRSTJ          */
            unsigned char  :2;                              /*   Reserved Bits  */
            unsigned char FDFTRGJ :2;                       /*   FDFTRGJ[1:0]   */
        } BIT;
    } FCRJ;
    union  {                                                /* TSRJ             */
        unsigned char BYTE;                                 /*  Byte Access     */
         struct  {                                          /*  Bit Access      */
            unsigned char  :3;                              /*   Reserved Bits  */
            unsigned char FVLDFJ :1;                        /*   FVLDFJ         */
            unsigned char CMFJ :1;                          /*   CMFJ           */
            unsigned char OVFJ :1;                          /*   OVFJ           */
            unsigned char FDOVFJ :1;                        /*   FDOVFJ         */
            unsigned char FDFFJ :1;                         /*   FDFFJ          */
        } BIT;
    } TSRJ;
    unsigned char wk1 [1];                                  /*                  */
    union  {                                                /* TIERJ            */
        unsigned char BYTE;                                 /*  Byte Access     */
         struct  {                                          /*  Bit Access      */
            unsigned char  :5;                              /*   Reserved Bits  */
            unsigned char OVEJ :1;                          /*   OVEJ           */
            unsigned char FDOVEJ :1;                        /*   FDOVEJ         */
            unsigned char FDFEJ :1;                         /*   FDFEJ          */
        } BIT;
    } TIERJ;
    union  {                                                /* FDNRJ            */
        unsigned char BYTE;                                 /*  Byte Access     */
         struct  {                                          /*  Bit Access      */
            unsigned char  :4;                              /*   Reserved Bits  */
            unsigned char FDNJ :4;                          /*   FDNJ[3:0]      */
        } BIT;
    } FDNRJ;
    unsigned char NCNTJ;                                    /* NCNTJ            */
    unsigned char NCRJ;                                     /* NCRJ             */
    unsigned short TCNTJ;                                   /* TCNTJ            */
    unsigned short OCRJ;                                    /* OCRJ             */
    unsigned short FIFOJ;                                   /* FIFOJ            */
    unsigned char wk2 [2];                                  /*                  */
} t_timerJ_subblock;

 struct st_timerJ {                                         /*                  */
    union  {                                                /* TSTRJ            */
        unsigned char BYTE;                                 /*  Byte Access     */
         struct  {                                          /*  Bit Access      */
            unsigned char  :6;                              /*   Reserved Bits  */
            unsigned char STRJ1 :1;                         /*   STRJ1          */
            unsigned char STRJ0 :1;                         /*   STRJ0          */
        } BIT;
    } TSTRJ;
    unsigned char wk1 [15];                                 /*                  */
    t_timerJ_subblock SUBBLOCK[2];                          /*                  */
};

 struct st_atuctrl {                                        /* struct ATU       */
    union  {                                                /* ATUENR           */
        unsigned short WORD;                                /*  Word Access     */
         struct  {                                          /*  Bit Access      */
            unsigned char  :6;                              /*   Reserved Bits  */
            unsigned char TJE :1;                           /*   TJE            */
            unsigned char THE :1;                           /*   THE            */
            unsigned char TGE :1;                           /*   TGE            */
            unsigned char TFE :1;                           /*   TFE            */
            unsigned char TEE :1;                           /*   TEE            */
            unsigned char TDE :1;                           /*   TDE            */
            unsigned char TCE :1;                           /*   TCE            */
            unsigned char TBE :1;                           /*   TBE            */
            unsigned char TAE :1;                           /*   TAE            */
            unsigned char PSCE :1;                          /*   PSCE           */
        } BIT;
    } ATUENR;
    union  {                                                /* CBCNT            */
        unsigned char BYTE;                                 /*  Byte Access     */
         struct  {                                          /*  Bit Access      */
            unsigned char  :2;                              /*   Reserved Bits  */
            unsigned char CB4EG :2;                         /*   CB4EG[1:0]     */
            unsigned char  :1;                              /*   Reserved Bits  */
            unsigned char CB5SEL :1;                        /*   CB5SEL         */
            unsigned char CB5EG :2;                         /*   CB5EG[1:0]     */
        } BIT;
    } CBCNT;
    union  {                                                /* NCMR             */
        unsigned char BYTE;                                 /*  Byte Access     */
         struct  {                                          /*  Bit Access      */
            unsigned char NCCSEL :1;                        /*   NCCSEL         */
            unsigned char  :3;                              /*   Reserved Bits  */
            unsigned char NCMJ :1;                          /*   NCMJ           */
            unsigned char NCMF :1;                          /*   NCMF           */
            unsigned char NCMC :1;                          /*   NCMC           */
            unsigned char NCMA :1;                          /*   NCMA           */
        } BIT;
    } NCMR;
    unsigned char wk1 [252];                                /*                  */
    union  {                                                /* PSCR0            */
        unsigned short WORD;                                /*  Word Access     */
         struct  {                                          /*  Bit Access      */
            unsigned short  :6;                             /*   Reserved Bits  */
            unsigned short PSC0 :10;                        /*   PSC0[9:0]      */
        } BIT;
    } PSCR0;
    union  {                                                /* PSCR1            */
        unsigned short WORD;                                /*  Word Access     */
         struct  {                                          /*  Bit Access      */
            unsigned short  :6;                             /*   Reserved Bits  */
            unsigned short PSC1 :10;                        /*   PSC1[9:0]      */
        } BIT;
    } PSCR1;
    union  {                                                /* PSCR2            */
        unsigned short WORD;                                /*  Word Access     */
         struct  {                                          /*  Bit Access      */
            unsigned short  :6;                             /*   Reserved Bits  */
            unsigned short PSC2 :10;                        /*   PSC2[9:0]      */
        } BIT;
    } PSCR2;
    union  {                                                /* PSCR3            */
        unsigned short WORD;                                /*  Word Access     */
         struct  {                                          /*  Bit Access      */
            unsigned short  :6;                             /*   Reserved Bits  */
            unsigned short PSC3 :10;                        /*   PSC3[9:0]      */
        } BIT;
    } PSCR3;
};

 struct st_wdt {                                            /* struct WDT       */
    union  {                                                /* WTCR             */
        unsigned short WORD;                                /*  Word Access     */
         struct  {                                          /*  Bit Access      */
            unsigned char TCRKEY :8;                        /*   TCRKEY[7:0]    */
            unsigned char  :1;                              /*   Reserved Bits  */
            unsigned char WTIT :1;                          /*   WT/IT          */
            unsigned char TME :1;                           /*   TME            */
            unsigned char  :2;                              /*   Reserved Bits  */
            unsigned char CKS :3;                           /*   CKS[2:0]       */
        } BIT;
    } WTCR;
    union  {                                                /* WTCNT            */
        unsigned short WORD;                                /*  Word Access     */
         struct  {                                          /*  Bit Access      */
            unsigned char TCNTKEY :8;                       /*   TCNTKEY[7:0]   */
            unsigned char TCNT :8;                          /*   TCNT[7:0]      */
        } BIT;
    } WTCNT;
    union  {                                                /* WTSR             */
        unsigned short WORD;                                /*  Word Access     */
         struct  {                                          /*  Bit Access      */
            unsigned char TSRKEY :8;                        /*   TSRKEY[7:0]    */
            unsigned char WOVF :1;                          /*   WOVF           */
            unsigned char  :3;                              /*   Reserved Bits  */
            unsigned char IOVF :1;                          /*   IOVF           */
            unsigned char  :3;                              /*   Reserved Bits  */
        } BIT;
    } WTSR;
    union  {                                                /* WRCR             */
        unsigned short WORD;                                /*  Word Access     */
         struct  {                                          /*  Bit Access      */
            unsigned char RCRKEY :8;                        /*   RCRKEY[7:0]    */
            unsigned char RSTE :1;                          /*   RSTE           */
            unsigned char  :7;                              /*   Reserved Bits  */
        } BIT;
    } WRCR;
};

typedef  struct st_CMT_Channel {                            /* struct CMT       */
    union  {                                                /* CMCR             */
        unsigned char BYTE;                                 /*  Byte Access     */
         struct  {                                          /*  Bit Access      */
            unsigned char  :1;                              /*   Reserved Bits  */
            unsigned char CMIE :1;                          /*   CMIE           */
            unsigned char  :4;                              /*   Reserved Bits  */
            unsigned char CKS :2;                           /*   CKS[1:0]       */
        } BIT;
    } CMCR;
    union  {                                                /* CMSR             */
        unsigned char BYTE;                                 /*  Byte Access     */
         struct  {                                          /*  Bit Access      */
            unsigned char  :7;                              /*   Reserved Bits  */
            unsigned char CMF :1;                           /*   CMF            */
        } BIT;
    } CMSR;
    unsigned short CMCNT;                                   /*  CMCNT           */
    unsigned short CMCOR;                                   /*  CMCOR           */
    unsigned char wk [10];                                  /*                  */
} t_CMT_Channel;

 struct st_cmt {                                            /* struct CMT       */
    union  {                                                /* CMSTR            */
        unsigned short WORD;                                /*  Word Access     */
         struct  {                                          /*  Bit Access      */
            unsigned short  :14;                            /*   Reserved Bits  */
            unsigned short STR1 :1;                         /*   STR1           */
            unsigned short STR0 :1;                         /*   STR0           */
        } BIT;
    } CMSTR;
    unsigned char wk1 [14];                                 /*                  */
    t_CMT_Channel Channel[2];                               /*                  */
};

 struct st_sci {                                            /* struct SCI       */
    union  {                                                /* SCSMR1           */
        unsigned char BYTE;                                 /*  Byte Access     */
         struct  {                                          /*  Bit Access      */
            unsigned char CA :1;                            /*   CA             */
            unsigned char CHR :1;                           /*   CHR            */
            unsigned char PE :1;                            /*   PE             */
            unsigned char OE :1;                            /*   OE             */
            unsigned char STOP :1;                          /*   STOP           */
            unsigned char  :1;                              /*   Reserved Bits  */
            unsigned char CKS :2;                           /*   CKS[1:0]       */
        } BIT;
    } SCSMR1;
    unsigned char wk1 [3];                                  /*                  */
    unsigned char SCBRR1;                                   /* SCBRR1           */
    unsigned char wk2 [3];                                  /*                  */
    union  {                                                /* SCSCR1           */
        unsigned char BYTE;                                 /*  Byte Access     */
         struct  {                                          /*  Bit Access      */
            unsigned char TIE :1;                           /*   TIE            */
            unsigned char RIE :1;                           /*   RIE            */
            unsigned char TE :1;                            /*   TE             */
            unsigned char RE :1;                            /*   RE             */
            unsigned char  :1;                              /*   Reserved Bits  */
            unsigned char TEIE :1;                          /*   TEIE           */
            unsigned char CKE1 :1;                          /*   CKE1           */
            unsigned char  :1;                              /*   Reserved Bits  */
        } BIT;
    } SCSCR1;
    unsigned char wk3 [3];                                  /*                  */
    unsigned char SCTDR1;                                   /* SCTDR1           */
    unsigned char wk4 [3];                                  /*                  */
    union  {                                                /* SCSSR1           */
        unsigned char BYTE;                                 /*  Byte Access     */
         struct  {                                          /*  Bit Access      */
            unsigned char TDRE :1;                          /*   TDRE           */
            unsigned char RDRF :1;                          /*   RDRF           */
            unsigned char ORER :1;                          /*   ORER           */
            unsigned char FER :1;                           /*   FER            */
            unsigned char PER :1;                           /*   PER            */
            unsigned char TEND :1;                          /*   TEND           */
            unsigned char  :2;                              /*   Reserved Bits  */
        } BIT;
    } SCSSR1;
    unsigned char wk5 [3];                                  /*                  */
    unsigned char SCRDR1;                                   /* SCRDR1           */
};

 struct st_rspi {                                           /* struct RSPI      */
    union  {                                                /* SPCR             */
        unsigned char BYTE;                                 /*  Byte Access     */
         struct  {                                          /*  Bit Access      */
            unsigned char SPRIE :1;                         /*   SPRIE          */
            unsigned char SPE :1;                           /*   SPE            */
            unsigned char SPTIE :1;                         /*   SPTIE          */
            unsigned char SPEIE :1;                         /*   SPEIE          */
            unsigned char MSTR :1;                          /*   MSTR           */
            unsigned char MODFEN :1;                        /*   MODFEN         */
            unsigned char  :2;                              /*   Reserved Bits  */
        } BIT;
    } SPCR;
    union  {                                                /* SSLP             */
        unsigned char BYTE;                                 /*  Byte Access     */
         struct  {                                          /*  Bit Access      */
            unsigned char SSL7P :1;                         /*   SSL7P          */
            unsigned char SSL6P :1;                         /*   SSL6P          */
            unsigned char SSL5P :1;                         /*   SSL5P          */
            unsigned char SSL4P :1;                         /*   SSL4P          */
            unsigned char SSL3P :1;                         /*   SSL3P          */
            unsigned char SSL2P :1;                         /*   SSL2P          */
            unsigned char SSL1P :1;                         /*   SSL1P          */
            unsigned char SSL0P :1;                         /*   SSL0P          */
        } BIT;
    } SSLP;
    union  {                                                /* SPPCR            */
        unsigned char BYTE;                                 /*  Byte Access     */
         struct  {                                          /*  Bit Access      */
            unsigned char  :2;                              /*   Reserved Bits  */
            unsigned char MOIFE :1;                         /*   MOIFE          */
            unsigned char MOIFV :1;                         /*   MOIFV          */
            unsigned char  :1;                              /*   Reserved Bits  */
            unsigned char SPOM :1;                          /*   SPOM           */
            unsigned char  :1;                              /*   Reserved Bits  */
            unsigned char SPLP :1;                          /*   SPLP           */
        } BIT;
    } SPPCR;
    union  {                                                /* SPSR             */
        unsigned char BYTE;                                 /*  Byte Access     */
         struct  {                                          /*  Bit Access      */
            unsigned char SPRF :1;                          /*   SPRF           */
            unsigned char  :1;                              /*   Reserved Bits  */
            unsigned char SPTEF :1;                         /*   SPTEF          */
            unsigned char  :2;                              /*   Reserved Bits  */
            unsigned char MODF :1;                          /*   MODF           */
            unsigned char  :1;                              /*   Reserved Bits  */
            unsigned char OVRF :1;                          /*   OVRF           */
        } BIT;
    } SPSR;
    unsigned short SPDR;                                    /*  SPDR            */
    unsigned char wk1 [2];                                  /*                  */
    union  {                                                /* SPSCR            */
        unsigned char BYTE;                                 /*  Byte Access     */
         struct  {                                          /*  Bit Access      */
            unsigned char  :5;                              /*   Reserved Bits  */
            unsigned char SPSLN :3;                         /*   SPSLN[2:0]     */
        } BIT;
    } SPSCR;
    union  {                                                /* SPSSR            */
        unsigned char BYTE;                                 /*  Byte Access     */
         struct  {                                          /*  Bit Access      */
            unsigned char  :1;                              /*   Reserved Bits  */
            unsigned char SPECM :3;                         /*   SPECM[2:0]     */
            unsigned char  :1;                              /*   Reserved Bits  */
            unsigned char SPCP :3;                          /*   SPCP[2:0]      */
        } BIT;
    } SPSSR;
    unsigned char SPBR;                                     /* SPBR             */
    unsigned char wk2 [1];                                  /*                  */
    union  {                                                /* SPCKD            */
        unsigned char BYTE;                                 /*  Byte Access     */
         struct  {                                          /*  Bit Access      */
            unsigned char  :5;                              /*   Reserved Bits  */
            unsigned char SCKDL :3;                         /*   SCKDL[2:0]     */
        } BIT;
    } SPCKD;
    union  {                                                /* SSLND            */
        unsigned char BYTE;                                 /*  Byte Access     */
         struct  {                                          /*  Bit Access      */
            unsigned char  :5;                              /*   Reserved Bits  */
            unsigned char SLNDL :3;                         /*   SLNDL[2:0]     */
        } BIT;
    } SSLND;
    union  {                                                /* SPND             */
        unsigned char BYTE;                                 /*  Byte Access     */
         struct  {                                          /*  Bit Access      */
            unsigned char  :5;                              /*   Reserved Bits  */
            unsigned char SPNDL :3;                         /*   SPNDL[2:0]     */
        } BIT;
    } SPND;
    unsigned char wk3 [1];                                  /*                  */
    union  {                                                /* SPCMD0           */
        unsigned short WORD;                                /*  Word Access     */
         struct  {                                          /*  Bit Access      */
            unsigned short SCKDEN :1;                       /*   SCKDEN         */
            unsigned short SLNDEN :1;                       /*   SLNDEN         */
            unsigned short SPNDEN :1;                       /*   SPNDEN         */
            unsigned short LSBF :1;                         /*   LSBF           */
            unsigned short SPB :4;                          /*   SPB[3:0]       */
            unsigned short SSLKP :1;                        /*   SSLKP          */
            unsigned short SSLA :3;                         /*   SSLA[2:0]      */
            unsigned short BRDV :2;                         /*   BRDV[1:0]      */
            unsigned short CPOL :1;                         /*   CPOL           */
            unsigned short CPHA :1;                         /*   CPHA           */
        } BIT;
    } SPCMD0;
    union  {                                                /* SPCMD1           */
        unsigned short WORD;                                /*  Word Access     */
         struct  {                                          /*  Bit Access      */
            unsigned short SCKDEN :1;                       /*   SCKDEN         */
            unsigned short SLNDEN :1;                       /*   SLNDEN         */
            unsigned short SPNDEN :1;                       /*   SPNDEN         */
            unsigned short LSBF :1;                         /*   LSBF           */
            unsigned short SPB :4;                          /*   SPB[3:0]       */
            unsigned short SSLKP :1;                        /*   SSLKP          */
            unsigned short SSLA :3;                         /*   SSLA[2:0]      */
            unsigned short BRDV :2;                         /*   BRDV[1:0]      */
            unsigned short CPOL :1;                         /*   CPOL           */
            unsigned short CPHA :1;                         /*   CPHA           */
        } BIT;
    } SPCMD1;
    union  {                                                /* SPCMD2           */
        unsigned short WORD;                                /*  Word Access     */
         struct  {                                          /*  Bit Access      */
            unsigned short SCKDEN :1;                       /*   SCKDEN         */
            unsigned short SLNDEN :1;                       /*   SLNDEN         */
            unsigned short SPNDEN :1;                       /*   SPNDEN         */
            unsigned short LSBF :1;                         /*   LSBF           */
            unsigned short SPB :4;                          /*   SPB[3:0]       */
            unsigned short SSLKP :1;                        /*   SSLKP          */
            unsigned short SSLA :3;                         /*   SSLA[2:0]      */
            unsigned short BRDV :2;                         /*   BRDV[1:0]      */
            unsigned short CPOL :1;                         /*   CPOL           */
            unsigned short CPHA :1;                         /*   CPHA           */
        } BIT;
    } SPCMD2;
    union  {                                                /* SPCMD3           */
        unsigned short WORD;                                /*  Word Access     */
         struct  {                                          /*  Bit Access      */
            unsigned short SCKDEN :1;                       /*   SCKDEN         */
            unsigned short SLNDEN :1;                       /*   SLNDEN         */
            unsigned short SPNDEN :1;                       /*   SPNDEN         */
            unsigned short LSBF :1;                         /*   LSBF           */
            unsigned short SPB :4;                          /*   SPB[3:0]       */
            unsigned short SSLKP :1;                        /*   SSLKP          */
            unsigned short SSLA :3;                         /*   SSLA[2:0]      */
            unsigned short BRDV :2;                         /*   BRDV[1:0]      */
            unsigned short CPOL :1;                         /*   CPOL           */
            unsigned short CPHA :1;                         /*   CPHA           */
        } BIT;
    } SPCMD3;
    union  {                                                /* SPCMD4           */
        unsigned short WORD;                                /*  Word Access     */
         struct  {                                          /*  Bit Access      */
            unsigned short SCKDEN :1;                       /*   SCKDEN         */
            unsigned short SLNDEN :1;                       /*   SLNDEN         */
            unsigned short SPNDEN :1;                       /*   SPNDEN         */
            unsigned short LSBF :1;                         /*   LSBF           */
            unsigned short SPB :4;                          /*   SPB[3:0]       */
            unsigned short SSLKP :1;                        /*   SSLKP          */
            unsigned short SSLA :3;                         /*   SSLA[2:0]      */
            unsigned short BRDV :2;                         /*   BRDV[1:0]      */
            unsigned short CPOL :1;                         /*   CPOL           */
            unsigned short CPHA :1;                         /*   CPHA           */
        } BIT;
    } SPCMD4;
    union  {                                                /* SPCMD5           */
        unsigned short WORD;                                /*  Word Access     */
         struct  {                                          /*  Bit Access      */
            unsigned short SCKDEN :1;                       /*   SCKDEN         */
            unsigned short SLNDEN :1;                       /*   SLNDEN         */
            unsigned short SPNDEN :1;                       /*   SPNDEN         */
            unsigned short LSBF :1;                         /*   LSBF           */
            unsigned short SPB :4;                          /*   SPB[3:0]       */
            unsigned short SSLKP :1;                        /*   SSLKP          */
            unsigned short SSLA :3;                         /*   SSLA[2:0]      */
            unsigned short BRDV :2;                         /*   BRDV[1:0]      */
            unsigned short CPOL :1;                         /*   CPOL           */
            unsigned short CPHA :1;                         /*   CPHA           */
        } BIT;
    } SPCMD5;
    union  {                                                /* SPCMD6           */
        unsigned short WORD;                                /*  Word Access     */
         struct  {                                          /*  Bit Access      */
            unsigned short SCKDEN :1;                       /*   SCKDEN         */
            unsigned short SLNDEN :1;                       /*   SLNDEN         */
            unsigned short SPNDEN :1;                       /*   SPNDEN         */
            unsigned short LSBF :1;                         /*   LSBF           */
            unsigned short SPB :4;                          /*   SPB[3:0]       */
            unsigned short SSLKP :1;                        /*   SSLKP          */
            unsigned short SSLA :3;                         /*   SSLA[2:0]      */
            unsigned short BRDV :2;                         /*   BRDV[1:0]      */
            unsigned short CPOL :1;                         /*   CPOL           */
            unsigned short CPHA :1;                         /*   CPHA           */
        } BIT;
    } SPCMD6;
    union  {                                                /* SPCMD7           */
        unsigned short WORD;                                /*  Word Access     */
         struct  {                                          /*  Bit Access      */
            unsigned short SCKDEN :1;                       /*   SCKDEN         */
            unsigned short SLNDEN :1;                       /*   SLNDEN         */
            unsigned short SPNDEN :1;                       /*   SPNDEN         */
            unsigned short LSBF :1;                         /*   LSBF           */
            unsigned short SPB :4;                          /*   SPB[3:0]       */
            unsigned short SSLKP :1;                        /*   SSLKP          */
            unsigned short SSLA :3;                         /*   SSLA[2:0]      */
            unsigned short BRDV :2;                         /*   BRDV[1:0]      */
            unsigned short CPOL :1;                         /*   CPOL           */
            unsigned short CPHA :1;                         /*   CPHA           */
        } BIT;
    } SPCMD7;
};

typedef  struct st_CAN_message_buffer {                     /*                  */
    union  {                                                /* CONTROL0         */
        unsigned long LONG;                                 /*  Long Access     */
         struct  {                                          /*  Bit Access      */
            unsigned long IDE :1;                           /*   IDE            */
            unsigned long RTR :1;                           /*   RTR            */
            unsigned long  :1;                              /*   Reserved Bits  */
            unsigned long STDID :11;                        /*   STDID[10:0]    */
            unsigned long EXTID :18;                        /*   EXTID[17:0]    */
        } BIT;
    } CONTROL0;
    union  {                                                /* LAFM             */
        unsigned long LONG;                                 /*  Long Access     */
         struct  {                                          /*  Bit Access      */
            unsigned long IDE_LAFM :1;                      /*   IDE_LAFM       */
            unsigned long  :2;                              /*   Reserved Bits  */
            unsigned long STDID_LAFM :11;                   /* STDID_LAFM[10:0] */
            unsigned long EXTID_LAFM :18;                   /* EXTID_LAFM[17:0] */
        } BIT;
    } LAFM;
    union  {                                                /* DATA             */
        unsigned long LONG [2];                             /*   Long Access    */
        unsigned short WORD [4];                            /*   Word Access    */
        unsigned char BYTE [8];                             /*   Byte Access    */
    } DATA;
    union  {                                                /* CONTROL1         */
        unsigned short WORD;                                /*  Word Access     */
         struct  {                                          /*  Bit Access      */
            unsigned char  :2;                              /*   Reserved Bits  */
            unsigned char NMC :1;                           /*   NMC            */
            unsigned char ATX :1;                           /*   ATX            */
            unsigned char DART :1;                          /*   DART           */
            unsigned char MBC :3;                           /*   MBC[2:0]       */
            unsigned char  :4;                              /*   Reserved Bits  */
            unsigned char DLC :4;                           /*   DLC[3:0]       */
        } BIT;
    } CONTROL1;
    unsigned short Timestamp;                               /* Timestamp        */
    unsigned short TTT;                                     /* TTT              */
    union  {                                                /* TTW              */
        unsigned short WORD;                                /*  Word Access     */
         struct  {                                          /*  Bit Access      */
            unsigned short TTW :2;                          /*   TTW[1:0]       */
            unsigned short Offset :6;                       /*   Offset[5:0]    */
            unsigned short  :5;                             /*   Reserved Bits  */
            unsigned short rep_factor :3;                   /*   rep_factor[2:0]*/
        } BIT;
    } TTW;
    unsigned char wk [8];                                   /*                  */
} t_CAN_message_buffer;

 struct st_rcan {                                           /* struct RCAN      */
    union  {                                                /* MCR              */
        unsigned short WORD;                                /*  Word Access     */
         struct  {                                          /*  Bit Access      */
            unsigned short MCR15 :1;                        /*   MCR15          */
            unsigned short MCR14 :1;                        /*   MCR14          */
            unsigned short  :3;                             /*   Reserved Bits  */
            unsigned short TST :3;                          /*   TST[2:0]       */
            unsigned short MCR7 :1;                         /*   MCR7           */
            unsigned short MCR6 :1;                         /*   MCR6           */
            unsigned short MCR5 :1;                         /*   MCR5           */
            unsigned short  :2;                             /*   Reserved Bits  */
            unsigned short MCR2 :1;                         /*   MCR2           */
            unsigned short MCR1 :1;                         /*   MCR1           */
            unsigned short MCR0 :1;                         /*   MCR0           */
        } BIT;
    } MCR;
    union  {                                                /* GSR              */
        unsigned short WORD;                                /*  Word Access     */
         struct  {                                          /*  Bit Access      */
            unsigned short  :10;                            /*   Reserved Bits  */
            unsigned short GSR5 :1;                         /*   GSR5           */
            unsigned short GSR4 :1;                         /*   GSR4           */
            unsigned short GSR3 :1;                         /*   GSR3           */
            unsigned short GSR2 :1;                         /*   GSR2           */
            unsigned short GSR1 :1;                         /*   GSR1           */
            unsigned short GSR0 :1;                         /*   GSR0           */
        } BIT;
    } GSR;
    union  {                                                /* BCR1             */
        unsigned short WORD;                                /*  Word Access     */
         struct  {                                          /*  Bit Access      */
            unsigned short TSG1 :4;                         /*   TSG1[3:0]      */
            unsigned short  :1;                             /*   Reserved Bits  */
            unsigned short TSG2 :3;                         /*   TSG2[2:0]      */
            unsigned short  :2;                             /*   Reserved Bits  */
            unsigned short SJW :2;                          /*   SJW[1:0]       */
            unsigned short  :3;                             /*   Reserved Bits  */
            unsigned short BSP :1;                          /*   BSP            */
        } BIT;
    } BCR1;
    union  {                                                /* BCR0             */
        unsigned short WORD;                                /*  Word Access     */
         struct  {                                          /*  Bit Access      */
            unsigned short  :8;                             /*   Reserved Bits  */
            unsigned short BRP :8;                          /*   BRP[7:0]       */
        } BIT;
    } BCR0;
    union  {                                                /* IRR              */
        unsigned short WORD;                                /*  Word Access     */
         struct  {                                          /*  Bit Access      */
            unsigned short IRR15 :1;                        /*   IRR15          */
            unsigned short IRR14 :1;                        /*   IRR14          */
            unsigned short IRR13 :1;                        /*   IRR13          */
            unsigned short IRR12 :1;                        /*   IRR12          */
            unsigned short IRR11 :1;                        /*   IRR11          */
            unsigned short IRR10 :1;                        /*   IRR10          */
            unsigned short IRR9 :1;                         /*   IRR9           */
            unsigned short IRR8 :1;                         /*   IRR8           */
            unsigned short IRR7 :1;                         /*   IRR7           */
            unsigned short IRR6 :1;                         /*   IRR6           */
            unsigned short IRR5 :1;                         /*   IRR5           */
            unsigned short IRR4 :1;                         /*   IRR4           */
            unsigned short IRR3 :1;                         /*   IRR3           */
            unsigned short IRR2 :1;                         /*   IRR2           */
            unsigned short IRR1 :1;                         /*   IRR1           */
            unsigned short IRR0 :1;                         /*   IRR0           */
        } BIT;
    } IRR;
    union  {                                                /* IMR              */
        unsigned short WORD;                                /*  Word Access     */
         struct  {                                          /*  Bit Access      */
            unsigned short IMR15 :1;                        /*   IMR15          */
            unsigned short IMR14 :1;                        /*   IMR14          */
            unsigned short IMR13 :1;                        /*   IMR13          */
            unsigned short IMR12 :1;                        /*   IMR12          */
            unsigned short IMR11 :1;                        /*   IMR11          */
            unsigned short IMR10 :1;                        /*   IMR10          */
            unsigned short IMR9 :1;                         /*   IMR9           */
            unsigned short IMR8 :1;                         /*   IMR8           */
            unsigned short IMR7 :1;                         /*   IMR7           */
            unsigned short IMR6 :1;                         /*   IMR6           */
            unsigned short IMR5 :1;                         /*   IMR5           */
            unsigned short IMR4 :1;                         /*   IMR4           */
            unsigned short IMR3 :1;                         /*   IMR3           */
            unsigned short IMR2 :1;                         /*   IMR2           */
            unsigned short IMR1 :1;                         /*   IMR1           */
            unsigned short IMR0 :1;                         /*   IMR0           */
        } BIT;
    } IMR;
    union  {                                                /* TEC_REC          */
        unsigned short WORD;                                /*  Word Access     */
         struct  {                                          /*  Bit Access      */
            unsigned char TEC7 :1;                          /*   TEC7           */
            unsigned char TEC6 :1;                          /*   TEC6           */
            unsigned char TEC5 :1;                          /*   TEC5           */
            unsigned char TEC4 :1;                          /*   TEC4           */
            unsigned char TEC3 :1;                          /*   TEC3           */
            unsigned char TEC2 :1;                          /*   TEC2           */
            unsigned char TEC1 :1;                          /*   TEC1           */
            unsigned char TEC0 :1;                          /*   TEC0           */
            unsigned char REC7 :1;                          /*   REC7           */
            unsigned char REC6 :1;                          /*   REC6           */
            unsigned char REC5 :1;                          /*   REC5           */
            unsigned char REC4 :1;                          /*   REC4           */
            unsigned char REC3 :1;                          /*   REC3           */
            unsigned char REC2 :1;                          /*   REC2           */
            unsigned char REC1 :1;                          /*   REC1           */
            unsigned char REC0 :1;                          /*   REC0           */
        } BIT;
    } TEC_REC;
    unsigned char wk1 [18];                                 /*                  */
    union  {                                                /* TXPR10           */
        unsigned long LONG;                                 /*  Long Access     */
         struct  {                                          /*  Bit Access      */
            unsigned long TXPR1_15 :1;                      /*   TXPR1_15       */
            unsigned long TXPR1_14 :1;                      /*   TXPR1_14       */
            unsigned long TXPR1_13 :1;                      /*   TXPR1_13       */
            unsigned long TXPR1_12 :1;                      /*   TXPR1_12       */
            unsigned long TXPR1_11 :1;                      /*   TXPR1_11       */
            unsigned long TXPR1_10 :1;                      /*   TXPR1_10       */
            unsigned long TXPR1_9 :1;                       /*   TXPR1_9        */
            unsigned long TXPR1_8 :1;                       /*   TXPR1_8        */
            unsigned long TXPR1_7 :1;                       /*   TXPR1_7        */
            unsigned long TXPR1_6 :1;                       /*   TXPR1_6        */
            unsigned long TXPR1_5 :1;                       /*   TXPR1_5        */
            unsigned long TXPR1_4 :1;                       /*   TXPR1_4        */
            unsigned long TXPR1_3 :1;                       /*   TXPR1_3        */
            unsigned long TXPR1_2 :1;                       /*   TXPR1_2        */
            unsigned long TXPR1_1 :1;                       /*   TXPR1_1        */
            unsigned long TXPR1_0 :1;                       /*   TXPR1_0        */
            unsigned long TXPR0_15 :1;                      /*   TXPR0_15       */
            unsigned long TXPR0_14 :1;                      /*   TXPR0_14       */
            unsigned long TXPR0_13 :1;                      /*   TXPR0_13       */
            unsigned long TXPR0_12 :1;                      /*   TXPR0_12       */
            unsigned long TXPR0_11 :1;                      /*   TXPR0_11       */
            unsigned long TXPR0_10 :1;                      /*   TXPR0_10       */
            unsigned long TXPR0_9 :1;                       /*   TXPR0_9        */
            unsigned long TXPR0_8 :1;                       /*   TXPR0_8        */
            unsigned long TXPR0_7 :1;                       /*   TXPR0_7        */
            unsigned long TXPR0_6 :1;                       /*   TXPR0_6        */
            unsigned long TXPR0_5 :1;                       /*   TXPR0_5        */
            unsigned long TXPR0_4 :1;                       /*   TXPR0_4        */
            unsigned long TXPR0_3 :1;                       /*   TXPR0_3        */
            unsigned long TXPR0_2 :1;                       /*   TXPR0_2        */
            unsigned long TXPR0_1 :1;                       /*   TXPR0_1        */
            unsigned long  :1;                              /*   Reserved Bits  */
        } BIT;
    } TXPR;
    unsigned char wk2 [4];                                  /*                  */
    union  {                                                /* TXCR10           */
        unsigned long LONG;                                 /*  Long Access     */
         struct  {                                          /*  Bit Access      */
            unsigned long TXCR1_15 :1;                      /*   TXCR1_15       */
            unsigned long TXCR1_14 :1;                      /*   TXCR1_14       */
            unsigned long TXCR1_13 :1;                      /*   TXCR1_13       */
            unsigned long TXCR1_12 :1;                      /*   TXCR1_12       */
            unsigned long TXCR1_11 :1;                      /*   TXCR1_11       */
            unsigned long TXCR1_10 :1;                      /*   TXCR1_10       */
            unsigned long TXCR1_9 :1;                       /*   TXCR1_9        */
            unsigned long TXCR1_8 :1;                       /*   TXCR1_8        */
            unsigned long TXCR1_7 :1;                       /*   TXCR1_7        */
            unsigned long TXCR1_6 :1;                       /*   TXCR1_6        */
            unsigned long TXCR1_5 :1;                       /*   TXCR1_5        */
            unsigned long TXCR1_4 :1;                       /*   TXCR1_4        */
            unsigned long TXCR1_3 :1;                       /*   TXCR1_3        */
            unsigned long TXCR1_2 :1;                       /*   TXCR1_2        */
            unsigned long TXCR1_1 :1;                       /*   TXCR1_1        */
            unsigned long TXCR1_0 :1;                       /*   TXCR1_0        */
            unsigned long TXCR0_15 :1;                      /*   TXCR0_15       */
            unsigned long TXCR0_14 :1;                      /*   TXCR0_14       */
            unsigned long TXCR0_13 :1;                      /*   TXCR0_13       */
            unsigned long TXCR0_12 :1;                      /*   TXCR0_12       */
            unsigned long TXCR0_11 :1;                      /*   TXCR0_11       */
            unsigned long TXCR0_10 :1;                      /*   TXCR0_10       */
            unsigned long TXCR0_9 :1;                       /*   TXCR0_9        */
            unsigned long TXCR0_8 :1;                       /*   TXCR0_8        */
            unsigned long TXCR0_7 :1;                       /*   TXCR0_7        */
            unsigned long TXCR0_6 :1;                       /*   TXCR0_6        */
            unsigned long TXCR0_5 :1;                       /*   TXCR0_5        */
            unsigned long TXCR0_4 :1;                       /*   TXCR0_4        */
            unsigned long TXCR0_3 :1;                       /*   TXCR0_3        */
            unsigned long TXCR0_2 :1;                       /*   TXCR0_2        */
            unsigned long TXCR0_1 :1;                       /*   TXCR0_1        */
            unsigned long  :1;                              /*   Reserved Bits  */
        } BIT;
         struct  {                                          /*  Word Access     */
            unsigned short TXCR1;                           /*   TXCR1          */
            unsigned short TXCR0;                           /*   TXCR0          */
        } WORD;
    } TXCR;
    unsigned char wk3 [4];                                  /*                  */
    union  {                                                /* TXACK10          */
        unsigned long LONG;                                 /*  Long Access     */
         struct  {                                          /*  Bit Access      */
            unsigned long TXACK1_15 :1;                     /*   TXACK1_15      */
            unsigned long TXACK1_14 :1;                     /*   TXACK1_14      */
            unsigned long TXACK1_13 :1;                     /*   TXACK1_13      */
            unsigned long TXACK1_12 :1;                     /*   TXACK1_12      */
            unsigned long TXACK1_11 :1;                     /*   TXACK1_11      */
            unsigned long TXACK1_10 :1;                     /*   TXACK1_10      */
            unsigned long TXACK1_9 :1;                      /*   TXACK1_9       */
            unsigned long TXACK1_8 :1;                      /*   TXACK1_8       */
            unsigned long TXACK1_7 :1;                      /*   TXACK1_7       */
            unsigned long TXACK1_6 :1;                      /*   TXACK1_6       */
            unsigned long TXACK1_5 :1;                      /*   TXACK1_5       */
            unsigned long TXACK1_4 :1;                      /*   TXACK1_4       */
            unsigned long TXACK1_3 :1;                      /*   TXACK1_3       */
            unsigned long TXACK1_2 :1;                      /*   TXACK1_2       */
            unsigned long TXACK1_1 :1;                      /*   TXACK1_1       */
            unsigned long TXACK1_0 :1;                      /*   TXACK1_0       */
            unsigned long TXACK0_15 :1;                     /*   TXACK0_15      */
            unsigned long TXACK0_14 :1;                     /*   TXACK0_14      */
            unsigned long TXACK0_13 :1;                     /*   TXACK0_13      */
            unsigned long TXACK0_12 :1;                     /*   TXACK0_12      */
            unsigned long TXACK0_11 :1;                     /*   TXACK0_11      */
            unsigned long TXACK0_10 :1;                     /*   TXACK0_10      */
            unsigned long TXACK0_9 :1;                      /*   TXACK0_9       */
            unsigned long TXACK0_8 :1;                      /*   TXACK0_8       */
            unsigned long TXACK0_7 :1;                      /*   TXACK0_7       */
            unsigned long TXACK0_6 :1;                      /*   TXACK0_6       */
            unsigned long TXACK0_5 :1;                      /*   TXACK0_5       */
            unsigned long TXACK0_4 :1;                      /*   TXACK0_4       */
            unsigned long TXACK0_3 :1;                      /*   TXACK0_3       */
            unsigned long TXACK0_2 :1;                      /*   TXACK0_2       */
            unsigned long TXACK0_1 :1;                      /*   TXACK0_1       */
            unsigned long  :1;                              /*   Reserved Bits  */
        } BIT;
         struct  {                                          /*  Word Access     */
            unsigned short TXACK1;                          /*   TXACK1         */
            unsigned short TXACK0;                          /*   TXACK0         */
        } WORD;
    } TXACK;
    unsigned char wk4 [4];                                  /*                  */
    union  {                                                /* ABACK10          */
        unsigned long LONG;                                 /*  Long Access     */
         struct  {                                          /*  Bit Access      */
            unsigned long ABACK1_15 :1;                     /*   ABACK1_15      */
            unsigned long ABACK1_14 :1;                     /*   ABACK1_14      */
            unsigned long ABACK1_13 :1;                     /*   ABACK1_13      */
            unsigned long ABACK1_12 :1;                     /*   ABACK1_12      */
            unsigned long ABACK1_11 :1;                     /*   ABACK1_11      */
            unsigned long ABACK1_10 :1;                     /*   ABACK1_10      */
            unsigned long ABACK1_9 :1;                      /*   ABACK1_9       */
            unsigned long ABACK1_8 :1;                      /*   ABACK1_8       */
            unsigned long ABACK1_7 :1;                      /*   ABACK1_7       */
            unsigned long ABACK1_6 :1;                      /*   ABACK1_6       */
            unsigned long ABACK1_5 :1;                      /*   ABACK1_5       */
            unsigned long ABACK1_4 :1;                      /*   ABACK1_4       */
            unsigned long ABACK1_3 :1;                      /*   ABACK1_3       */
            unsigned long ABACK1_2 :1;                      /*   ABACK1_2       */
            unsigned long ABACK1_1 :1;                      /*   ABACK1_1       */
            unsigned long ABACK1_0 :1;                      /*   ABACK1_0       */
            unsigned long ABACK0_15 :1;                     /*   ABACK0_15      */
            unsigned long ABACK0_14 :1;                     /*   ABACK0_14      */
            unsigned long ABACK0_13 :1;                     /*   ABACK0_13      */
            unsigned long ABACK0_12 :1;                     /*   ABACK0_12      */
            unsigned long ABACK0_11 :1;                     /*   ABACK0_11      */
            unsigned long ABACK0_10 :1;                     /*   ABACK0_10      */
            unsigned long ABACK0_9 :1;                      /*   ABACK0_9       */
            unsigned long ABACK0_8 :1;                      /*   ABACK0_8       */
            unsigned long ABACK0_7 :1;                      /*   ABACK0_7       */
            unsigned long ABACK0_6 :1;                      /*   ABACK0_6       */
            unsigned long ABACK0_5 :1;                      /*   ABACK0_5       */
            unsigned long ABACK0_4 :1;                      /*   ABACK0_4       */
            unsigned long ABACK0_3 :1;                      /*   ABACK0_3       */
            unsigned long ABACK0_2 :1;                      /*   ABACK0_2       */
            unsigned long ABACK0_1 :1;                      /*   ABACK0_1       */
            unsigned long  :1;                              /*   Reserved Bits  */
        } BIT;
         struct  {                                          /*  Word Access     */
            unsigned short ABACK1;                          /*   ABACK1         */
            unsigned short ABACK0;                          /*   ABACK0         */
        } WORD;
    } ABACK;
    unsigned char wk5 [4];                                  /*                  */
    union  {                                                /* RXPR10           */
        unsigned long LONG;                                 /*  Long Access     */
         struct  {                                          /*  Bit Access      */
            unsigned long RXPR1_15 :1;                      /*   RXPR1_15       */
            unsigned long RXPR1_14 :1;                      /*   RXPR1_14       */
            unsigned long RXPR1_13 :1;                      /*   RXPR1_13       */
            unsigned long RXPR1_12 :1;                      /*   RXPR1_12       */
            unsigned long RXPR1_11 :1;                      /*   RXPR1_11       */
            unsigned long RXPR1_10 :1;                      /*   RXPR1_10       */
            unsigned long RXPR1_9 :1;                       /*   RXPR1_9        */
            unsigned long RXPR1_8 :1;                       /*   RXPR1_8        */
            unsigned long RXPR1_7 :1;                       /*   RXPR1_7        */
            unsigned long RXPR1_6 :1;                       /*   RXPR1_6        */
            unsigned long RXPR1_5 :1;                       /*   RXPR1_5        */
            unsigned long RXPR1_4 :1;                       /*   RXPR1_4        */
            unsigned long RXPR1_3 :1;                       /*   RXPR1_3        */
            unsigned long RXPR1_2 :1;                       /*   RXPR1_2        */
            unsigned long RXPR1_1 :1;                       /*   RXPR1_1        */
            unsigned long RXPR1_0 :1;                       /*   RXPR1_0        */
            unsigned long RXPR0_15 :1;                      /*   RXPR0_15       */
            unsigned long RXPR0_14 :1;                      /*   RXPR0_14       */
            unsigned long RXPR0_13 :1;                      /*   RXPR0_13       */
            unsigned long RXPR0_12 :1;                      /*   RXPR0_12       */
            unsigned long RXPR0_11 :1;                      /*   RXPR0_11       */
            unsigned long RXPR0_10 :1;                      /*   RXPR0_10       */
            unsigned long RXPR0_9 :1;                       /*   RXPR0_9        */
            unsigned long RXPR0_8 :1;                       /*   RXPR0_8        */
            unsigned long RXPR0_7 :1;                       /*   RXPR0_7        */
            unsigned long RXPR0_6 :1;                       /*   RXPR0_6        */
            unsigned long RXPR0_5 :1;                       /*   RXPR0_5        */
            unsigned long RXPR0_4 :1;                       /*   RXPR0_4        */
            unsigned long RXPR0_3 :1;                       /*   RXPR0_3        */
            unsigned long RXPR0_2 :1;                       /*   RXPR0_2        */
            unsigned long RXPR0_1 :1;                       /*   RXPR0_1        */
            unsigned long RXPR0_0 :1;                       /*   RXPR0_0        */
        } BIT;
         struct  {                                          /*  Word Access     */
            unsigned short RXPR1;                           /*   RXPR1          */
            unsigned short RXPR0;                           /*   RXPR0          */
        } WORD;
    } RXPR;
    unsigned char wk6 [4];                                  /*                  */
    union  {                                                /* RFPR10           */
        unsigned long LONG;                                 /*  Long Access     */
         struct  {                                          /*  Bit Access      */
            unsigned long RFPR1_15 :1;                      /*   RFPR1_15       */
            unsigned long RFPR1_14 :1;                      /*   RFPR1_14       */
            unsigned long RFPR1_13 :1;                      /*   RFPR1_13       */
            unsigned long RFPR1_12 :1;                      /*   RFPR1_12       */
            unsigned long RFPR1_11 :1;                      /*   RFPR1_11       */
            unsigned long RFPR1_10 :1;                      /*   RFPR1_10       */
            unsigned long RFPR1_9 :1;                       /*   RFPR1_9        */
            unsigned long RFPR1_8 :1;                       /*   RFPR1_8        */
            unsigned long RFPR1_7 :1;                       /*   RFPR1_7        */
            unsigned long RFPR1_6 :1;                       /*   RFPR1_6        */
            unsigned long RFPR1_5 :1;                       /*   RFPR1_5        */
            unsigned long RFPR1_4 :1;                       /*   RFPR1_4        */
            unsigned long RFPR1_3 :1;                       /*   RFPR1_3        */
            unsigned long RFPR1_2 :1;                       /*   RFPR1_2        */
            unsigned long RFPR1_1 :1;                       /*   RFPR1_1        */
            unsigned long RFPR1_0 :1;                       /*   RFPR1_0        */
            unsigned long RFPR0_15 :1;                      /*   RFPR0_15       */
            unsigned long RFPR0_14 :1;                      /*   RFPR0_14       */
            unsigned long RFPR0_13 :1;                      /*   RFPR0_13       */
            unsigned long RFPR0_12 :1;                      /*   RFPR0_12       */
            unsigned long RFPR0_11 :1;                      /*   RFPR0_11       */
            unsigned long RFPR0_10 :1;                      /*   RFPR0_10       */
            unsigned long RFPR0_9 :1;                       /*   RFPR0_9        */
            unsigned long RFPR0_8 :1;                       /*   RFPR0_8        */
            unsigned long RFPR0_7 :1;                       /*   RFPR0_7        */
            unsigned long RFPR0_6 :1;                       /*   RFPR0_6        */
            unsigned long RFPR0_5 :1;                       /*   RFPR0_5        */
            unsigned long RFPR0_4 :1;                       /*   RFPR0_4        */
            unsigned long RFPR0_3 :1;                       /*   RFPR0_3        */
            unsigned long RFPR0_2 :1;                       /*   RFPR0_2        */
            unsigned long RFPR0_1 :1;                       /*   RFPR0_1        */
            unsigned long RFPR0_0 :1;                       /*   RFPR0_0        */
        } BIT;
         struct  {                                          /*  Word Access     */
            unsigned short RFPR1;                           /*   RFPR1          */
            unsigned short RFPR0;                           /*   RFPR0          */
        } WORD;
    } RFPR;
    unsigned char wk7 [4];                                  /*                  */
    union  {                                                /* MBIMR10          */
        unsigned long LONG;                                 /*  Long Access     */
         struct  {                                          /*  Bit Access      */
            unsigned long MBIMR1_15 :1;                     /*   MBIMR1_15      */
            unsigned long MBIMR1_14 :1;                     /*   MBIMR1_14      */
            unsigned long MBIMR1_13 :1;                     /*   MBIMR1_13      */
            unsigned long MBIMR1_12 :1;                     /*   MBIMR1_12      */
            unsigned long MBIMR1_11 :1;                     /*   MBIMR1_11      */
            unsigned long MBIMR1_10 :1;                     /*   MBIMR1_10      */
            unsigned long MBIMR1_9 :1;                      /*   MBIMR1_9       */
            unsigned long MBIMR1_8 :1;                      /*   MBIMR1_8       */
            unsigned long MBIMR1_7 :1;                      /*   MBIMR1_7       */
            unsigned long MBIMR1_6 :1;                      /*   MBIMR1_6       */
            unsigned long MBIMR1_5 :1;                      /*   MBIMR1_5       */
            unsigned long MBIMR1_4 :1;                      /*   MBIMR1_4       */
            unsigned long MBIMR1_3 :1;                      /*   MBIMR1_3       */
            unsigned long MBIMR1_2 :1;                      /*   MBIMR1_2       */
            unsigned long MBIMR1_1 :1;                      /*   MBIMR1_1       */
            unsigned long MBIMR1_0 :1;                      /*   MBIMR1_0       */
            unsigned long MBIMR0_15 :1;                     /*   MBIMR0_15      */
            unsigned long MBIMR0_14 :1;                     /*   MBIMR0_14      */
            unsigned long MBIMR0_13 :1;                     /*   MBIMR0_13      */
            unsigned long MBIMR0_12 :1;                     /*   MBIMR0_12      */
            unsigned long MBIMR0_11 :1;                     /*   MBIMR0_11      */
            unsigned long MBIMR0_10 :1;                     /*   MBIMR0_10      */
            unsigned long MBIMR0_9 :1;                      /*   MBIMR0_9       */
            unsigned long MBIMR0_8 :1;                      /*   MBIMR0_8       */
            unsigned long MBIMR0_7 :1;                      /*   MBIMR0_7       */
            unsigned long MBIMR0_6 :1;                      /*   MBIMR0_6       */
            unsigned long MBIMR0_5 :1;                      /*   MBIMR0_5       */
            unsigned long MBIMR0_4 :1;                      /*   MBIMR0_4       */
            unsigned long MBIMR0_3 :1;                      /*   MBIMR0_3       */
            unsigned long MBIMR0_2 :1;                      /*   MBIMR0_2       */
            unsigned long MBIMR0_1 :1;                      /*   MBIMR0_1       */
            unsigned long MBIMR0_0 :1;                      /*   MBIMR0_0       */
        } BIT;
         struct  {                                          /*  Word Access     */
            unsigned short MBIMR1;                          /*   MBIMR1         */
            unsigned short MBIMR0;                          /*   MBIMR0         */
        } WORD;
    } MBIMR;
    unsigned char wk8 [4];                                  /*                  */
    union  {                                                /* UMSR             */
        unsigned long LONG;                                 /*  Long Access     */
         struct  {                                          /*  Bit Access      */
            unsigned long UMSR1_15 :1;                      /*   UMSR1_15       */
            unsigned long UMSR1_14 :1;                      /*   UMSR1_14       */
            unsigned long UMSR1_13 :1;                      /*   UMSR1_13       */
            unsigned long UMSR1_12 :1;                      /*   UMSR1_12       */
            unsigned long UMSR1_11 :1;                      /*   UMSR1_11       */
            unsigned long UMSR1_10 :1;                      /*   UMSR1_10       */
            unsigned long UMSR1_9 :1;                       /*   UMSR1_9        */
            unsigned long UMSR1_8 :1;                       /*   UMSR1_8        */
            unsigned long UMSR1_7 :1;                       /*   UMSR1_7        */
            unsigned long UMSR1_6 :1;                       /*   UMSR1_6        */
            unsigned long UMSR1_5 :1;                       /*   UMSR1_5        */
            unsigned long UMSR1_4 :1;                       /*   UMSR1_4        */
            unsigned long UMSR1_3 :1;                       /*   UMSR1_3        */
            unsigned long UMSR1_2 :1;                       /*   UMSR1_2        */
            unsigned long UMSR1_1 :1;                       /*   UMSR1_1        */
            unsigned long UMSR1_0 :1;                       /*   UMSR1_0        */
            unsigned long UMSR0_15 :1;                      /*   UMSR0_15       */
            unsigned long UMSR0_14 :1;                      /*   UMSR0_14       */
            unsigned long UMSR0_13 :1;                      /*   UMSR0_13       */
            unsigned long UMSR0_12 :1;                      /*   UMSR0_12       */
            unsigned long UMSR0_11 :1;                      /*   UMSR0_11       */
            unsigned long UMSR0_10 :1;                      /*   UMSR0_10       */
            unsigned long UMSR0_9 :1;                       /*   UMSR0_9        */
            unsigned long UMSR0_8 :1;                       /*   UMSR0_8        */
            unsigned long UMSR0_7 :1;                       /*   UMSR0_7        */
            unsigned long UMSR0_6 :1;                       /*   UMSR0_6        */
            unsigned long UMSR0_5 :1;                       /*   UMSR0_5        */
            unsigned long UMSR0_4 :1;                       /*   UMSR0_4        */
            unsigned long UMSR0_3 :1;                       /*   UMSR0_3        */
            unsigned long UMSR0_2 :1;                       /*   UMSR0_2        */
            unsigned long UMSR0_1 :1;                       /*   UMSR0_1        */
            unsigned long UMSR0_0 :1;                       /*   UMSR0_0        */
        } BIT;
         struct  {                                          /*  Word Access     */
            unsigned short UMSR1;                           /* UMSR1            */
            unsigned short UMSR0;                           /* UMSR0            */
        } WORD;
    } UMSR;
    unsigned char wk9 [36];                                 /*                  */
    union  {                                                /* TTCR0            */
        unsigned short WORD;                                /*  Word Access     */
         struct  {                                          /*  Bit Access      */
            unsigned short TCR15 :1;                        /*   TCR15          */
            unsigned short TCR14 :1;                        /*   TCR14          */
            unsigned short TCR13 :1;                        /*   TCR13          */
            unsigned short TCR12 :1;                        /*   TCR12          */
            unsigned short TCR11 :1;                        /*   TCR11          */
            unsigned short TCR10 :1;                        /*   TCR10          */
            unsigned short  :3;                             /*   Reserved Bits  */
            unsigned short TCR6 :1;                         /*   TCR6           */
            unsigned short TPSC5 :1;                        /*   TPSC5          */
            unsigned short TPSC4 :1;                        /*   TPSC4          */
            unsigned short TPSC3 :1;                        /*   TPSC3          */
            unsigned short TPSC2 :1;                        /*   TPSC2          */
            unsigned short TPSC1 :1;                        /*   TPSC1          */
            unsigned short TPSC0 :1;                        /*   TPSC0          */
        } BIT;
    } TTCR0;
    unsigned char wk10 [2];                                 /*                  */
    union  {                                                /* CMAX_TEW         */
        unsigned short WORD;                                /*  Word Access     */
         struct  {                                          /*  Bit Access      */
            unsigned short  :5;                             /*   Reserved Bits  */
            unsigned short CMAX :3;                         /*   CMAX[2:0]      */
            unsigned short  :4;                             /*   Reserved Bits  */
            unsigned short TEW :4;                          /*   TEW[3:0]       */
        } BIT;
    } CMAX_TEW;
    union  {                                                /* RFTROFF          */
        unsigned short WORD;                                /*  Word Access     */
         struct  {                                          /*  Bit Access      */
            unsigned short RFTROFF :8;                      /*   RFTROFF[7:0]   */
            unsigned short  :8;                             /*   Reserved Bits  */
        } BIT;
    } RFTROFF;
    union  {                                                /* TSR              */
        unsigned short WORD;                                /*  Word Access     */
         struct  {                                          /*  Bit Access      */
            unsigned short  :11;                            /*   Reserved Bits  */
            unsigned short TSR4 :1;                         /*   TSR4           */
            unsigned short TSR3 :1;                         /*   TSR3           */
            unsigned short TSR2 :1;                         /*   TSR2           */
            unsigned short TSR1 :1;                         /*   TSR1           */
            unsigned short TSR0 :1;                         /*   TSR0           */
        } BIT;
    } TSR;
    union  {                                                /* CCR              */
        unsigned short WORD;                                /*  Word Access     */
         struct  {                                          /*  Bit Access      */
            unsigned short  :10;                            /*   Reserved Bits  */
            unsigned short CCR :6;                          /*   CCR[5:0]       */
        } BIT;
    } CCR;
    unsigned short TCNTR;                                   /* TCNTR            */
    unsigned char wk11 [2];                                 /*                  */
    unsigned short CYCTR;                                   /* CYCTR            */
    unsigned char wk12 [2];                                 /*                  */
    unsigned short RFMK;                                    /* RFMK             */
    unsigned char wk13 [2];                                 /*                  */
    unsigned short TCMR0;                                   /* TCMR0            */
    unsigned char wk14 [2];                                 /*                  */
    unsigned short TCMR1;                                   /* TCMR1            */
    unsigned char wk15 [2];                                 /*                  */
    unsigned short TCMR2;                                   /* TCMR2            */
    unsigned char wk16 [2];                                 /*                  */
    union  {                                                /* TTTSEL           */
        unsigned short WORD;                                /*  Word Access     */
         struct  {                                          /*  Bit Access      */
            unsigned short  :1;                             /*   Reserved Bits  */
            unsigned short TTTSEL14 :1;                     /*   TTTSEL14       */
            unsigned short TTTSEL13 :1;                     /*   TTTSEL13       */
            unsigned short TTTSEL12 :1;                     /*   TTTSEL12       */
            unsigned short TTTSEL11 :1;                     /*   TTTSEL11       */
            unsigned short TTTSEL10 :1;                     /*   TTTSEL10       */
            unsigned short TTTSEL9 :1;                      /*   TTTSEL9        */
            unsigned short TTTSEL8 :1;                      /*   TTTSEL8        */
            unsigned short  :8;                             /*   Reserved Bits  */
        } BIT;
    } TTTSEL;
    unsigned char wk17 [90];                                /*                  */
    t_CAN_message_buffer MSG[32];                           /* CAN msg buffers  */
    unsigned char wk18 [256];                               /*                  */
    union  {                                                /* MBESR            */
        unsigned short WORD;                                /*  Word Access     */
         struct  {                                          /*  Bit Access      */
            unsigned short  :15;                            /*   Reserved Bits  */
            unsigned short MBEF :1;                         /*   MBEF           */
        } BIT;
    } MBESR;
    union  {                                                /* MBECR            */
        unsigned short WORD;                                /*  Word Access     */
         struct  {                                          /*  Bit Access      */
            unsigned short  :15;                            /*   Reserved Bits  */
            unsigned short MBIM :1;                         /*   MBIM           */
        } BIT;
    } MBECR;
};

 struct st_adca {                                           /* struct ADCA     */
    union  {                                                /* ADCSR0           */
        unsigned char BYTE;                                 /*  Byte Access     */
         struct  {                                          /*  Bit Access      */
            unsigned char ADST :1;                          /*   ADST           */
            unsigned char ADCS :1;                          /*   ADCS           */
            unsigned char  :1;                              /*   Reserved Bits  */
            unsigned char ADIE :1;                          /*   ADIE           */
            unsigned char  :2;                              /*   Reserved Bits  */
            unsigned char TRGE :1;                          /*   TRGE           */
            unsigned char EXTRG :1;                         /*   EXTRG          */
        } BIT;
    } ADCSR;
    unsigned char wk1 [1];                                  /*                  */
    union  {                                                /* ADREF0           */
        unsigned char BYTE;                                 /*  Byte Access     */
         struct  {                                          /*  Bit Access      */
            unsigned char ADSCACT :1;                       /*   ADSCACT        */
            unsigned char ADITACT :1;                       /*   ADITACT        */
            unsigned char  :5;                              /*   Reserved Bits  */
            unsigned char ADF :1;                           /*   ADF            */
        } BIT;
    } ADREF;
    unsigned char wk2 [1];                                  /*                  */
    union  {                                                /* ADTRE0           */
        unsigned short WORD;                                /*  Word Access     */
         struct  {                                          /*  Bit Access      */
            unsigned short ADTRGE15 :1;                     /*   ADTRGE15       */
            unsigned short ADTRGE14 :1;                     /*   ADTRGE14       */
            unsigned short ADTRGE13 :1;                     /*   ADTRGE13       */
            unsigned short ADTRGE12 :1;                     /*   ADTRGE12       */
            unsigned short ADTRGE11 :1;                     /*   ADTRGE11       */
            unsigned short ADTRGE10 :1;                     /*   ADTRGE10       */
            unsigned short ADTRGE9 :1;                      /*   ADTRGE9        */
            unsigned short ADTRGE8 :1;                      /*   ADTRGE8        */
            unsigned short ADTRGE7 :1;                      /*   ADTRGE7        */
            unsigned short ADTRGE6 :1;                      /*   ADTRGE6        */
            unsigned short ADTRGE5 :1;                      /*   ADTRGE5        */
            unsigned short ADTRGE4 :1;                      /*   ADTRGE4        */
            unsigned short ADTRGE3 :1;                      /*   ADTRGE3        */
            unsigned short ADTRGE2 :1;                      /*   ADTRGE2        */
            unsigned short ADTRGE1 :1;                      /*   ADTRGE1        */
            unsigned short ADTRGE0 :1;                      /*   ADTRGE0        */
        } BIT;
    } ADTRE;
    union  {                                                /* ADTRF0           */
        unsigned short WORD;                                /*  Word Access     */
         struct  {                                          /*  Bit Access      */
            unsigned short ADTF15 :1;                       /*   ADTF15         */
            unsigned short ADTF14 :1;                       /*   ADTF14         */
            unsigned short ADTF13 :1;                       /*   ADTF13         */
            unsigned short ADTF12 :1;                       /*   ADTF12         */
            unsigned short ADTF11 :1;                       /*   ADTF11         */
            unsigned short ADTF10 :1;                       /*   ADTF10         */
            unsigned short ADTF9 :1;                        /*   ADTF9          */
            unsigned short ADTF8 :1;                        /*   ADTF8          */
            unsigned short ADTF7 :1;                        /*   ADTF7          */
            unsigned short ADTF6 :1;                        /*   ADTF6          */
            unsigned short ADTF5 :1;                        /*   ADTF5          */
            unsigned short ADTF4 :1;                        /*   ADTF4          */
            unsigned short ADTF3 :1;                        /*   ADTF3          */
            unsigned short ADTF2 :1;                        /*   ADTF2          */
            unsigned short ADTF1 :1;                        /*   ADTF1          */
            unsigned short ADTF0 :1;                        /*   ADTF0          */
        } BIT;
    } ADTRF;
    union  {                                                /* ADTRS0           */
        unsigned short WORD;                                /*  Word Access     */
         struct  {                                          /*  Bit Access      */
            unsigned short ADTRS15 :1;                      /*   ADTRS15        */
            unsigned short ADTRS14 :1;                      /*   ADTRS14        */
            unsigned short ADTRS13 :1;                      /*   ADTRS13        */
            unsigned short ADTRS12 :1;                      /*   ADTRS12        */
            unsigned short ADTRS11 :1;                      /*   ADTRS11        */
            unsigned short ADTRS10 :1;                      /*   ADTRS10        */
            unsigned short ADTRS9 :1;                       /*   ADTRS9         */
            unsigned short ADTRS8 :1;                       /*   ADTRS8         */
            unsigned short ADTRS7 :1;                       /*   ADTRS7         */
            unsigned short ADTRS6 :1;                       /*   ADTRS6         */
            unsigned short ADTRS5 :1;                       /*   ADTRS5         */
            unsigned short ADTRS4 :1;                       /*   ADTRS4         */
            unsigned short ADTRS3 :1;                       /*   ADTRS3         */
            unsigned short ADTRS2 :1;                       /*   ADTRS2         */
            unsigned short ADTRS1 :1;                       /*   ADTRS1         */
            unsigned short ADTRS0 :1;                       /*   ADTRS0         */
        } BIT;
    } ADTRS;
    union  {                                                /* ADSTRG0          */
        unsigned short WORD;                                /*  Word Access     */
         struct  {                                          /*  Bit Access      */
            unsigned short ADSTRG15 :1;                     /*   ADSTRG15       */
            unsigned short ADSTRG14 :1;                     /*   ADSTRG14       */
            unsigned short ADSTRG13 :1;                     /*   ADSTRG13       */
            unsigned short ADSTRG12 :1;                     /*   ADSTRG12       */
            unsigned short ADSTRG11 :1;                     /*   ADSTRG11       */
            unsigned short ADSTRG10 :1;                     /*   ADSTRG10       */
            unsigned short ADSTRG9 :1;                      /*   ADSTRG9        */
            unsigned short ADSTRG8 :1;                      /*   ADSTRG8        */
            unsigned short ADSTRG7 :1;                      /*   ADSTRG7        */
            unsigned short ADSTRG6 :1;                      /*   ADSTRG6        */
            unsigned short ADSTRG5 :1;                      /*   ADSTRG5        */
            unsigned short ADSTRG4 :1;                      /*   ADSTRG4        */
            unsigned short ADSTRG3 :1;                      /*   ADSTRG3        */
            unsigned short ADSTRG2 :1;                      /*   ADSTRG2        */
            unsigned short ADSTRG1 :1;                      /*   ADSTRG1        */
            unsigned short ADSTRG0 :1;                      /*   ADSTRG0        */
        } BIT;
    } ADSTRG;
    union  {                                                /* ADTRD0           */
        unsigned short WORD;                                /*  Word Access     */
         struct  {                                          /*  Bit Access      */
            unsigned short ADIDE15 :1;                      /*   ADIDE15        */
            unsigned short ADIDE14 :1;                      /*   ADIDE14        */
            unsigned short ADIDE13 :1;                      /*   ADIDE13        */
            unsigned short ADIDE12 :1;                      /*   ADIDE12        */
            unsigned short ADIDE11 :1;                      /*   ADIDE11        */
            unsigned short ADIDE10 :1;                      /*   ADIDE10        */
            unsigned short ADIDE9 :1;                       /*   ADIDE9         */
            unsigned short ADIDE8 :1;                       /*   ADIDE8         */
            unsigned short ADIDE7 :1;                       /*   ADIDE7         */
            unsigned short ADIDE6 :1;                       /*   ADIDE6         */
            unsigned short ADIDE5 :1;                       /*   ADIDE5         */
            unsigned short ADIDE4 :1;                       /*   ADIDE4         */
            unsigned short ADIDE3 :1;                       /*   ADIDE3         */
            unsigned short ADIDE2 :1;                       /*   ADIDE2         */
            unsigned short ADIDE1 :1;                       /*   ADIDE1         */
            unsigned short ADIDE0 :1;                       /*   ADIDE0         */
        } BIT;
    } ADTRD;
    unsigned char wk3 [14];                                 /*                  */
    union  {                                                /* ADADS0           */
        unsigned char BYTE;                                 /*  Byte Access     */
         struct  {                                          /*  Bit Access      */
            unsigned char ADS7 :1;                          /*   ADS7           */
            unsigned char ADS6 :1;                          /*   ADS6           */
            unsigned char ADS5 :1;                          /*   ADS5           */
            unsigned char ADS4 :1;                          /*   ADS4           */
            unsigned char ADS3 :1;                          /*   ADS3           */
            unsigned char ADS2 :1;                          /*   ADS2           */
            unsigned char ADS1 :1;                          /*   ADS1           */
            unsigned char ADS0 :1;                          /*   ADS0           */
        } BIT;
    } ADADS;
    unsigned char wk4 [1];                                  /*                  */
    union  {                                                /* ADADC0           */
        unsigned char BYTE;                                 /*  Byte Access     */
         struct  {                                          /*  Bit Access      */
            unsigned char  :6;                              /*   Reserved Bits  */
            unsigned char ADC :2;                           /*   ADC[1:0]       */
        } BIT;
    } ADADC;
    unsigned char wk5 [1];                                  /*                  */
    union  {                                                /* ADANS0           */
        unsigned short WORD;                                /*  Word Access     */
         struct  {                                          /*  Bit Access      */
            unsigned short ANS15 :1;                        /*   ANS15          */
            unsigned short ANS14 :1;                        /*   ANS14          */
            unsigned short ANS13 :1;                        /*   ANS13          */
            unsigned short ANS12 :1;                        /*   ANS12          */
            unsigned short ANS11 :1;                        /*   ANS11          */
            unsigned short ANS10 :1;                        /*   ANS10          */
            unsigned short ANS9 :1;                         /*   ANS9           */
            unsigned short ANS8 :1;                         /*   ANS8           */
            unsigned short ANS7 :1;                         /*   ANS7           */
            unsigned short ANS6 :1;                         /*   ANS6           */
            unsigned short ANS5 :1;                         /*   ANS5           */
            unsigned short ANS4 :1;                         /*   ANS4           */
            unsigned short ANS3 :1;                         /*   ANS3           */
            unsigned short ANS2 :1;                         /*   ANS2           */
            unsigned short ANS1 :1;                         /*   ANS1           */
            unsigned short ANS0 :1;                         /*   ANS0           */
        } BIT;
    } ADANS0;
    union  {                                                /* ADANS1           */
        unsigned short WORD;                                /*  Word Access     */
         struct  {                                          /*  Bit Access      */
            unsigned short  :4;                             /*  Reserve Bits    */
            unsigned short ANS27 :1;                        /*   ANS27          */
            unsigned short ANS26 :1;                        /*   ANS26          */
            unsigned short ANS25 :1;                        /*   ANS25          */
            unsigned short ANS24 :1;                        /*   ANS24          */
            unsigned short ANS23 :1;                        /*   ANS23          */
            unsigned short ANS22 :1;                        /*   ANS22          */
            unsigned short ANS21 :1;                        /*   ANS21          */
            unsigned short ANS20 :1;                        /*   ANS20          */
            unsigned short ANS19 :1;                        /*   ANS19          */
            unsigned short ANS18 :1;                        /*   ANS18          */
            unsigned short ANS17 :1;                        /*   ANS17          */
            unsigned short ANS16 :1;                        /*   ANS16          */
        } BIT;
    } ADANS1;
    unsigned char wk7 [12];                                 /*                  */
    union  {                                                /* ADCER0           */
        unsigned short WORD;                                /*  Word Access     */
         struct  {                                          /*  Bit Access      */
            unsigned short ADRFMT :1;                       /*   ADRFMT         */
            unsigned short  :3;                             /*   OFCREQ         */
            unsigned short DIAGM :1;                        /*   DIAGM          */
            unsigned short DIAGLD :1;                       /*   DIAGLD         */
            unsigned short DIAGVAL :2;                      /*   DIAGVAL[1:0]   */
            unsigned short CKS :1;                          /*   CKS            */
            unsigned short  :6;                             /*   Reserved Bits  */
            unsigned short ITTRGS :1;                       /*   ITTRGS         */
        } BIT;
    } ADCER;
    unsigned char wk8 [12];                                 /*                  */
    unsigned short ADRD;                                    /*  ADRD           */
    unsigned short ADR0;                                    /*  ADR0            */
    unsigned short ADR1;                                    /*  ADR1            */
    unsigned short ADR2;                                    /*  ADR2            */
    unsigned short ADR3;                                    /*  ADR3            */
    unsigned short ADR4;                                    /*  ADR4            */
    unsigned short ADR5;                                    /*  ADR5            */
    unsigned short ADR6;                                    /*  ADR6            */
    unsigned short ADR7;                                    /*  ADR7            */
    unsigned short ADR8;                                    /*  ADR8            */
    unsigned short ADR9;                                    /*  ADR9            */
    unsigned short ADR10;                                   /*  ADR10           */
    unsigned short ADR11;                                   /*  ADR11           */
    unsigned short ADR12;                                   /*  ADR12           */
    unsigned short ADR13;                                   /*  ADR13           */
    unsigned short ADR14;                                   /*  ADR14           */
    unsigned short ADR15;                                   /*  ADR15           */
    unsigned short ADR16;                                   /*  ADR16           */
    unsigned short ADR17;                                   /*  ADR17           */
    unsigned short ADR18;                                   /*  ADR18           */
    unsigned short ADR19;                                   /*  ADR19           */
    unsigned short ADR20;                                   /*  ADR20           */
    unsigned short ADR21;                                   /*  ADR21           */
    unsigned short ADR22;                                   /*  ADR22           */
    unsigned short ADR23;                                   /*  ADR23           */
    unsigned short ADR24;                                   /*  ADR24           */
    unsigned short ADR25;                                   /*  ADR25           */
    unsigned short ADR26;                                   /*  ADR26           */
    unsigned short ADR27;                                   /*  ADR27           */
};

 struct st_adcb {                                           /*                  */
    union  {                                                /* ADCSR1           */
        unsigned char BYTE;                                 /*  Byte Access     */
         struct  {                                          /*  Bit Access      */
            unsigned char ADST :1;                          /*   ADST           */
            unsigned char ADCS :1;                          /*   ADCS           */
            unsigned char  :1;                              /*   Reserved Bits  */
            unsigned char ADIE :1;                          /*   ADIE           */
            unsigned char  :2;                              /*   Reserved Bits  */
            unsigned char TRGE :1;                          /*   TRGE           */
            unsigned char EXTRG :1;                         /*   EXTRG          */
        } BIT;
    } ADCSR;
    unsigned char wk1 [1];                                  /*                  */
    union  {                                                /* ADREF1           */
        unsigned char BYTE;                                 /*  Byte Access     */
         struct  {                                          /*  Bit Access      */
            unsigned char ADSCACT :1;                       /*   ADSCACT        */
            unsigned char ADITACT :1;                       /*   ADITACT        */
            unsigned char  :5;                              /*   Reserved Bits  */
            unsigned char ADF :1;                           /*   ADF            */
        } BIT;
    } ADREF;
    unsigned char wk2 [13];                                 /*                  */
    union  {                                                /* ADTRE1           */
        unsigned char BYTE;                                 /*  Byte Access     */
         struct  {                                          /*  Bit Access      */
            unsigned char ADTRGE47 :1;                      /*   ADTRGE47       */
            unsigned char ADTRGE46 :1;                      /*   ADTRGE46       */
            unsigned char ADTRGE45 :1;                      /*   ADTRGE45       */
            unsigned char ADTRGE44 :1;                      /*   ADTRGE44       */
            unsigned char ADTRGE43 :1;                      /*   ADTRGE43       */
            unsigned char ADTRGE42 :1;                      /*   ADTRGE42       */
            unsigned char ADTRGE41 :1;                      /*   ADTRGE41       */
            unsigned char ADTRGE40 :1;                      /*   ADTRGE40       */
        } BIT;
    } ADTRE;
    unsigned char wk3 [1];                                  /*                  */
    union  {                                                /* ADTRF1           */
        unsigned char BYTE;                                 /*  Byte Access     */
         struct  {                                          /*  Bit Access      */
            unsigned char ADTF47 :1;                        /*   ADTF47         */
            unsigned char ADTF46 :1;                        /*   ADTF46         */
            unsigned char ADTF45 :1;                        /*   ADTF45         */
            unsigned char ADTF44 :1;                        /*   ADTF44         */
            unsigned char ADTF43 :1;                        /*   ADTF43         */
            unsigned char ADTF42 :1;                        /*   ADTF42         */
            unsigned char ADTF41 :1;                        /*   ADTF41         */
            unsigned char ADTF40 :1;                        /*   ADTF40         */
        } BIT;
    } ADTRF;
    unsigned char wk4 [1];                                  /*                  */
    union  {                                                /* ADTRS1           */
        unsigned char BYTE;                                 /*  Byte Access     */
         struct  {                                          /*  Bit Access      */
            unsigned char ADTRS47 :1;                       /*   ADTRS47        */
            unsigned char ADTRS46 :1;                       /*   ADTRS46        */
            unsigned char ADTRS45 :1;                       /*   ADTRS45        */
            unsigned char ADTRS44 :1;                       /*   ADTRS44        */
            unsigned char ADTRS43 :1;                       /*   ADTRS43        */
            unsigned char ADTRS42 :1;                       /*   ADTRS42        */
            unsigned char ADTRS41 :1;                       /*   ADTRS41        */
            unsigned char ADTRS40 :1;                       /*   ADTRS40        */
        } BIT;
    } ADTRS;
    unsigned char wk5 [1];                                  /*                  */
    union  {                                                /* ADSTRG1          */
        unsigned char BYTE;                                 /*  Byte Access     */
         struct  {                                          /*  Bit Access      */
            unsigned char ADSTRG47 :1;                      /*   ADSTRG47       */
            unsigned char ADSTRG46 :1;                      /*   ADSTRG46       */
            unsigned char ADSTRG45 :1;                      /*   ADSTRG45       */
            unsigned char ADSTRG44 :1;                      /*   ADSTRG44       */
            unsigned char ADSTRG43 :1;                      /*   ADSTRG43       */
            unsigned char ADSTRG42 :1;                      /*   ADSTRG42       */
            unsigned char ADSTRG41 :1;                      /*   ADSTRG41       */
            unsigned char ADSTRG40 :1;                      /*   ADSTRG40       */
        } BIT;
    } ADSTRG;
    unsigned char wk6 [1];                                  /*                  */
    union  {                                                /* ADTRD1           */
        unsigned char BYTE;                                 /*  Byte Access     */
         struct  {                                          /*  Bit Access      */
            unsigned char ADIDE47 :1;                       /*   ADIDE47        */
            unsigned char ADIDE46 :1;                       /*   ADIDE46        */
            unsigned char ADIDE45 :1;                       /*   ADIDE45        */
            unsigned char ADIDE44 :1;                       /*   ADIDE44        */
            unsigned char ADIDE43 :1;                       /*   ADIDE43        */
            unsigned char ADIDE42 :1;                       /*   ADIDE42        */
            unsigned char ADIDE41 :1;                       /*   ADIDE41        */
            unsigned char ADIDE40 :1;                       /*   ADIDE40        */
        } BIT;
    } ADTRD;
    unsigned char wk7 [3];                                  /*                  */
    union  {                                                /* ADADS1           */
        unsigned char BYTE;                                 /*  Byte Access     */
         struct  {                                          /*  Bit Access      */
            unsigned char ADS47 :1;                         /*   ADS47          */
            unsigned char ADS46 :1;                         /*   ADS46          */
            unsigned char ADS45 :1;                         /*   ADS45          */
            unsigned char ADS44 :1;                         /*   ADS44          */
            unsigned char ADS43 :1;                         /*   ADS43          */
            unsigned char ADS42 :1;                         /*   ADS42          */
            unsigned char ADS41 :1;                         /*   ADS41          */
            unsigned char ADS40 :1;                         /*   ADS40          */
        } BIT;
    } ADADS;
    unsigned char wk8 [1];                                  /*                  */
    union  {                                                /* ADADC1           */
        unsigned char BYTE;                                 /*  Byte Access     */
         struct  {                                          /*  Bit Access      */
            unsigned char  :6;                              /*   Reserved Bits  */
            unsigned char ADC :2;                           /*   ADC[1:0]       */
        } BIT;
    } ADADC;
    unsigned char wk9 [1];                                  /*                  */
    union  {                                                /* ADANS3           */
        unsigned short WORD;                                /*  Word Access     */
         struct  {                                          /*  Bit Access      */
            unsigned short  :7;                             /*   Reserved Bits  */
            unsigned short ANS48 :1;                        /*   ANS48          */
            unsigned short ANS47 :1;                        /*   ANS47          */
            unsigned short ANS46 :1;                        /*   ANS46          */
            unsigned short ANS45 :1;                        /*   ANS45          */
            unsigned short ANS44 :1;                        /*   ANS44          */
            unsigned short ANS43 :1;                        /*   ANS43          */
            unsigned short ANS42 :1;                        /*   ANS42          */
            unsigned short ANS41 :1;                        /*   ANS41          */
            unsigned short ANS40 :1;                        /*   ANS40          */
        } BIT;
    } ADANS3;
    unsigned char wk10 [14];                                /*                  */
    union  {                                                /* ADCER1           */
        unsigned short WORD;                                /*  Word Access     */
         struct  {                                          /*  Bit Access      */
            unsigned short ADRFMT :1;                       /*   ADRFMT         */
            unsigned short  :3;                             /*   OFCREQ         */
            unsigned short DIAGM :1;                        /*   DIAGM          */
            unsigned short DIAGLD :1;                       /*   DIAGLD         */
            unsigned short DIAGVAL :2;                      /*   DIAGVAL[1:0]   */
            unsigned short CKS :1;                          /*   CKS            */
            unsigned short  :7;                             /*   Reserved Bits  */
        } BIT;
    } ADCER;
    unsigned char wk11 [12];                                /*                  */
    unsigned short ADRD;                                    /*  ADRD            */
    unsigned short ADR40;                                   /*  ADR40           */
    unsigned short ADR41;                                   /*  ADR41           */
    unsigned short ADR42;                                   /*  ADR42           */
    unsigned short ADR43;                                   /*  ADR43           */
    unsigned short ADR44;                                   /*  ADR44           */
    unsigned short ADR45;                                   /*  ADR45           */
    unsigned short ADR46;                                   /*  ADR46           */
    unsigned short ADR47;                                   /*  ADR47           */
    unsigned short ADR48;                                   /*  ADR48           */
};

 struct st_aud {                                            /* struct AUD-II    */
    union  {                                                /* AUCSR            */
        unsigned short WORD;                                /*  Word Access     */
         struct  {                                          /*  Bit Access      */
            unsigned char CLK :2;                           /*   CLK[1:0]       */
            unsigned char BW :2;                            /*   BW[1:0]        */
            unsigned char OC :2;                            /*   OC[1:0]        */
            unsigned char BR :2;                            /*   BR[1:0]        */
            unsigned char WA :2;                            /*   WA[1:0]        */
            unsigned char WB :2;                            /*   WB[1:0]        */
            unsigned char  :1;                              /*   Reserved Bits  */
            unsigned char TM :1;                            /*   TM             */
            unsigned char  :1;                              /*   Reserved Bits  */
            unsigned char EN :1;                            /*   EN             */
        } BIT;
    } AUCSR;
    unsigned char wk1 [2];                                  /*                  */
    unsigned long AUWASR;                                   /*  AUWASR          */
    unsigned long AUWAER;                                   /*  AUWAER          */
    unsigned long AUWBSR;                                   /*  AUWBSR          */
    unsigned long AUWBER;                                   /*  AUWBER          */
    union  {                                                /* AUECSR           */
        unsigned short WORD;                                /*  Word Access     */
         struct  {                                          /*  Bit Access      */
            unsigned char  :6;                              /*   Reserved Bits  */
            unsigned char  :2;
            unsigned char WA0B :3;                          /*   WA0B[2:0]      */
            unsigned char WB0B :3;                          /*   WB0B[2:0]      */
            unsigned char TREX :1;                          /*   TREX           */
            unsigned char TRSB :1;                          /*   TRSB           */
            unsigned char TRGN :1;                          /*   TRGN           */
            unsigned char  :1;                              /*   Reserved Bits  */
            unsigned char  :6;
        } BIT;
    } AUECSR;
};

typedef union  {                                            /* DR               */
    unsigned short WORD;                                    /*  Word Access     */
     struct  {                                              /*  Bit Access      */
        unsigned char DR15 :1;                              /*     DR15         */
        unsigned char DR14 :1;                              /*     DR14         */
        unsigned char DR13 :1;                              /*     DR13         */
        unsigned char DR12 :1;                              /*     DR12         */
        unsigned char DR11 :1;                              /*     DR11         */
        unsigned char DR10 :1;                              /*     DR10         */
        unsigned char DR9 :1;                               /*     DR9          */
        unsigned char DR8 :1;                               /*     DR8          */
        unsigned char DR7 :1;                               /*     DR7          */
        unsigned char DR6 :1;                               /*     DR6          */
        unsigned char DR5 :1;                               /*     DR5          */
        unsigned char DR4 :1;                               /*     DR4          */
        unsigned char DR3 :1;                               /*     DR3          */
        unsigned char DR2 :1;                               /*     DR2          */
        unsigned char DR1 :1;                               /*     DR1          */
        unsigned char DR0 :1;                               /*     DR0          */
    } BIT;
} t_PORT_DR;

typedef union  {                                            /* IOR              */
    unsigned short WORD;                                    /*  Word Access     */
     struct  {                                              /*  Bit Access      */
        unsigned char IOR15 :1;                             /*   IOR15          */
        unsigned char IOR14 :1;                             /*   IOR14          */
        unsigned char IOR13 :1;                             /*   IOR13          */
        unsigned char IOR12 :1;                             /*   IOR12          */
        unsigned char IOR11 :1;                             /*   IOR11          */
        unsigned char IOR10 :1;                             /*   IOR10          */
        unsigned char IOR9 :1;                              /*   IOR9           */
        unsigned char IOR8 :1;                              /*   IOR8           */
        unsigned char IOR7 :1;                              /*   IOR7           */
        unsigned char IOR6 :1;                              /*   IOR6           */
        unsigned char IOR5 :1;                              /*   IOR5           */
        unsigned char IOR4 :1;                              /*   IOR4           */
        unsigned char IOR3 :1;                              /*   IOR3           */
        unsigned char IOR2 :1;                              /*   IOR2           */
        unsigned char IOR1 :1;                              /*   IOR1           */
        unsigned char IOR0 :1;                              /*   IOR0           */
    } BIT;
} t_PORT_IOR;

typedef union  {                                            /* IR               */
    unsigned short WORD;                                    /*  Word Access     */
     struct  {                                              /*  Bit Access      */
        unsigned char IR15 :1;                              /*   IR15           */
        unsigned char IR14 :1;                              /*   IR14           */
        unsigned char IR13 :1;                              /*   IR13           */
        unsigned char IR12 :1;                              /*   IR12           */
        unsigned char IR11 :1;                              /*   IR11           */
        unsigned char IR10 :1;                              /*   IR10           */
        unsigned char IR9 :1;                               /*   IR9            */
        unsigned char IR8 :1;                               /*   IR8            */
        unsigned char IR7 :1;                               /*   IR7            */
        unsigned char IR6 :1;                               /*   IR6            */
        unsigned char IR5 :1;                               /*   IR5            */
        unsigned char IR4 :1;                               /*   IR4            */
        unsigned char IR3 :1;                               /*   IR3            */
        unsigned char IR2 :1;                               /*   IR2            */
        unsigned char IR1 :1;                               /*   IR1            */
        unsigned char IR0 :1;                               /*   IR0            */
    } BIT;
} t_PORT_IR;

typedef union  {                                            /* DSR              */
    unsigned short WORD;                                    /*  Word Access     */
     struct  {                                              /*  Bit Access      */
        unsigned char DSR15 :1;                             /*   DSR15          */
        unsigned char DSR14 :1;                             /*   DSR14          */
        unsigned char DSR13 :1;                             /*   DSR13          */
        unsigned char DSR12 :1;                             /*   DSR12          */
        unsigned char DSR11 :1;                             /*   DSR11          */
        unsigned char DSR10 :1;                             /*   DSR10          */
        unsigned char DSR9 :1;                              /*   DSR9           */
        unsigned char DSR8 :1;                              /*   DSR8           */
        unsigned char DSR7 :1;                              /*   DSR7           */
        unsigned char DSR6 :1;                              /*   DSR6           */
        unsigned char DSR5 :1;                              /*   DSR5           */
        unsigned char DSR4 :1;                              /*   DSR4           */
        unsigned char DSR3 :1;                              /*   DSR3           */
        unsigned char DSR2 :1;                              /*   DSR2           */
        unsigned char DSR1 :1;                              /*   DSR1           */
        unsigned char DSR0 :1;                              /*   DSR0           */
    } BIT;
} t_PORT_DSR;

typedef union  {                                            /* PSR              */
    unsigned short WORD;                                    /*  Word Access     */
     struct  {                                              /*  Bit Access      */
        unsigned char PSR15 :1;                             /*   PSR15          */
        unsigned char PSR14 :1;                             /*   PSR14          */
        unsigned char PSR13 :1;                             /*   PSR13          */
        unsigned char PSR12 :1;                             /*   PSR12          */
        unsigned char PSR11 :1;                             /*   PSR11          */
        unsigned char PSR10 :1;                             /*   PSR10          */
        unsigned char PSR9 :1;                              /*   PSR9           */
        unsigned char PSR8 :1;                              /*   PSR8           */
        unsigned char PSR7 :1;                              /*   PSR7           */
        unsigned char PSR6 :1;                              /*   PSR6           */
        unsigned char PSR5 :1;                              /*   PSR5           */
        unsigned char PSR4 :1;                              /*   PSR4           */
        unsigned char PSR3 :1;                              /*   PSR3           */
        unsigned char PSR2 :1;                              /*   PSR2           */
        unsigned char PSR1 :1;                              /*   PSR1           */
        unsigned char PSR0 :1;                              /*   PSR0           */
    } BIT;
} t_PORT_PSR;

typedef union  {                                            /* PR               */
    unsigned short WORD;                                    /*  Word Access     */
     struct  {                                              /*  Bit Access      */
        unsigned char PR15 :1;                              /*   PR15           */
        unsigned char PR14 :1;                              /*   PR14           */
        unsigned char PR13 :1;                              /*   PR13           */
        unsigned char PR12 :1;                              /*   PR12           */
        unsigned char PR11 :1;                              /*   PR11           */
        unsigned char PR10 :1;                              /*   PR10           */
        unsigned char PR9 :1;                               /*   PR9            */
        unsigned char PR8 :1;                               /*   PR8            */
        unsigned char PR7 :1;                               /*   PR7            */
        unsigned char PR6 :1;                               /*   PR6            */
        unsigned char PR5 :1;                               /*   PR5            */
        unsigned char PR4 :1;                               /*   PR4            */
        unsigned char PR3 :1;                               /*   PR3            */
        unsigned char PR2 :1;                               /*   PR2            */
        unsigned char PR1 :1;                               /*   PR1            */
        unsigned char PR0 :1;                               /*   PR0            */
    } BIT;
} t_PORT_PR;

typedef union  {                                            /* ER               */
    unsigned short WORD;                                    /*  Word Access     */
     struct  {                                              /*  Bit Access      */
        unsigned char  :6;                                  /*   Reserved Bits  */
        unsigned char HES :2;                               /*   HES[1:0]       */
        unsigned char  :6;                                  /*   Reserved Bits  */
        unsigned char LES :2;                               /*   LES[1:0]       */
    } BIT;
} t_PORT_ER;

 struct st_port_ac {                                        /*                  */
    unsigned char wk1 [2];                                  /*                  */
    t_PORT_DR DR;                                           /*PORT Data Register*/
    unsigned char wk2 [2];                                  /*                  */
    t_PORT_IOR IOR;                                         /* Port IO Register */
    unsigned char wk3 [8];                                  /*                  */
    union  {                                                /* CR4              */
        unsigned short WORD;                                /*  Word Access     */
         struct  {                                          /*  Bit Access      */
            unsigned char  :3;                              /*   Reserved Bits  */
            unsigned char MD15 :1;                          /*   MD15           */
            unsigned char  :3;                              /*   Reserved Bits  */
            unsigned char MD14 :1;                          /*   MD14           */
            unsigned char  :3;                              /*   Reserved Bits  */
            unsigned char MD13 :1;                          /*   MD13           */
            unsigned char  :3;                              /*   Reserved Bits  */
            unsigned char MD12 :1;                          /*   MD12           */
        } BIT;
    } CR4;
    union  {                                                /* CR3              */
        unsigned short WORD;                                /*  Word Access     */
         struct  {                                          /*  Bit Access      */
            unsigned char  :3;                              /*   Reserved Bits  */
            unsigned char MD11 :1;                          /*   MD11           */
            unsigned char  :3;                              /*   Reserved Bits  */
            unsigned char MD10 :1;                          /*   MD10           */
            unsigned char  :3;                              /*   Reserved Bits  */
            unsigned char MD9 :1;                           /*   MD9            */
            unsigned char  :3;                              /*   Reserved Bits  */
            unsigned char MD8 :1;                           /*   MD8            */
        } BIT;
    } CR3;
    union  {                                                /* CR2              */
        unsigned short WORD;                                /*  Word Access     */
         struct  {                                          /*  Bit Access      */
            unsigned char  :3;                              /*   Reserved Bits  */
            unsigned char MD7 :1;                           /*   MD7            */
            unsigned char  :3;                              /*   Reserved Bits  */
            unsigned char MD6 :1;                           /*   MD6            */
            unsigned char  :3;                              /*   Reserved Bits  */
            unsigned char MD5 :1;                           /*   MD5            */
            unsigned char  :3;                              /*   Reserved Bits  */
            unsigned char MD4 :1;                           /*   MD4            */
        } BIT;
    } CR2;
    union  {                                                /* CR1              */
        unsigned short WORD;                                /*  Word Access     */
         struct  {                                          /*  Bit Access      */
            unsigned char  :3;                              /*   Reserved Bits  */
            unsigned char MD3 :1;                           /*   MD3            */
            unsigned char  :3;                              /*   Reserved Bits  */
            unsigned char MD2 :1;                           /*   MD2            */
            unsigned char  :3;                              /*   Reserved Bits  */
            unsigned char MD1 :1;                           /*   MD1            */
            unsigned char  :3;                              /*   Reserved Bits  */
            unsigned char MD0 :1;                           /*   MD0            */
        } BIT;
    } CR1;
    unsigned char wk4 [6];                                  /*                  */
    t_PORT_PR PR;                                           /*PORT Port Register*/
};

 struct st_port_b {                                         /*                  */
    unsigned char wk1 [2];                                  /*                  */
    t_PORT_DR DR;                                           /*PORT Data Register*/
    unsigned char wk2 [2];                                  /*                  */
    t_PORT_IOR IOR;                                         /* Port IO Register */
    unsigned char wk3 [8];                                  /*                  */
    union  {                                                /* CR4              */
        unsigned short WORD;                                /*  Word Access     */
         struct  {                                          /*  Bit Access      */
            unsigned char  :5;                              /*   Reserved Bits  */
            unsigned char MD14 :3;                          /*   MD14[2:0]      */
            unsigned char  :2;                              /*   Reserved Bits  */
            unsigned char MD13 :2;                          /*   MD13[1:0]      */
            unsigned char  :2;                              /*   Reserved Bits  */
            unsigned char MD12 :2;                          /*   MD12[1:0]      */
        } BIT;
    } CR4;
    union  {                                                /* CR3              */
        unsigned short WORD;                                /*  Word Access     */
         struct  {                                          /*  Bit Access      */
            unsigned char  :2;                              /*   Reserved Bits  */
            unsigned char MD11 :2;                          /*   MD11[1:0]      */
            unsigned char  :3;                              /*   Reserved Bits  */
            unsigned char MD10 :1;                          /*   MD10           */
            unsigned char  :3;                              /*   Reserved Bits  */
            unsigned char MD9 :1;                           /*   MD9            */
            unsigned char  :2;                              /*   Reserved Bits  */
            unsigned char MD8 :2;                           /*   MD8[1:0]       */
        } BIT;
    } CR3;
    union  {                                                /* CR2              */
        unsigned short WORD;                                /*  Word Access     */
         struct  {                                          /*  Bit Access      */
            unsigned char  :3;                              /*   Reserved Bits  */
            unsigned char MD7 :1;                           /*   MD7            */
            unsigned char  :3;                              /*   Reserved Bits  */
            unsigned char MD6 :1;                           /*   MD6            */
            unsigned char  :1;                              /*   Reserved Bits  */
            unsigned char MD5 :3;                           /*   MD5[2:0]       */
            unsigned char  :1;                              /*   Reserved Bits  */
            unsigned char MD4 :3;                           /*   MD4[2:0]       */
        } BIT;
    } CR2;
    union  {                                                /* CR1              */
        unsigned short WORD;                                /*  Word Access     */
         struct  {                                          /*  Bit Access      */
            unsigned char  :2;                              /*   Reserved Bits  */
            unsigned char MD3 :2;                           /*   MD3[1:0]       */
            unsigned char  :2;                              /*   Reserved Bits  */
            unsigned char MD2 :2;                           /*   MD2[1:0]       */
            unsigned char  :2;                              /*   Reserved Bits  */
            unsigned char MD1 :2;                           /*   MD1[1:0]       */
            unsigned char  :2;                              /*   Reserved Bits  */
            unsigned char MD0 :2;                           /*   MD0[1:0]       */
        } BIT;
    } CR1;
    t_PORT_IR IR;                                           /* Port Inversion   */
    t_PORT_DSR DSR;                                         /* Drive Register   */
    t_PORT_PSR PSR;                                         /* Pin State Setting*/
    t_PORT_PR PR;                                           /*PORT Port Register*/
};

 struct st_port_d {                                         /*                  */
    t_PORT_DR DR;                                           /*PORT Data Register*/
    t_PORT_PR PR;                                           /*PORT Port Register*/
    t_PORT_IR IR;                                           /* Port Inversion   */
    unsigned char wk1 [2];                                  /*                  */
    t_PORT_IOR IOR;                                         /* Port IO Register */
    unsigned char wk2 [2];                                  /*                  */
    union  {                                                /* CR2              */
        unsigned short WORD;                                /*  Word Access     */
         struct  {                                          /*  Bit Access      */
            unsigned char  :4;                              /*   Reserved Bits  */
            unsigned char MD13 :2;                          /*   MD13[1:0]      */
            unsigned char MD12 :2;                          /*   MD12[1:0]      */
            unsigned char MD11 :2;                          /*   MD11[1:0]      */
            unsigned char MD10 :2;                          /*   MD10[1:0]      */
            unsigned char MD9 :2;                           /*   MD9[1:0]       */
            unsigned char MD8 :2;                           /*   MD8[1:0]       */
        } BIT;
    } CR2;
    union  {                                                /* CR1              */
        unsigned short WORD;                                /*  Word Access     */
         struct  {                                          /*  Bit Access      */
            unsigned char MD7 :2;                           /*   MD7[1:0]       */
            unsigned char MD6 :2;                           /*   MD6[1:0]       */
            unsigned char MD5 :2;                           /*   MD5[1:0]       */
            unsigned char MD4 :2;                           /*   MD4[1:0]       */
            unsigned char MD3 :2;                           /*   MD3[1:0]       */
            unsigned char MD2 :2;                           /*   MD2[1:0]       */
            unsigned char MD1 :2;                           /*   MD1[1:0]       */
            unsigned char MD0 :2;                           /*   MD0[1:0]       */
        } BIT;
    } CR1;
};

 struct st_port_e {                                         /*                  */
    t_PORT_DR DR;                                           /*PORT Data Register*/
    t_PORT_PR PR;                                           /*PORT Port Register*/
    t_PORT_IR IR;                                           /* Port Inversion   */
    t_PORT_DSR DSR;                                         /* Drive Register   */
    t_PORT_IOR IOR;                                         /* Port IO Register */
    unsigned char wk [2];                                   /*                  */
    union  {                                                /* CR2              */
        unsigned short WORD;                                /*  Word Access     */
         struct  {                                          /*  Bit Access      */
            unsigned char  :5;                              /*   Reserved Bits  */
            unsigned char MD13 :1;                          /*   MD13           */
            unsigned char  :1;                              /*   Reserved Bits  */
            unsigned char MD12 :1;                          /*   MD12           */
            unsigned char  :1;                              /*   Reserved Bits  */
            unsigned char MD11 :1;                          /*   MD11           */
            unsigned char  :1;                              /*   Reserved Bits  */
            unsigned char MD10 :1;                          /*   MD10           */
            unsigned char  :1;                              /*   Reserved Bits  */
            unsigned char MD9 :1;                           /*   MD9            */
            unsigned char  :1;                              /*   Reserved Bits  */
            unsigned char MD8 :1;                           /*   MD8            */
        } BIT;
    } CR2;
    union  {                                                /* CR1              */
        unsigned short WORD;                                /*  Word Access     */
         struct  {                                          /*  Bit Access      */
            unsigned char MD7 :2;                           /*   MD7[1:0]       */
            unsigned char MD6 :2;                           /*   MD6[1:0]       */
            unsigned char  :1;                              /*   Reserved Bits  */
            unsigned char MD5 :1;                           /*   MD5            */
            unsigned char  :1;                              /*   Reserved Bits  */
            unsigned char MD4 :1;                           /*   MD4            */
            unsigned char  :1;                              /*   Reserved Bits  */
            unsigned char MD3 :1;                           /*   MD3            */
            unsigned char MD2 :2;                           /*   MD2[1:0]       */
            unsigned char MD1 :2;                           /*   MD1[1:0]       */
            unsigned char  :1;                              /*   Reserved Bits  */
            unsigned char MD0 :1;                           /*   MD0            */
        } BIT;
    } CR1;
};

 struct st_port_f {                                         /*                  */
    t_PORT_DR DR;                                           /*PORT Data Register*/
    t_PORT_PR PR;                                           /*PORT Port Register*/
    t_PORT_IR IR;                                           /* Port Inversion   */
    t_PORT_DSR DSR;                                         /* Drive Register   */
    t_PORT_PSR PSR;                                         /* Pin State Setting*/
    t_PORT_IOR IOR;                                         /* Port IO Register */
    union  {                                                /* CR2              */
        unsigned short WORD;                                /*  Word Access     */
         struct  {                                          /*  Bit Access      */
            unsigned char MD15 :2;                          /*   MD15[1:0]      */
            unsigned char MD14 :2;                          /*   MD14[1:0]      */
            unsigned char MD13 :2;                          /*   MD13[1:0]      */
            unsigned char MD12 :2;                          /*   MD12[1:0]      */
            unsigned char MD11 :2;                          /*   MD11[1:0]      */
            unsigned char MD10 :2;                          /*   MD10[1:0]      */
            unsigned char MD9 :2;                           /*   MD9[1:0]       */
            unsigned char MD8 :2;                           /*   MD8[1:0]       */
        } BIT;
    } CR2;
    union  {                                                /* CR1              */
        unsigned short WORD;                                /*  Word Access     */
         struct  {                                          /*  Bit Access      */
            unsigned char MD7 :2;                           /*   MD7[1:0]       */
            unsigned char MD6 :2;                           /*   MD6[1:0]       */
            unsigned char MD5 :2;                           /*   MD5[1:0]       */
            unsigned char MD4 :2;                           /*   MD4[1:0]       */
            unsigned char MD3 :2;                           /*   MD3[1:0]       */
            unsigned char MD2 :2;                           /*   MD2[1:0]       */
            unsigned char MD1 :2;                           /*   MD1[1:0]       */
            unsigned char MD0 :2;                           /*   MD0[1:0]       */
        } BIT;
    } CR1;
};

 struct st_port_gp {                                        /*                  */
    t_PORT_DR DR;                                           /*PORT Data Register*/
    t_PORT_PR PR;                                           /*PORT Port Register*/
    t_PORT_IR IR;                                           /* Port Inversion   */
    t_PORT_DSR DSR;                                         /* Drive Register   */
    t_PORT_ER ER;                                           /* Edge Selection   */
    unsigned char wk1 [2];                                  /*                  */
    t_PORT_IOR IOR;                                         /* Port IO Register */
    unsigned char wk2 [2];                                  /*                  */
    union  {                                                /* CR2              */
        unsigned short WORD;                                /*  Word Access     */
         struct  {                                          /*  Bit Access      */
            unsigned char MD15 :2;                          /*   MD15[1:0]      */
            unsigned char MD14 :2;                          /*   MD14[1:0]      */
            unsigned char MD13 :2;                          /*   MD13[1:0]      */
            unsigned char MD12 :2;                          /*   MD12[1:0]      */
            unsigned char MD11 :2;                          /*   MD11[1:0]      */
            unsigned char MD10 :2;                          /*   MD10[1:0]      */
            unsigned char MD9 :2;                           /*   MD9[1:0]       */
            unsigned char MD8 :2;                           /*   MD8[1:0]       */
        } BIT;
    } CR2;
    union  {                                                /* CR1              */
        unsigned short WORD;                                /*  Word Access     */
         struct  {                                          /*  Bit Access      */
            unsigned char MD7 :2;                           /*   MD7[1:0]       */
            unsigned char MD6 :2;                           /*   MD6[1:0]       */
            unsigned char MD5 :2;                           /*   MD5[1:0]       */
            unsigned char MD4 :2;                           /*   MD4[1:0]       */
            unsigned char MD3 :2;                           /*   MD3[1:0]       */
            unsigned char MD2 :2;                           /*   MD2[1:0]       */
            unsigned char MD1 :2;                           /*   MD1[1:0]       */
            unsigned char MD0 :2;                           /*   MD0[1:0]       */
        } BIT;
    } CR1;
};

 struct st_port_h {                                         /*                  */
    t_PORT_DR DR;                                           /*PORT Data Register*/
    t_PORT_PR PR;                                           /*PORT Port Register*/
    t_PORT_IOR IOR;                                         /* Port IO Register */
    unsigned char wk1 [2];                                  /*                  */
    union  {                                                /* CR               */
        unsigned short WORD;                                /*  Word Access     */
         struct  {                                          /*  Bit Access      */
            unsigned char  :4;                              /*   Reserved bits  */
            unsigned char MD5 :2;                           /*   MD5[1:0]       */
            unsigned char MD4 :2;                           /*   MD4[1:0]       */
            unsigned char MD3 :2;                           /*   MD3[1:0]       */
            unsigned char MD2 :2;                           /*   MD2[1:0]       */
            unsigned char MD1 :2;                           /*   MD1[1:0]       */
            unsigned char MD0 :2;                           /*   MD0[1:0]       */
        } BIT;
    } CR;
};

 struct st_port_j {                                         /*                  */
    t_PORT_DR DR;                                           /*PORT Data Register*/
    t_PORT_PR PR;                                           /*PORT Port Register*/
    t_PORT_IR IR;                                           /* Port Inversion   */
    t_PORT_DSR DSR;                                         /* Drive Register   */
    t_PORT_PSR PSR;                                         /* Pin State Setting*/
    unsigned char wk1 [2];                                  /*                  */
    t_PORT_IOR IOR;                                         /* Port IO Register */
    unsigned char wk2 [2];                                  /*                  */
    union  {                                                /* CR2              */
        unsigned short WORD;                                /*  Word Access     */
         struct  {                                          /*  Bit Access      */
            unsigned char  :8;                              /*   Reserved bits  */
            unsigned char  :5;                              /*   Reserved bits  */
            unsigned char MD9 :1;                           /*   MD9            */
            unsigned char  :1;                              /*   Reserved bits  */
            unsigned char MD8 :1;                           /*   MD8            */
        } BIT;
    } CR2;
    union  {                                                /* CR1              */
        unsigned short WORD;                                /*  Word Access     */
         struct  {                                          /*  Bit Access      */
            unsigned char MD7 :2;                           /*   MD7[1:0]       */
            unsigned char  :1;                              /*   Reserved bits  */
            unsigned char MD6 :1;                           /*   MD6            */
            unsigned char  :1;                              /*   Reserved bits  */
            unsigned char MD5 :1;                           /*   MD5            */
            unsigned char MD4 :2;                           /*   MD4[1:0]       */
            unsigned char MD3 :2;                           /*   MD3[1:0]       */
            unsigned char MD2 :2;                           /*   MD2[1:0]       */
            unsigned char MD1 :2;                           /*   MD1[1:0]       */
            unsigned char MD0 :2;                           /*   MD0[1:0]       */
        } BIT;
    } CR1;
};

 struct st_port_k {                                         /*                  */
    t_PORT_DR DR;                                           /*PORT Data Register*/
    t_PORT_PR PR;                                           /*PORT Port Register*/
    t_PORT_IR IR;                                           /* Port Inversion   */
    t_PORT_DSR DSR;                                         /* Drive Register   */
    t_PORT_PSR PSR;                                         /* Pin State Setting*/
    unsigned char wk1 [2];                                  /*                  */
    t_PORT_IOR IOR;                                         /* Port IO Register */
    unsigned char wk2 [2];                                  /*                  */
    union  {                                                /* CR2              */
        unsigned short WORD;                                /*  Word Access     */
         struct  {                                          /*  Bit Access      */
            unsigned char  :8;                              /*   Reserved bits  */
            unsigned char MD11 :2;                          /*   MD11[1:0]      */
            unsigned char MD10 :2;                          /*   MD10[1:0]      */
            unsigned char MD9 :2;                           /*   MD9[1:0]       */
            unsigned char  :1;                              /*   Reserved bits  */
            unsigned char MD8 :1;                           /*   MD8            */
        } BIT;
    } CR2;
    union  {                                                /* CR1              */
        unsigned short WORD;                                /*  Word Access     */
         struct  {                                          /*  Bit Access      */
            unsigned char  :1;                              /*   Reserved bits  */
            unsigned char MD7 :1;                           /*   MD7            */
            unsigned char  :1;                              /*   Reserved bits  */
            unsigned char MD6 :1;                           /*   MD6            */
            unsigned char MD5 :2;                           /*   MD5[1:0]       */
            unsigned char MD4 :2;                           /*   MD4[1:0]       */
            unsigned char MD3 :2;                           /*   MD3[1:0]       */
            unsigned char MD2 :2;                           /*   MD2[1:0]       */
            unsigned char MD1 :2;                           /*   MD1[1:0]       */
            unsigned char MD0 :2;                           /*   MD0[1:0]       */
        } BIT;
    } CR1;
};

 struct st_port_l {                                         /*                  */
    t_PORT_DR DR;                                           /*PORT Data Register*/
    t_PORT_PR PR;                                           /*PORT Port Register*/
    t_PORT_IR IR;                                           /* Port Inversion   */
    unsigned char wk1 [2];                                  /*                  */
    t_PORT_IOR IOR;                                         /* Port IO Register */
    unsigned char wk2 [2];                                  /*                  */
    union  {                                                /* CR2              */
        unsigned short WORD;                                /*  Word Access     */
         struct  {                                          /*  Bit Access      */
            unsigned char  :8;                              /*   Reserved bits  */
            unsigned char  :7;                              /*   Reserved bits  */
            unsigned char MD8 :1;                           /*   MD8            */
        } BIT;
    } CR2;
    union  {                                                /* CR1              */
        unsigned short WORD;                                /*  Word Access     */
         struct  {                                          /*  Bit Access      */
            unsigned char MD7 :2;                           /*   MD7[1:0]       */
            unsigned char MD6 :2;                           /*   MD6[1:0]       */
            unsigned char MD5 :2;                           /*   MD5[1:0]       */
            unsigned char MD4 :2;                           /*   MD4[1:0]       */
            unsigned char MD3 :2;                           /*   MD3[1:0]       */
            unsigned char MD2 :2;                           /*   MD2[1:0]       */
            unsigned char MD1 :2;                           /*   MD1[1:0]       */
            unsigned char MD0 :2;                           /*   MD0[1:0]       */
        } BIT;
    } CR1;
};

 struct st_portctrl {                                       /*                  */
    union  {                                                /* CKCR             */
        unsigned short WORD;                                /*  Word Access     */
         struct  {                                          /*  Bit Access      */
            unsigned char  :8;                              /*   Reserved Bits  */
            unsigned char  :7;                              /*                  */
            unsigned char CKOE :1;                          /*   CKOE           */
        } BIT;
    } CKCR;
};

 struct st_misg {                                           /* struct MISG      */
    union  {                                                /* MISRCR           */
        unsigned char BYTE;                                 /*  Byte Access     */
         struct  {                                          /*  Bit Access      */
            unsigned char  :7;                              /*   Reserved Bits  */
            unsigned char MISREN :1;                        /*   MISREN         */
        } BIT;
    } MISRCR;
    unsigned char wk2 [3];                                  /*                  */
    unsigned long MISR;                                     /*  MISR            */
};

 struct st_rom {                                            /* struct ROM        */
    union  {                                                /* FPMON             */
        unsigned char BYTE;                                 /*  Byte Access      */
         struct  {                                          /*  Bit Access       */
            unsigned char FWE :1;                           /*   FWE             */
            unsigned char  :7;                              /*   Reserved Bits   */
        } BIT;
    } FPMON;
    unsigned char wk1;                                      /*                  */
    union  {                                                /* FMODR             */
        unsigned char BYTE;                                 /*  Byte Access      */
         struct  {                                          /*  Bit Access       */
            unsigned char  :3;                              /*   Reserved Bits   */
            unsigned char FRDMD :1;                         /*   FRDMD           */
            unsigned char  :4;                              /*   Reserved Bits   */
        } BIT;
    } FMODR;
    unsigned char wk2 [13];                                 /*                  */
    union  {                                                /* FASTAT            */
        unsigned char BYTE;                                 /*  Byte Access      */
         struct  {                                          /*  Bit Access       */
            unsigned char ROMAE :1;                         /*   ROMAE           */
            unsigned char  :2;                              /*   Reserved Bits   */
            unsigned char CMDLK :1;                         /*   CMDLK           */
            unsigned char EEPAE :1;                         /*   EEPAE           */
            unsigned char EEPIFE :1;                        /*   EEPIFE          */
            unsigned char EEPRPE :1;                        /*   EEPRPE          */
            unsigned char EEPWPE :1;                        /*   EEPWPE          */
        } BIT;
    } FASTAT;
    union  {                                                /* FAEINT            */
        unsigned char BYTE;                                 /*  Byte Access      */
         struct  {                                          /*  Bit Access       */
            unsigned char ROMAEIE :1;                       /*   ROMAEIE         */
            unsigned char  :2;                              /*   Reserved Bits   */
            unsigned char CMDLKIE :1;                       /*   CMDLKIE         */
            unsigned char EEPAEIE :1;                       /*   EEPAEIE         */
            unsigned char EEPIFEIE :1;                      /*   EEPIFEIE        */
            unsigned char EEPRPEIE :1;                      /*   EEPRPEIE        */
            unsigned char EEPWPEIE :1;                      /*   EEPWPEIE        */
        } BIT;
    } FAEINT;
    unsigned char wk3 [14];                                 /*                  */
    union  {                                                /* ROMMAT            */
        unsigned short WORD;                                /*  Word Access      */
         struct  {                                          /*  Bit Access       */
            unsigned short KEY :8;                          /*   KEY[15:8]       */
            unsigned short  :7;                             /*   Reserved Bits   */
            unsigned short ROMSEL :1;                       /*   ROMSEL          */
        } BIT;
    } ROMMAT;
    unsigned char wk4 [50];                                 /*                  */
    union  {                                                /* FCURAME           */
        unsigned short WORD;                                /*  Word Access      */
         struct  {                                          /*  Bit Access       */
            unsigned short KEY :8;                          /*   KEY[15:8]       */
            unsigned short  :7;                             /*   Reserved Bits   */
            unsigned short FCRME :1;                        /*   FCRME           */
        } BIT;
    } FCURAME;
    unsigned char wk5 [170];                                /*                  */
    union  {                                                /* FSTATR0           */
        unsigned char BYTE;                                 /*  Byte Access      */
         struct  {                                          /*  Bit Access       */
            unsigned char FRDY :1;                          /*   FRDY            */
            unsigned char ILGLERR :1;                       /*   ILGLERR         */
            unsigned char ERSERR :1;                        /*   ERSERR          */
            unsigned char PRGERR :1;                        /*   PRGERR          */
            unsigned char SUSRDY :1;                        /*   SUSRDY          */
            unsigned char  :1;                              /*   Reserved Bits   */
            unsigned char ERSSPD :1;                        /*   ERSSPD          */
            unsigned char PRGSPD :1;                        /*   PRGSPD          */
        } BIT;
    } FSTATR0;
    union  {                                                /* FSTATR1           */
        unsigned char BYTE;                                 /*  Byte Access      */
         struct  {                                          /*  Bit Access       */
            unsigned char FCUERR :1;                        /*   FCUERR          */
            unsigned char  :2;                              /*   Reserved Bits   */
            unsigned char FLOCKST :1;                       /*   FLOCKST         */
            unsigned char  :2;                              /*   Reserved Bits   */
            unsigned char FRDTCT :1;                        /*   FRDTCT          */
            unsigned char FRCRCT :1;                        /*   FRCRCT          */
        } BIT;
    } FSTATR1;
    union  {                                                /* FENTRYR           */
        unsigned short WORD;                                /*  Word Access      */
         struct  {                                          /*  Bit Access       */
            unsigned char FEKEY :8;                         /*   FEKEY[15:8]     */
            unsigned char FENTRYD :1;                       /*   FENTRYD         */
            unsigned char  :2;                              /*   Reserved Bits   */
            unsigned char FENTRY4 :1;                       /*   FENTRY4         */
            unsigned char FENTRY3 :1;                       /*   FENTRY3         */
            unsigned char  :1;                              /*   Reserved Bits   */
            unsigned char FENTRY1 :1;                       /*   FENTRY1         */
            unsigned char FENTRY0 :1;                       /*   FENTRY0         */
        } BIT;
    } FENTRYR;
    union  {                                                /* FPROTR            */
        unsigned short WORD;                                /*  Word Access      */
         struct  {                                          /*  Bit Access       */
            unsigned char FPKEY :8;                         /*   FPKEY[15:8]     */
            unsigned char  :7;                              /*   Reserved Bits   */
            unsigned char FPROTCN :1;                       /*   FPROTCN         */
        } BIT;
    } FPROTR;
    union  {                                                /* FRESETR           */
        unsigned short WORD;                                /*  Word Access      */
         struct  {                                          /*  Bit Access       */
            unsigned char FRKEY :8;                         /*   FRKEY[15:8]     */
            unsigned char  :7;                              /*   Reserved Bits   */
            unsigned char FRESET :1;                        /*   FRESET          */
        } BIT;
    } FRESETR;
    unsigned char wk6 [2];                                  /*                  */
    union  {                                                /* FCMDR             */
        unsigned short WORD;                                /*  Word Access      */
         struct  {                                          /*  Bit Access       */
            unsigned short CMDR :8;                         /*   CMDR            */
            unsigned short PCMDR :8;                        /*   PCMDR           */
        } BIT;
    } FCMDR;
    union  {                                                /* FRAMECCR          */
        unsigned char BYTE;                                 /*  BYTE Access      */
         struct  {                                          /*  Bit Access       */
            unsigned char  :6;                              /*  Reserved Bits    */
            unsigned char FRDCLE :1;                        /*   PCMDR           */
            unsigned char FRCCLE :1;                        /*   PCMDR           */
        } BIT;
    } FRAMECCR;
    unsigned char wk7 [11];                                 /*                  */
    union  {                                                /* FCPSR             */
        unsigned short WORD;                                /*  Word Access      */
         struct  {                                          /*  Bit Access       */
            unsigned char  :8;                              /*   Reserved Bits   */
            unsigned char  :7;                              /*   Reserved Bits   */
            unsigned char ESUSPMD :1;                       /*   ESUSPMD         */
        } BIT;
    } FCPSR;
    unsigned char wk8 [2];                                  /*                  */
    union  {                                                /* EEPBCSTAT         */
        unsigned short WORD;                                /*  Word Access      */
         struct  {                                          /*  Bit Access       */
            unsigned short  :8;                             /*   Reserved Bits   */
            unsigned short PEERRST :8;                      /*  PEERRST          */
        } BIT;
    } FPESTAT;
};

 struct st_eeprom {                                         /* struct EEPROM     */
    union  {                                                /* EEPRE0            */
        unsigned short WORD;                                /*  Word Access      */
         struct  {                                          /*  Bit Access       */
            unsigned short KEY :8;                          /*   KEY[15:8]       */
            unsigned short DBRE07 :1;                       /*   DBRE07          */
            unsigned short DBRE06 :1;                       /*   DBRE06          */
            unsigned short DBRE05 :1;                       /*   DBRE05          */
            unsigned short DBRE04 :1;                       /*   DBRE04          */
            unsigned short DBRE03 :1;                       /*   DBRE03          */
            unsigned short DBRE02 :1;                       /*   DBRE02          */
            unsigned short DBRE01 :1;                       /*   DBRE01          */
            unsigned short DBRE00 :1;                       /*   DBRE00          */
        } BIT;
    } EEPRE0;
    union  {                                                /* EEPRE1            */
        unsigned short WORD;                                /*  Word Access      */
         struct  {                                          /*  Bit Access       */
            unsigned short KEY :8;                          /*   KEY[15:8]       */
            unsigned short DBRE15 :1;                       /*   DBRE15          */
            unsigned short DBRE14 :1;                       /*   DBRE14          */
            unsigned short DBRE13 :1;                       /*   DBRE13          */
            unsigned short DBRE12 :1;                       /*   DBRE12          */
            unsigned short DBRE11 :1;                       /*   DBRE11          */
            unsigned short DBRE10 :1;                       /*   DBRE10          */
            unsigned short DBRE09 :1;                       /*   DBRE09          */
            unsigned short DBRE08 :1;                       /*   DBRE08          */
        } BIT;
    } EEPRE1;
    unsigned char wk3 [12];                                 /*                  */
    union  {                                                /* EEPWE0            */
        unsigned short WORD;                                /*  Word Access      */
         struct  {                                          /*  Bit Access       */
            unsigned short KEY :8;                          /*   KEY[15:8]       */
            unsigned short DBWE07 :1;                       /*   DBWE07          */
            unsigned short DBWE06 :1;                       /*   DBWE06          */
            unsigned short DBWE05 :1;                       /*   DBWE05          */
            unsigned short DBWE04 :1;                       /*   DBWE04          */
            unsigned short DBWE03 :1;                       /*   DBWE03          */
            unsigned short DBWE02 :1;                       /*   DBWE02          */
            unsigned short DBWE01 :1;                       /*   DBWE01          */
            unsigned short DBWE00 :1;                       /*   DBWE00          */
        } BIT;
    } EEPWE0;
    union  {                                                /* EEPWE1            */
        unsigned short WORD;                                /*  Word Access      */
         struct  {                                          /*  Bit Access       */
            unsigned short KEY :8;                          /*   KEY[15:8]       */
            unsigned short DBWE15 :1;                       /*   DBWE15          */
            unsigned short DBWE14 :1;                       /*   DBWE14          */
            unsigned short DBWE13 :1;                       /*   DBWE13          */
            unsigned short DBWE12 :1;                       /*   DBWE12          */
            unsigned short DBWE11 :1;                       /*   DBWE11          */
            unsigned short DBWE10 :1;                       /*   DBWE10          */
            unsigned short DBWE09 :1;                       /*   DBWE09          */
            unsigned short DBWE08 :1;                       /*   DBWE08          */
        } BIT;
    } EEPWE1;
    unsigned char wk4 [198];                                /*                  */
    union  {                                                /* EEPBCSTAT         */
        unsigned short WORD;                                /*  Word Access      */
         struct  {                                          /*  Bit Access       */
            unsigned short  :3;                             /*   Reserved Bits   */
            unsigned short BCADR :10;                       /*   BCARD[9:0]      */
            unsigned short  :2;                             /*   Reserved Bits   */
            unsigned short BCSIZE :1;                       /*   BCSIZE          */
        } BIT;
    } EEPBCCNT;
    unsigned char wk5 [2];                                  /*                  */
    union  {                                                /* EEPBCCNT          */
        unsigned short WORD;                                /*  Word Access      */
         struct  {                                          /*  Bit Access       */
            unsigned short  :15;                            /*   Reserved Bits   */
            unsigned short BCST :1;                         /*   BCST            */
        } BIT;
    } EEPBCSTAT;
    unsigned char wk6 [480];                                /*                  */
    union  {                                                /* EEPMAT            */
        unsigned short WORD;                                /*  Word Access      */
         struct  {                                          /*  Bit Access       */
            unsigned short KEY :8;                          /*   EEPMATKEY[15:8] */
            unsigned short  :7;                             /*   Reserved Bits   */
            unsigned short EEPSEL :1;                       /*   EEPSEL          */
        } BIT;
    } EEPMAT;
};

 struct st_romc {                                           /* struct ROMC      */
    union  {                                                /* RCCR             */
        unsigned long LONG;                                 /*  Long Access     */
         struct  {                                          /*  Bit Access      */
            unsigned long  :28;                             /*   Reserved Bits  */
            unsigned long RCF :1;                           /*   RCF            */
            unsigned long RCFI :1;                          /*   RCFI           */
            unsigned long RCFD :1;                          /*   RCFD           */
            unsigned long RCE :1;                           /*   RCE            */
        } BIT;
    } RCCR;
    unsigned char wk [4];                                   /*                  */
    union  {                                                /* RCCR2            */
        unsigned long LONG;                                 /*  Long Access     */
         struct  {                                          /*  Bit Access      */
            unsigned long  :24;                             /*   Reserved Bits  */
            unsigned long PFECB :1;                         /*   PFECB          */
            unsigned long PFENB :1;                         /*   PFENB          */
            unsigned long PFECF :1;                         /*   PFECF          */
            unsigned long PFE :1;                           /*   PFE            */
            unsigned long  :1;                              /*   Reserved Bits  */
            unsigned long PCE2 :1;                          /*   PCE2           */
            unsigned long  :1;                              /*   Reserved Bits  */
            unsigned long PCE0 :1;                          /*   PCE0           */
        } BIT;
    } RCCR2;
};

 struct st_ram {                                            /* struct RAM       */
    union  {                                                /* RAMEN            */
        unsigned short WORD;                                /*  Word Access     */
         struct  {                                          /*  Bit Access      */
            unsigned short RNKEY :8;                        /*   RNKEY[7:0]     */
            unsigned short RAME7 :1;                        /*   RAME7          */
            unsigned short RAME6 :1;                        /*   RAME6          */
            unsigned short RAME5 :1;                        /*   RAME5          */
            unsigned short RAME4 :1;                        /*   RAME4          */
            unsigned short RAME3 :1;                        /*   RAME3          */
            unsigned short RAME2 :1;                        /*   RAME2          */
            unsigned short RAME1 :1;                        /*   RAME1          */
            unsigned short RAME0 :1;                        /*   RAME0          */
        } BIT;
    } RAMEN;
    union  {                                                /* RAMWEN           */
        unsigned short WORD;                                /*  Word Access     */
         struct  {                                          /*  Bit Access      */
            unsigned short RWNKEY :8;                       /*   RNWKEY[7:0]    */
            unsigned short RAMWE7 :1;                       /*   RAMWE7         */
            unsigned short RAMWE6 :1;                       /*   RAMWE6         */
            unsigned short RAMWE5 :1;                       /*   RAMWE5         */
            unsigned short RAMWE4 :1;                       /*   RAMWE4         */
            unsigned short RAMWE3 :1;                       /*   RAMWE3         */
            unsigned short RAMWE2 :1;                       /*   RAMWE2         */
            unsigned short RAMWE1 :1;                       /*   RAMWE1         */
            unsigned short RAMWE0 :1;                       /*   RAMWE0         */
        } BIT;
    } RAMWEN;
    union  {                                                /* RAMECC           */
        unsigned short WORD;                                /*  Word Access     */
         struct  {                                          /*  Bit Access      */
            unsigned short REKEY :8;                        /*   REKEY[7:0]     */
            unsigned short  :7;                             /*   Reserved Bits  */
            unsigned short RECCA :1;                        /*   RECCA          */
        } BIT;
    } RAMECC;
    union  {                                                /* RAMERR           */
        unsigned char BYTE;                                 /*  Byte Access     */
         struct  {                                          /*  Bit Access      */
            unsigned char  :3;                              /*   Reserved Bits  */
            unsigned char RPARI :1;                         /*   RPARI          */
            unsigned char  :2;                              /*   Reserved Bits  */
            unsigned char RDTCT :1;                         /*   RDTCT          */
            unsigned char RCRCT :1;                         /*   RCRCT          */
        } BIT;
    } RAMERR;
    unsigned char wk1 [5];                                  /*                  */
    unsigned long wk2;                                      /*                  */
    union  {                                                /* RAMINT           */
        unsigned char BYTE;                                 /*  Byte Access     */
         struct  {                                          /*  Bit Access      */
            unsigned char  :3;                              /*   Reserved Bits  */
            unsigned char RPEIE :1;                         /*   RPEIE          */
            unsigned char  :2;                              /*   Reserved Bits  */
            unsigned char REDIE :1;                         /*   REDIE          */
            unsigned char RECIE :1;                         /*   REDIE          */
        } BIT;
    } RAMINT;
    unsigned char wk3 [1];                                  /*                  */
    union  {                                                /* RAMACYC          */
        unsigned short WORD;                                /*  Word Access     */
         struct  {                                          /*  Bit Access      */
            unsigned short RAKEY :8;                        /*   RAKEY[7:0]     */
            unsigned short  :2;                             /*   Reserved Bits  */
            unsigned short WRCYC :2;                        /*   WRCYC[1:0]     */
            unsigned short  :3;                             /*   Reserved Bits  */
            unsigned short RDCYC :1;                        /*   RDCYC          */
        } BIT;
    } RAMACYC;
};

 struct st_stby {                                           /* struct STBY      */
    union  {                                                /* STBCR            */
        unsigned short WORD;                                /*  Word Access     */
         struct  {                                          /*  Bit Access      */
            unsigned short STBCRKEY :8;                     /*   STBCRKEY       */
            unsigned short  :3;                             /*   Reserved Bits  */
            unsigned short MSTP4 :1;                        /*   MSTP4          */
            unsigned short MSTP3 :1;                        /*   MSTP3          */
            unsigned short MSTP2 :1;                        /*   MSTP2          */
            unsigned short MSTP1 :1;                        /*   MSTP1          */
            unsigned short MSTP0 :1;                        /*   MSTP0          */
        } BIT;
    } STBCR;
};
#define INTC     (*(volatile struct st_intc  __data32 *) 0xFFFE0800u)/* Interrupt Controller                         */
#define UBC      (*(volatile struct st_ubc  __data32 *) 0xFFFC0400u)/* User Break Controller                        */
#define BSC      (*(volatile struct st_bsc  __data32 *) 0xFFFC0004u)/* Bus State Controller                         */
#define DMAC0    (*(volatile struct st_dmac  __data32 *) 0xFFFE1000u)/* Direct Memory Access Controller Channel 0    */
#define DMAC1    (*(volatile struct st_dmac  __data32 *) 0xFFFE1010u)/* Direct Memory Access Controller Channel 1    */
#define DMAC2    (*(volatile struct st_dmac  __data32 *) 0xFFFE1020u)/* Direct Memory Access Controller Channel 2    */
#define DMAC3    (*(volatile struct st_dmac  __data32 *) 0xFFFE1030u)/* Direct Memory Access Controller Channel 3    */
#define DMAC4    (*(volatile struct st_dmac  __data32 *) 0xFFFE1040u)/* Direct Memory Access Controller Channel 4    */
#define DMAC5    (*(volatile struct st_dmac  __data32 *) 0xFFFE1050u)/* Direct Memory Access Controller Channel 5    */
#define DMAC6    (*(volatile struct st_dmac  __data32 *) 0xFFFE1060u)/* Direct Memory Access Controller Channel 6    */
#define DMAC7    (*(volatile struct st_dmac  __data32 *) 0xFFFE1070u)/* Direct Memory Access Controller Channel 7    */
#define DMACCOM  (*(volatile struct st_dmaccom  __data32 *) 0xFFFE1200u)/* Direct Memory Access Controller Control      */
#define ADMAC    (*(volatile struct st_admac   __data32 *) 0xFFFE6000u)/* Automotive Direct Memory Access Controller   */
#define ATUCTRL  (*(volatile struct st_atuctrl  __data32 *) 0xFFFFF000u)/* ATU Overall                                  */
#define ATUA     (*(volatile struct st_timerA  __data32 *) 0xFFFFF200u)/* ATU Timer A module                           */
#define ATUB     (*(volatile struct st_timerB  __data32 *) 0xFFFFF300u)/* ATU Timer B module                           */
#define ATUC     (*(volatile struct st_timerC  __data32 *) 0xFFFFF400u)/* ATU Timer C module                           */
#define ATUD     (*(volatile struct st_timerD  __data32 *) 0xFFFFF500u)/* ATU Timer D module                           */
#define ATUE     (*(volatile struct st_timerE  __data32 *) 0xFFFFF700u)/* ATU Timer E module                           */
#define ATUF     (*(volatile struct st_timerF  __data32 *) 0xFFFFFA00u)/* ATU Timer F module                           */
#define ATUG     (*(volatile struct st_timerG  __data32 *) 0xFFFFFE00u)/* ATU Timer G module                           */
#define ATUH     (*(volatile struct st_timerH  __data32 *) 0xFFFFFF00u)/* ATU Timer H module                           */
#define ATUJ     (*(volatile struct st_timerJ  __data32 *) 0xFFFFFF80u)/* ATU Timer J module                           */
#define WDT      (*(volatile struct st_wdt     __data32 *) 0xFFFE0000u)/* Watchdog Timer                               */
#define CMT      (*(volatile struct st_cmt     __data32 *) 0xFFFEC000u)/* Compare Match Timer                          */
#define SCIA     (*(volatile struct st_sci     __data32 *) 0xFFFF8000u)/* Serial Communication Interface Module A      */
#define SCIB     (*(volatile struct st_sci     __data32 *) 0xFFFF8800u)/* Serial Communication Interface Module B      */
#define SCIC     (*(volatile struct st_sci     __data32 *) 0xFFFF9000u)/* Serial Communication Interface Module C      */
#define SCID     (*(volatile struct st_sci     __data32 *) 0xFFFF9800u)/* Serial Communication Interface Module D      */
#define SCIE     (*(volatile struct st_sci     __data32 *) 0xFFFFA000u)/* Serial Communication Interface Module E      */
#define RSPIA    (*(volatile struct st_rspi    __data32 *) 0xFFFFB000u)/* Renesas Serial Peripheral Interface Module A */
#define RSPIB    (*(volatile struct st_rspi    __data32 *) 0xFFFFB800u)/* Renesas Serial Peripheral Interface Module B */
#define RSPIC    (*(volatile struct st_rspi    __data32 *) 0xFFFFC000u)/* Renesas Serial Peripheral Interface Module C */
#define RCANA    (*(volatile struct st_rcan    __data32 *) 0xFFFFD000u)/* Renesas Controller Area Network Module A     */
#define RCANB    (*(volatile struct st_rcan    __data32 *) 0xFFFFD800u)/* Renesas Controller Area Network Module B     */
#define RCANC    (*(volatile struct st_rcan    __data32 *) 0xFFFFE000u)/* Renesas Controller Area Network Module C     */
#define ADCA     (*(volatile struct st_adca  __data32 *) 0xFFFFE800u)/* ADC Converter A                              */
#define ADCB     (*(volatile struct st_adcb  __data32 *) 0xFFFFEC00u)/* ADC Converter B                              */
#define AUD      (*(volatile struct st_aud     __data32 *) 0xFFFC0C00u)/* Advanced User Debugger II                    */
#define PORTA    (*(volatile struct st_port_ac  __data32 *) 0xFFFE3800u)/* PORT A (PORT and PFC Structures).            */
#define PORTB    (*(volatile struct st_port_b   __data32 *) 0xFFFE3880u)/* PORT B (PORT and PFC Structures).            */
#define PORTC    (*(volatile struct st_port_ac  __data32 *) 0xFFFE3900u)/* PORT C (PORT and PFC Structures).            */
#define PORTD    (*(volatile struct st_port_d   __data32 *) 0xFFFFC800u)/* PORT D (PORT and PFC Structures).            */
#define PORTE    (*(volatile struct st_port_e   __data32 *) 0xFFFFC810u)/* PORT E (PORT and PFC Structures).            */
#define PORTF    (*(volatile struct st_port_f   __data32 *) 0xFFFFC820u)/* PORT F (PORT and PFC Structures).            */
#define PORTG    (*(volatile struct st_port_gp  __data32 *) 0xFFFFC830u)/* PORT G (PORT and PFC Structures).            */
#define PORTH    (*(volatile struct st_port_h   __data32 *) 0xFFFFC850u)/* PORT H (PORT and PFC Structures).            */
#define PORTJ    (*(volatile struct st_port_j   __data32 *) 0xFFFFC860u)/* PORT J (PORT and PFC Structures).            */
#define PORTK    (*(volatile struct st_port_k   __data32 *) 0xFFFFC880u)/* PORT K (PORT and PFC Structures).            */
#define PORTL    (*(volatile struct st_port_l   __data32 *) 0xFFFFC8A0u)/* PORT L (PORT and PFC Structures).            */
#define PORTCTRL (*(volatile struct st_portctrl  __data32 *) 0xFFFFC920u)/* Port CK Control Register                     */
#define MISRCDR  (*(volatile unsigned long  __data32 *) 0xFFF7FFFCu)/* Multi-Input Signature Generator MISRCDR      */
#define MISG     (*(volatile struct st_misg  __data32 *) 0xFFFC1C00u)/* Multi-Input Signature Generator              */
#define ROMC     (*(volatile struct st_romc    __data32 *) 0xFFFC1400u)/* Read-Only Memory Cache                       */
#define RAM      (*(volatile struct st_ram     __data32 *) 0xFFFF0800u)/* Random-Access Memory                         */
#define ROM      (*(volatile struct st_rom     __data32 *) 0xFFFFA800u)/* Read-Only Memory                             */
#define EEPROM   (*(volatile struct st_eeprom  __data32 *) 0xFFFFA840u)/* Electrical Erase/Program Read Only Memory    */
#define STBY     (*(volatile struct st_stby    __data32 *) 0xFFFE0400u)/* Power-Down Modes                             */

#pragma language=default

#endif  /* __IAR_SYSTEMS_ICC__  */

#ifdef __IAR_SYSTEMS_ASM__

/**************************************************
 *   Assembler definitions
 **************************************************/


/* Interrupt Controller                         */
INTC_ICR0_WORD DEFINE 0xFFFE0800
INTC_ICR0_BIT_NMIE DEFINE 8
INTC_ICR0_BIT_NMIL DEFINE 15
INTC_ICR1_WORD DEFINE 0xFFFE0802
INTC_ICR1_BIT_IRQ0S DEFINE 0
INTC_ICR1_BIT_IRQ1S DEFINE 2
INTC_ICR1_BIT_IRQ2S DEFINE 4
INTC_ICR1_BIT_IRQ3S DEFINE 6
INTC_ICR1_BIT_IRQ4S DEFINE 8
INTC_ICR1_BIT_IRQ5S DEFINE 10
INTC_ICR1_BIT_IRQ6S DEFINE 12
INTC_ICR1_BIT_IRQ7S DEFINE 14
INTC_wk1 DEFINE 0xFFFE0804
INTC_IRQRR_WORD DEFINE 0xFFFE0806
INTC_IRQRR_BIT_IRQ0F DEFINE 0
INTC_IRQRR_BIT_IRQ1F DEFINE 1
INTC_IRQRR_BIT_IRQ2F DEFINE 2
INTC_IRQRR_BIT_IRQ3F DEFINE 3
INTC_IRQRR_BIT_IRQ4F DEFINE 4
INTC_IRQRR_BIT_IRQ5F DEFINE 5
INTC_IRQRR_BIT_IRQ6F DEFINE 6
INTC_IRQRR_BIT_IRQ7F DEFINE 7
INTC_wk2 DEFINE 0xFFFE0808
INTC_IBCR_WORD DEFINE 0xFFFE080C
INTC_IBCR_BIT_E1 DEFINE 1
INTC_IBCR_BIT_E2 DEFINE 2
INTC_IBCR_BIT_E3 DEFINE 3
INTC_IBCR_BIT_E4 DEFINE 4
INTC_IBCR_BIT_E5 DEFINE 5
INTC_IBCR_BIT_E6 DEFINE 6
INTC_IBCR_BIT_E7 DEFINE 7
INTC_IBCR_BIT_E8 DEFINE 8
INTC_IBCR_BIT_E9 DEFINE 9
INTC_IBCR_BIT_E10 DEFINE 10
INTC_IBCR_BIT_E11 DEFINE 11
INTC_IBCR_BIT_E12 DEFINE 12
INTC_IBCR_BIT_E13 DEFINE 13
INTC_IBCR_BIT_E14 DEFINE 14
INTC_IBCR_BIT_E15 DEFINE 15
INTC_IBNR_WORD DEFINE 0xFFFE080E
INTC_IBNR_BIT_BN DEFINE 0
INTC_IBNR_BIT_BOVE DEFINE 13
INTC_IBNR_BIT_BE DEFINE 14
INTC_SINTR1_BYTE DEFINE 0xFFFE0810
INTC_SINTR1_BIT_SINTC DEFINE 0
INTC_SINTR2_BYTE DEFINE 0xFFFE0811
INTC_SINTR2_BIT_SINTC DEFINE 0
INTC_SINTR3_BYTE DEFINE 0xFFFE0812
INTC_SINTR3_BIT_SINTC DEFINE 0
INTC_SINTR4_BYTE DEFINE 0xFFFE0813
INTC_SINTR4_BIT_SINTC DEFINE 0
INTC_SINTR5_BYTE DEFINE 0xFFFE0814
INTC_SINTR5_BIT_SINTC DEFINE 0
INTC_SINTR6_BYTE DEFINE 0xFFFE0815
INTC_SINTR6_BIT_SINTC DEFINE 0
INTC_SINTR7_BYTE DEFINE 0xFFFE0816
INTC_SINTR7_BIT_SINTC DEFINE 0
INTC_SINTR8_BYTE DEFINE 0xFFFE0817
INTC_SINTR8_BIT_SINTC DEFINE 0
INTC_IPR01_WORD DEFINE 0xFFFE0818
INTC_IPR01_BIT_IPL_IRQ3 DEFINE 0
INTC_IPR01_BIT_IPL_IRQ2 DEFINE 4
INTC_IPR01_BIT_IPL_IRQ1 DEFINE 8
INTC_IPR01_BIT_IPL_IRQ0 DEFINE 12
INTC_IPR02_WORD DEFINE 0xFFFE081A
INTC_IPR02_BIT_IPL_IRQ7 DEFINE 0
INTC_IPR02_BIT_IPL_IRQ6 DEFINE 4
INTC_IPR02_BIT_IPL_IRQ5 DEFINE 8
INTC_IPR02_BIT_IPL_IRQ4 DEFINE 12
INTC_wk3 DEFINE 0xFFFE081C
INTC_SINTR9_BYTE DEFINE 0xFFFE0828
INTC_SINTR9_BIT_SINTC DEFINE 0
INTC_SINTR10_BYTE DEFINE 0xFFFE0829
INTC_SINTR10_BIT_SINTC DEFINE 0
INTC_SINTR11_BYTE DEFINE 0xFFFE082A
INTC_SINTR11_BIT_SINTC DEFINE 0
INTC_SINTR12_BYTE DEFINE 0xFFFE082B
INTC_SINTR12_BIT_SINTC DEFINE 0
INTC_SINTR13_BYTE DEFINE 0xFFFE082C
INTC_SINTR13_BIT_SINTC DEFINE 0
INTC_SINTR14_BYTE DEFINE 0xFFFE082D
INTC_SINTR14_BIT_SINTC DEFINE 0
INTC_SINTR15_BYTE DEFINE 0xFFFE082E
INTC_SINTR15_BIT_SINTC DEFINE 0
INTC_wk4 DEFINE 0xFFFE082F
INTC_IPR03_WORD DEFINE 0xFFFE0C00
INTC_IPR03_BIT_IPL_DMAC3 DEFINE 0
INTC_IPR03_BIT_IPL_DMAC2 DEFINE 4
INTC_IPR03_BIT_IPL_DMAC1 DEFINE 8
INTC_IPR03_BIT_IPL_DMAC0 DEFINE 12
INTC_IPR04_WORD DEFINE 0xFFFE0C02
INTC_IPR04_BIT_IPL_DMAC7 DEFINE 0
INTC_IPR04_BIT_IPL_DMAC6 DEFINE 4
INTC_IPR04_BIT_IPL_DMAC5 DEFINE 8
INTC_IPR04_BIT_IPL_DMAC4 DEFINE 12
INTC_IPR05_WORD DEFINE 0xFFFE0C04
INTC_IPR05_BIT_IPL_WDT DEFINE 0
INTC_IPR05_BIT_IPL_CMT1 DEFINE 8
INTC_IPR05_BIT_IPL_CMT0 DEFINE 12
INTC_IPR06_WORD DEFINE 0xFFFE0C06
INTC_IPR06_BIT_IPL_OVIA DEFINE 0
INTC_IPR06_BIT_IPL_ICIA4_5 DEFINE 4
INTC_IPR06_BIT_IPL_ICIA2_3 DEFINE 8
INTC_IPR06_BIT_IPL_ICIA0_1 DEFINE 12
INTC_IPR07_WORD DEFINE 0xFFFE0C08
INTC_IPR07_BIT_IPL_OVIC0 DEFINE 0
INTC_IPR07_BIT_IPL_IMIC00_03 DEFINE 4
INTC_IPR07_BIT_IPL_CMIB6_ICIB0 DEFINE 8
INTC_IPR07_BIT_IPL_CMIB0_1 DEFINE 12
INTC_IPR08_WORD DEFINE 0xFFFE0C0A
INTC_IPR08_BIT_IPL_OVIC2 DEFINE 0
INTC_IPR08_BIT_IPL_IMIC20_23 DEFINE 4
INTC_IPR08_BIT_IPL_OVIC1 DEFINE 8
INTC_IPR08_BIT_IPL_IMIC10_13 DEFINE 12
INTC_IPR09_WORD DEFINE 0xFFFE0C0C
INTC_IPR09_BIT_IPL_OVIC4 DEFINE 0
INTC_IPR09_BIT_IPL_IMIC40_43 DEFINE 4
INTC_IPR09_BIT_IPL_OVIC3 DEFINE 8
INTC_IPR09_BIT_IPL_IMIC30_33 DEFINE 12
INTC_IPR10_WORD DEFINE 0xFFFE0C0E
INTC_IPR10_BIT_IPL_CMID10_13 DEFINE 0
INTC_IPR10_BIT_IPL_UDID00_03 DEFINE 4
INTC_IPR10_BIT_IPL_OVI1D0_2D0 DEFINE 8
INTC_IPR10_BIT_IPL_CMID00_03 DEFINE 12
INTC_IPR11_WORD DEFINE 0xFFFE0C10
INTC_IPR11_BIT_IPL_OVI1D2_2D2 DEFINE 0
INTC_IPR11_BIT_IPL_CMID20_23 DEFINE 4
INTC_IPR11_BIT_IPL_UDID10_13 DEFINE 8
INTC_IPR11_BIT_IPL_OVI1D1_2D1 DEFINE 12
INTC_IPR12_WORD DEFINE 0xFFFE0C12
INTC_IPR12_BIT_IPL_UDID30_33 DEFINE 0
INTC_IPR12_BIT_IPL_OVI1D3_2D3 DEFINE 4
INTC_IPR12_BIT_IPL_CMID30_33 DEFINE 8
INTC_IPR12_BIT_IPL_UDID20_23 DEFINE 12
INTC_IPR13_WORD DEFINE 0xFFFE0C14
INTC_IPR13_BIT_IPL_CMID50_53 DEFINE 0
INTC_IPR13_BIT_IPL_UDID40_43 DEFINE 4
INTC_IPR13_BIT_IPL_OVI1D4_2D4 DEFINE 8
INTC_IPR13_BIT_IPL_CMID40_43 DEFINE 12
INTC_IPR14_WORD DEFINE 0xFFFE0C16
INTC_IPR14_BIT_IPL_CMIE10_13 DEFINE 0
INTC_IPR14_BIT_IPL_CMIE00_03 DEFINE 4
INTC_IPR14_BIT_IPL_UDID50_53 DEFINE 8
INTC_IPR14_BIT_IPL_OVI1D5_2D5 DEFINE 12
INTC_IPR15_WORD DEFINE 0xFFFE0C18
INTC_IPR15_BIT_IPL_CMIE50_53 DEFINE 0
INTC_IPR15_BIT_IPL_CMIE40_43 DEFINE 4
INTC_IPR15_BIT_IPL_CMIE30_33 DEFINE 8
INTC_IPR15_BIT_IPL_CMIE20_23 DEFINE 12
INTC_IPR16_WORD DEFINE 0xFFFE0C1A
INTC_IPR16_BIT_IPL_ICIF12_15 DEFINE 0
INTC_IPR16_BIT_IPL_ICIF8_11 DEFINE 4
INTC_IPR16_BIT_IPL_ICIF4_7 DEFINE 8
INTC_IPR16_BIT_IPL_ICIF0_3 DEFINE 12
INTC_IPR17_WORD DEFINE 0xFFFE0C1C
INTC_IPR17_BIT_IPL_ICIF16_19 DEFINE 12
INTC_IPR18_WORD DEFINE 0xFFFE0C1E
INTC_IPR18_BIT_IPL_OVIF12_15 DEFINE 0
INTC_IPR18_BIT_IPL_OVIF8_11 DEFINE 4
INTC_IPR18_BIT_IPL_OVIF4_7 DEFINE 8
INTC_IPR18_BIT_IPL_OVIF0_3 DEFINE 12
INTC_IPR19_WORD DEFINE 0xFFFE0C20
INTC_IPR19_BIT_IPL_OVIF16_19 DEFINE 12
INTC_IPR20_WORD DEFINE 0xFFFE0C22
INTC_IPR20_BIT_IPL_CMIH DEFINE 4
INTC_IPR20_BIT_IPL_CMIG4_5 DEFINE 8
INTC_IPR20_BIT_IPL_CMIG0_3 DEFINE 12
INTC_IPR21_WORD DEFINE 0xFFFE0C24
INTC_IPR21_BIT_IPL_DOVIJ0_1 DEFINE 4
INTC_IPR21_BIT_IPL_OVIJ0_1 DEFINE 8
INTC_IPR21_BIT_IPL_DFIJ0_1 DEFINE 12
INTC_IPR22_WORD DEFINE 0xFFFE0C26
INTC_IPR22_BIT_IPL_ADID4_7 DEFINE 0
INTC_IPR22_BIT_IPL_ADID0_3 DEFINE 4
INTC_IPR22_BIT_IPL_ADI1 DEFINE 8
INTC_IPR22_BIT_IPL_ADI0 DEFINE 12
INTC_IPR23_WORD DEFINE 0xFFFE0C28
INTC_IPR23_BIT_IPL_ADID41 DEFINE 0
INTC_IPR23_BIT_IPL_ADID40 DEFINE 4
INTC_IPR23_BIT_IPL_ADID12_15 DEFINE 8
INTC_IPR23_BIT_IPL_ADID8_11 DEFINE 12
INTC_IPR24_WORD DEFINE 0xFFFE0C2A
INTC_IPR24_BIT_IPL_ADID45 DEFINE 0
INTC_IPR24_BIT_IPL_ADID44 DEFINE 4
INTC_IPR24_BIT_IPL_ADID43 DEFINE 8
INTC_IPR24_BIT_IPL_ADID42 DEFINE 12
INTC_IPR25_WORD DEFINE 0xFFFE0C2C
INTC_IPR25_BIT_IPL_ADID47 DEFINE 8
INTC_IPR25_BIT_IPL_ADID46 DEFINE 12
INTC_IPR26_WORD DEFINE 0xFFFE0C2E
INTC_IPR26_BIT_IPL_SCID DEFINE 0
INTC_IPR26_BIT_IPL_SCIC DEFINE 4
INTC_IPR26_BIT_IPL_SCIB DEFINE 8
INTC_IPR26_BIT_IPL_SCIA DEFINE 12
INTC_IPR27_WORD DEFINE 0xFFFE0C30
INTC_IPR27_BIT_IPL_RSPIC DEFINE 0
INTC_IPR27_BIT_IPL_RSPIB DEFINE 4
INTC_IPR27_BIT_IPL_RSPIA DEFINE 8
INTC_IPR27_BIT_IPL_SCIE DEFINE 12
INTC_IPR28_WORD DEFINE 0xFFFE0C32
INTC_IPR28_BIT_IPL_RCANC DEFINE 4
INTC_IPR28_BIT_IPL_RCANB DEFINE 8
INTC_IPR28_BIT_IPL_RCANA DEFINE 12
INTC_IPR29_WORD DEFINE 0xFFFE0C34
INTC_IPR29_BIT_IPL_A_DMAC DEFINE 12

/* User Break Controller                        */
UBC_BAR_0 DEFINE 0xFFFC0400
UBC_BAMR_0 DEFINE 0xFFFC0404
UBC_wk1 DEFINE 0xFFFC0408
UBC_BAR_1 DEFINE 0xFFFC0410
UBC_BAMR_1 DEFINE 0xFFFC0414
UBC_wk2 DEFINE 0xFFFC0418
UBC_BAR_2 DEFINE 0xFFFC0420
UBC_BAMR_2 DEFINE 0xFFFC0424
UBC_wk3 DEFINE 0xFFFC0428
UBC_BAR_3 DEFINE 0xFFFC0430
UBC_BAMR_3 DEFINE 0xFFFC0434
UBC_wk4 DEFINE 0xFFFC0438
UBC_BBR_0_WORD DEFINE 0xFFFC04A0
UBC_BBR_0_BIT_SZ0_ DEFINE 0
UBC_BBR_0_BIT_RW0_ DEFINE 2
UBC_BBR_0_BIT_ID0_ DEFINE 4
UBC_BBR_0_BIT_CD0_ DEFINE 6
UBC_BBR_0_BIT_CP0_ DEFINE 8
UBC_BBR_0_BIT_UBID0 DEFINE 13
UBC_wk5 DEFINE 0xFFFC04A2
UBC_BBR_2_WORD DEFINE 0xFFFC04A4
UBC_BBR_2_BIT_SZ2_ DEFINE 0
UBC_BBR_2_BIT_RW2_ DEFINE 2
UBC_BBR_2_BIT_ID2_ DEFINE 4
UBC_BBR_2_BIT_CD2_ DEFINE 6
UBC_BBR_2_BIT_CP2_ DEFINE 8
UBC_BBR_2_BIT_UBID2 DEFINE 13
UBC_wk6 DEFINE 0xFFFC04A6
UBC_BBR_1_WORD DEFINE 0xFFFC04B0
UBC_BBR_1_BIT_SZ1_ DEFINE 0
UBC_BBR_1_BIT_RW1_ DEFINE 2
UBC_BBR_1_BIT_ID1_ DEFINE 4
UBC_BBR_1_BIT_CD1_ DEFINE 6
UBC_BBR_1_BIT_CP1_ DEFINE 8
UBC_BBR_1_BIT_UBID1 DEFINE 13
UBC_wk7 DEFINE 0xFFFC04B2
UBC_BBR_3_WORD DEFINE 0xFFFC04B4
UBC_BBR_3_BIT_SZ3_ DEFINE 0
UBC_BBR_3_BIT_RW3_ DEFINE 2
UBC_BBR_3_BIT_ID3_ DEFINE 4
UBC_BBR_3_BIT_CD3_ DEFINE 6
UBC_BBR_3_BIT_CP3_ DEFINE 8
UBC_BBR_3_BIT_UBID3 DEFINE 13
UBC_wk8 DEFINE 0xFFFC04B6
UBC_BRCR_LONG DEFINE 0xFFFC04C0
UBC_BRCR_BIT_CKS DEFINE 0
UBC_BRCR_BIT_UTOD0 DEFINE 2
UBC_BRCR_BIT_UTOD1 DEFINE 3
UBC_BRCR_BIT_UTOD2 DEFINE 4
UBC_BRCR_BIT_UTOD3 DEFINE 5
UBC_BRCR_BIT_SCMFD3 DEFINE 0
UBC_BRCR_BIT_SCMFD2 DEFINE 1
UBC_BRCR_BIT_SCMFD1 DEFINE 2
UBC_BRCR_BIT_SCMFD0 DEFINE 3
UBC_BRCR_BIT_SCMFC3 DEFINE 4
UBC_BRCR_BIT_SCMFC2 DEFINE 5
UBC_BRCR_BIT_SCMFC1 DEFINE 6
UBC_BRCR_BIT_SCMFC0 DEFINE 7
UBC_BRCR_BIT_PCB0 DEFINE 4
UBC_BRCR_BIT_PCB1 DEFINE 5
UBC_BRCR_BIT_PCB2 DEFINE 6
UBC_BRCR_BIT_PCB3 DEFINE 7

/* Bus State Controller                         */
BSC_CS0BCR_LONG DEFINE 0xFFFC0004
BSC_CS0BCR_BIT_BSZ DEFINE 9
BSC_CS0BCR_BIT_TYPE DEFINE 12
BSC_CS0BCR_BIT_IWRRS DEFINE 16
BSC_CS0BCR_BIT_IWRRD DEFINE 19
BSC_CS0BCR_BIT_IWRWS DEFINE 22
BSC_CS0BCR_BIT_IWRWD DEFINE 25
BSC_CS0BCR_BIT_IWW DEFINE 28
BSC_CS1BCR_LONG DEFINE 0xFFFC0008
BSC_CS1BCR_BIT_BSZ DEFINE 9
BSC_CS1BCR_BIT_TYPE DEFINE 12
BSC_CS1BCR_BIT_IWRRS DEFINE 16
BSC_CS1BCR_BIT_IWRRD DEFINE 19
BSC_CS1BCR_BIT_IWRWS DEFINE 22
BSC_CS1BCR_BIT_IWRWD DEFINE 25
BSC_CS1BCR_BIT_IWW DEFINE 28
BSC_CS2BCR_LONG DEFINE 0xFFFC000C
BSC_CS2BCR_BIT_BSZ DEFINE 9
BSC_CS2BCR_BIT_TYPE DEFINE 12
BSC_CS2BCR_BIT_IWRRS DEFINE 16
BSC_CS2BCR_BIT_IWRRD DEFINE 19
BSC_CS2BCR_BIT_IWRWS DEFINE 22
BSC_CS2BCR_BIT_IWRWD DEFINE 25
BSC_CS2BCR_BIT_IWW DEFINE 28
BSC_CS3BCR_LONG DEFINE 0xFFFC0010
BSC_CS3BCR_BIT_BSZ DEFINE 9
BSC_CS3BCR_BIT_TYPE DEFINE 12
BSC_CS3BCR_BIT_IWRRS DEFINE 16
BSC_CS3BCR_BIT_IWRRD DEFINE 19
BSC_CS3BCR_BIT_IWRWS DEFINE 22
BSC_CS3BCR_BIT_IWRWD DEFINE 25
BSC_CS3BCR_BIT_IWW DEFINE 28
BSC_wk DEFINE 0xFFFC0014
BSC_CS0WCR_LONG DEFINE 0xFFFC0028
BSC_CS0WCR_BIT_HW DEFINE 0
BSC_CS0WCR_BIT_WM DEFINE 6
BSC_CS0WCR_BIT_WR DEFINE 7
BSC_CS0WCR_BIT_SW DEFINE 11
BSC_CS0WCR_BIT_WW DEFINE 16
BSC_CS0WCR_BIT_BAS DEFINE 20
BSC_CS1WCR_LONG DEFINE 0xFFFC002C
BSC_CS1WCR_BIT_HW DEFINE 0
BSC_CS1WCR_BIT_WM DEFINE 6
BSC_CS1WCR_BIT_WR DEFINE 7
BSC_CS1WCR_BIT_SW DEFINE 11
BSC_CS1WCR_BIT_WW DEFINE 16
BSC_CS1WCR_BIT_BAS DEFINE 20
BSC_CS2WCR_LONG DEFINE 0xFFFC0030
BSC_CS2WCR_BIT_HW DEFINE 0
BSC_CS2WCR_BIT_WM DEFINE 6
BSC_CS2WCR_BIT_WR DEFINE 7
BSC_CS2WCR_BIT_SW DEFINE 11
BSC_CS2WCR_BIT_WW DEFINE 16
BSC_CS2WCR_BIT_BAS DEFINE 20
BSC_CS3WCR_LONG DEFINE 0xFFFC0034
BSC_CS3WCR_BIT_HW DEFINE 0
BSC_CS3WCR_BIT_WM DEFINE 6
BSC_CS3WCR_BIT_WR DEFINE 7
BSC_CS3WCR_BIT_SW DEFINE 11
BSC_CS3WCR_BIT_WW DEFINE 16
BSC_CS3WCR_BIT_BAS DEFINE 20

/* Direct Memory Access Controller Channel 0    */
DMAC0_SAR DEFINE 0xFFFE1000
DMAC0_DAR DEFINE 0xFFFE1004
DMAC0_DMATCR DEFINE 0xFFFE1008
DMAC0_CHCR_LONG DEFINE 0xFFFE100C
DMAC0_CHCR_BIT_IFT DEFINE 0
DMAC0_CHCR_BIT_RLD2 DEFINE 2
DMAC0_CHCR_BIT_RLD1 DEFINE 4
DMAC0_CHCR_BIT_TC DEFINE 6
DMAC0_CHCR_BIT_HIE DEFINE 2
DMAC0_CHCR_BIT_RS DEFINE 0
DMAC0_CHCR_BIT_SM DEFINE 4
DMAC0_CHCR_BIT_DM DEFINE 6
DMAC0_CHCR_BIT_DE DEFINE 0
DMAC0_CHCR_BIT_IE DEFINE 2
DMAC0_CHCR_BIT_TS DEFINE 3
DMAC0_CHCR_BIT_TB DEFINE 5
DMAC0_wk1 DEFINE 0xFFFE1010
DMAC0_CHFR_BYTE DEFINE 0xFFFE108C
DMAC0_CHFR_BIT_TE DEFINE 0
DMAC0_CHFR_BIT_HE DEFINE 4
DMAC0_wk2 DEFINE 0xFFFE108D
DMAC0_TEMSK_WORD DEFINE 0xFFFE108E
DMAC0_TEMSK_BIT_TEMASK DEFINE 0
DMAC0_TEMSK_BIT_TEMKEY DEFINE 8
DMAC0_wk3 DEFINE 0xFFFE1090
DMAC0_RSAR DEFINE 0xFFFE1100
DMAC0_RDAR DEFINE 0xFFFE1104
DMAC0_RDMATCR DEFINE 0xFFFE1108
DMAC0_ARCR DEFINE 0xFFFE110C
DMAC0_RARCR DEFINE 0xFFFE110E

/* Direct Memory Access Controller Channel 1    */
DMAC1_SAR DEFINE 0xFFFE1010
DMAC1_DAR DEFINE 0xFFFE1014
DMAC1_DMATCR DEFINE 0xFFFE1018
DMAC1_CHCR_LONG DEFINE 0xFFFE101C
DMAC1_CHCR_BIT_IFT DEFINE 0
DMAC1_CHCR_BIT_RLD2 DEFINE 2
DMAC1_CHCR_BIT_RLD1 DEFINE 4
DMAC1_CHCR_BIT_TC DEFINE 6
DMAC1_CHCR_BIT_HIE DEFINE 2
DMAC1_CHCR_BIT_RS DEFINE 0
DMAC1_CHCR_BIT_SM DEFINE 4
DMAC1_CHCR_BIT_DM DEFINE 6
DMAC1_CHCR_BIT_DE DEFINE 0
DMAC1_CHCR_BIT_IE DEFINE 2
DMAC1_CHCR_BIT_TS DEFINE 3
DMAC1_CHCR_BIT_TB DEFINE 5
DMAC1_wk1 DEFINE 0xFFFE1020
DMAC1_CHFR_BYTE DEFINE 0xFFFE109C
DMAC1_CHFR_BIT_TE DEFINE 0
DMAC1_CHFR_BIT_HE DEFINE 4
DMAC1_wk2 DEFINE 0xFFFE109D
DMAC1_TEMSK_WORD DEFINE 0xFFFE109E
DMAC1_TEMSK_BIT_TEMASK DEFINE 0
DMAC1_TEMSK_BIT_TEMKEY DEFINE 8
DMAC1_wk3 DEFINE 0xFFFE10A0
DMAC1_RSAR DEFINE 0xFFFE1110
DMAC1_RDAR DEFINE 0xFFFE1114
DMAC1_RDMATCR DEFINE 0xFFFE1118
DMAC1_ARCR DEFINE 0xFFFE111C
DMAC1_RARCR DEFINE 0xFFFE111E

/* Direct Memory Access Controller Channel 2    */
DMAC2_SAR DEFINE 0xFFFE1020
DMAC2_DAR DEFINE 0xFFFE1024
DMAC2_DMATCR DEFINE 0xFFFE1028
DMAC2_CHCR_LONG DEFINE 0xFFFE102C
DMAC2_CHCR_BIT_IFT DEFINE 0
DMAC2_CHCR_BIT_RLD2 DEFINE 2
DMAC2_CHCR_BIT_RLD1 DEFINE 4
DMAC2_CHCR_BIT_TC DEFINE 6
DMAC2_CHCR_BIT_HIE DEFINE 2
DMAC2_CHCR_BIT_RS DEFINE 0
DMAC2_CHCR_BIT_SM DEFINE 4
DMAC2_CHCR_BIT_DM DEFINE 6
DMAC2_CHCR_BIT_DE DEFINE 0
DMAC2_CHCR_BIT_IE DEFINE 2
DMAC2_CHCR_BIT_TS DEFINE 3
DMAC2_CHCR_BIT_TB DEFINE 5
DMAC2_wk1 DEFINE 0xFFFE1030
DMAC2_CHFR_BYTE DEFINE 0xFFFE10AC
DMAC2_CHFR_BIT_TE DEFINE 0
DMAC2_CHFR_BIT_HE DEFINE 4
DMAC2_wk2 DEFINE 0xFFFE10AD
DMAC2_TEMSK_WORD DEFINE 0xFFFE10AE
DMAC2_TEMSK_BIT_TEMASK DEFINE 0
DMAC2_TEMSK_BIT_TEMKEY DEFINE 8
DMAC2_wk3 DEFINE 0xFFFE10B0
DMAC2_RSAR DEFINE 0xFFFE1120
DMAC2_RDAR DEFINE 0xFFFE1124
DMAC2_RDMATCR DEFINE 0xFFFE1128
DMAC2_ARCR DEFINE 0xFFFE112C
DMAC2_RARCR DEFINE 0xFFFE112E

/* Direct Memory Access Controller Channel 3    */
DMAC3_SAR DEFINE 0xFFFE1030
DMAC3_DAR DEFINE 0xFFFE1034
DMAC3_DMATCR DEFINE 0xFFFE1038
DMAC3_CHCR_LONG DEFINE 0xFFFE103C
DMAC3_CHCR_BIT_IFT DEFINE 0
DMAC3_CHCR_BIT_RLD2 DEFINE 2
DMAC3_CHCR_BIT_RLD1 DEFINE 4
DMAC3_CHCR_BIT_TC DEFINE 6
DMAC3_CHCR_BIT_HIE DEFINE 2
DMAC3_CHCR_BIT_RS DEFINE 0
DMAC3_CHCR_BIT_SM DEFINE 4
DMAC3_CHCR_BIT_DM DEFINE 6
DMAC3_CHCR_BIT_DE DEFINE 0
DMAC3_CHCR_BIT_IE DEFINE 2
DMAC3_CHCR_BIT_TS DEFINE 3
DMAC3_CHCR_BIT_TB DEFINE 5
DMAC3_wk1 DEFINE 0xFFFE1040
DMAC3_CHFR_BYTE DEFINE 0xFFFE10BC
DMAC3_CHFR_BIT_TE DEFINE 0
DMAC3_CHFR_BIT_HE DEFINE 4
DMAC3_wk2 DEFINE 0xFFFE10BD
DMAC3_TEMSK_WORD DEFINE 0xFFFE10BE
DMAC3_TEMSK_BIT_TEMASK DEFINE 0
DMAC3_TEMSK_BIT_TEMKEY DEFINE 8
DMAC3_wk3 DEFINE 0xFFFE10C0
DMAC3_RSAR DEFINE 0xFFFE1130
DMAC3_RDAR DEFINE 0xFFFE1134
DMAC3_RDMATCR DEFINE 0xFFFE1138
DMAC3_ARCR DEFINE 0xFFFE113C
DMAC3_RARCR DEFINE 0xFFFE113E

/* Direct Memory Access Controller Channel 4    */
DMAC4_SAR DEFINE 0xFFFE1040
DMAC4_DAR DEFINE 0xFFFE1044
DMAC4_DMATCR DEFINE 0xFFFE1048
DMAC4_CHCR_LONG DEFINE 0xFFFE104C
DMAC4_CHCR_BIT_IFT DEFINE 0
DMAC4_CHCR_BIT_RLD2 DEFINE 2
DMAC4_CHCR_BIT_RLD1 DEFINE 4
DMAC4_CHCR_BIT_TC DEFINE 6
DMAC4_CHCR_BIT_HIE DEFINE 2
DMAC4_CHCR_BIT_RS DEFINE 0
DMAC4_CHCR_BIT_SM DEFINE 4
DMAC4_CHCR_BIT_DM DEFINE 6
DMAC4_CHCR_BIT_DE DEFINE 0
DMAC4_CHCR_BIT_IE DEFINE 2
DMAC4_CHCR_BIT_TS DEFINE 3
DMAC4_CHCR_BIT_TB DEFINE 5
DMAC4_wk1 DEFINE 0xFFFE1050
DMAC4_CHFR_BYTE DEFINE 0xFFFE10CC
DMAC4_CHFR_BIT_TE DEFINE 0
DMAC4_CHFR_BIT_HE DEFINE 4
DMAC4_wk2 DEFINE 0xFFFE10CD
DMAC4_TEMSK_WORD DEFINE 0xFFFE10CE
DMAC4_TEMSK_BIT_TEMASK DEFINE 0
DMAC4_TEMSK_BIT_TEMKEY DEFINE 8
DMAC4_wk3 DEFINE 0xFFFE10D0
DMAC4_RSAR DEFINE 0xFFFE1140
DMAC4_RDAR DEFINE 0xFFFE1144
DMAC4_RDMATCR DEFINE 0xFFFE1148
DMAC4_ARCR DEFINE 0xFFFE114C
DMAC4_RARCR DEFINE 0xFFFE114E

/* Direct Memory Access Controller Channel 5    */
DMAC5_SAR DEFINE 0xFFFE1050
DMAC5_DAR DEFINE 0xFFFE1054
DMAC5_DMATCR DEFINE 0xFFFE1058
DMAC5_CHCR_LONG DEFINE 0xFFFE105C
DMAC5_CHCR_BIT_IFT DEFINE 0
DMAC5_CHCR_BIT_RLD2 DEFINE 2
DMAC5_CHCR_BIT_RLD1 DEFINE 4
DMAC5_CHCR_BIT_TC DEFINE 6
DMAC5_CHCR_BIT_HIE DEFINE 2
DMAC5_CHCR_BIT_RS DEFINE 0
DMAC5_CHCR_BIT_SM DEFINE 4
DMAC5_CHCR_BIT_DM DEFINE 6
DMAC5_CHCR_BIT_DE DEFINE 0
DMAC5_CHCR_BIT_IE DEFINE 2
DMAC5_CHCR_BIT_TS DEFINE 3
DMAC5_CHCR_BIT_TB DEFINE 5
DMAC5_wk1 DEFINE 0xFFFE1060
DMAC5_CHFR_BYTE DEFINE 0xFFFE10DC
DMAC5_CHFR_BIT_TE DEFINE 0
DMAC5_CHFR_BIT_HE DEFINE 4
DMAC5_wk2 DEFINE 0xFFFE10DD
DMAC5_TEMSK_WORD DEFINE 0xFFFE10DE
DMAC5_TEMSK_BIT_TEMASK DEFINE 0
DMAC5_TEMSK_BIT_TEMKEY DEFINE 8
DMAC5_wk3 DEFINE 0xFFFE10E0
DMAC5_RSAR DEFINE 0xFFFE1150
DMAC5_RDAR DEFINE 0xFFFE1154
DMAC5_RDMATCR DEFINE 0xFFFE1158
DMAC5_ARCR DEFINE 0xFFFE115C
DMAC5_RARCR DEFINE 0xFFFE115E

/* Direct Memory Access Controller Channel 6    */
DMAC6_SAR DEFINE 0xFFFE1060
DMAC6_DAR DEFINE 0xFFFE1064
DMAC6_DMATCR DEFINE 0xFFFE1068
DMAC6_CHCR_LONG DEFINE 0xFFFE106C
DMAC6_CHCR_BIT_IFT DEFINE 0
DMAC6_CHCR_BIT_RLD2 DEFINE 2
DMAC6_CHCR_BIT_RLD1 DEFINE 4
DMAC6_CHCR_BIT_TC DEFINE 6
DMAC6_CHCR_BIT_HIE DEFINE 2
DMAC6_CHCR_BIT_RS DEFINE 0
DMAC6_CHCR_BIT_SM DEFINE 4
DMAC6_CHCR_BIT_DM DEFINE 6
DMAC6_CHCR_BIT_DE DEFINE 0
DMAC6_CHCR_BIT_IE DEFINE 2
DMAC6_CHCR_BIT_TS DEFINE 3
DMAC6_CHCR_BIT_TB DEFINE 5
DMAC6_wk1 DEFINE 0xFFFE1070
DMAC6_CHFR_BYTE DEFINE 0xFFFE10EC
DMAC6_CHFR_BIT_TE DEFINE 0
DMAC6_CHFR_BIT_HE DEFINE 4
DMAC6_wk2 DEFINE 0xFFFE10ED
DMAC6_TEMSK_WORD DEFINE 0xFFFE10EE
DMAC6_TEMSK_BIT_TEMASK DEFINE 0
DMAC6_TEMSK_BIT_TEMKEY DEFINE 8
DMAC6_wk3 DEFINE 0xFFFE10F0
DMAC6_RSAR DEFINE 0xFFFE1160
DMAC6_RDAR DEFINE 0xFFFE1164
DMAC6_RDMATCR DEFINE 0xFFFE1168
DMAC6_ARCR DEFINE 0xFFFE116C
DMAC6_RARCR DEFINE 0xFFFE116E

/* Direct Memory Access Controller Channel 7    */
DMAC7_SAR DEFINE 0xFFFE1070
DMAC7_DAR DEFINE 0xFFFE1074
DMAC7_DMATCR DEFINE 0xFFFE1078
DMAC7_CHCR_LONG DEFINE 0xFFFE107C
DMAC7_CHCR_BIT_IFT DEFINE 0
DMAC7_CHCR_BIT_RLD2 DEFINE 2
DMAC7_CHCR_BIT_RLD1 DEFINE 4
DMAC7_CHCR_BIT_TC DEFINE 6
DMAC7_CHCR_BIT_HIE DEFINE 2
DMAC7_CHCR_BIT_RS DEFINE 0
DMAC7_CHCR_BIT_SM DEFINE 4
DMAC7_CHCR_BIT_DM DEFINE 6
DMAC7_CHCR_BIT_DE DEFINE 0
DMAC7_CHCR_BIT_IE DEFINE 2
DMAC7_CHCR_BIT_TS DEFINE 3
DMAC7_CHCR_BIT_TB DEFINE 5
DMAC7_wk1 DEFINE 0xFFFE1080
DMAC7_CHFR_BYTE DEFINE 0xFFFE10FC
DMAC7_CHFR_BIT_TE DEFINE 0
DMAC7_CHFR_BIT_HE DEFINE 4
DMAC7_wk2 DEFINE 0xFFFE10FD
DMAC7_TEMSK_WORD DEFINE 0xFFFE10FE
DMAC7_TEMSK_BIT_TEMASK DEFINE 0
DMAC7_TEMSK_BIT_TEMKEY DEFINE 8
DMAC7_wk3 DEFINE 0xFFFE1100
DMAC7_RSAR DEFINE 0xFFFE1170
DMAC7_RDAR DEFINE 0xFFFE1174
DMAC7_RDMATCR DEFINE 0xFFFE1178
DMAC7_ARCR DEFINE 0xFFFE117C
DMAC7_RARCR DEFINE 0xFFFE117E

/* Direct Memory Access Controller Control      */
DMACCOM_DMAOR_WORD DEFINE 0xFFFE1200
DMACCOM_DMAOR_BIT_PR DEFINE 0
DMACCOM_DMAOR_BIT_CMS DEFINE 4
DMACCOM_DMAOR_BIT_DME DEFINE 0
DMACCOM_wk1 DEFINE 0xFFFE1202
DMACCOM_DMAFR_BYTE DEFINE 0xFFFE1204
DMACCOM_DMAFR_BIT_NMIF DEFINE 0
DMACCOM_DMAFR_BIT_AE DEFINE 4
DMACCOM_wk2 DEFINE 0xFFFE1205
DMACCOM_DMARS0_DMARS_WORD DEFINE 0xFFFE1300
DMACCOM_DMARS0_DMARS_BIT_EVENCHRID DEFINE 0
DMACCOM_DMARS0_DMARS_BIT_EVENCHMID DEFINE 2
DMACCOM_DMARS0_DMARS_BIT_ODDCHRID DEFINE 8
DMACCOM_DMARS0_DMARS_BIT_ODDCHMID DEFINE 10
DMACCOM_DMARS0_wk DEFINE 0xFFFE1302
DMACCOM_DMARS1_DMARS_WORD DEFINE 0xFFFE1304
DMACCOM_DMARS1_DMARS_BIT_EVENCHRID DEFINE 0
DMACCOM_DMARS1_DMARS_BIT_EVENCHMID DEFINE 2
DMACCOM_DMARS1_DMARS_BIT_ODDCHRID DEFINE 8
DMACCOM_DMARS1_DMARS_BIT_ODDCHMID DEFINE 10
DMACCOM_DMARS1_wk DEFINE 0xFFFE1306
DMACCOM_DMARS2_DMARS_WORD DEFINE 0xFFFE1308
DMACCOM_DMARS2_DMARS_BIT_EVENCHRID DEFINE 0
DMACCOM_DMARS2_DMARS_BIT_EVENCHMID DEFINE 2
DMACCOM_DMARS2_DMARS_BIT_ODDCHRID DEFINE 8
DMACCOM_DMARS2_DMARS_BIT_ODDCHMID DEFINE 10
DMACCOM_DMARS2_wk DEFINE 0xFFFE130A
DMACCOM_DMARS3_DMARS_WORD DEFINE 0xFFFE130C
DMACCOM_DMARS3_DMARS_BIT_EVENCHRID DEFINE 0
DMACCOM_DMARS3_DMARS_BIT_EVENCHMID DEFINE 2
DMACCOM_DMARS3_DMARS_BIT_ODDCHRID DEFINE 8
DMACCOM_DMARS3_DMARS_BIT_ODDCHMID DEFINE 10
DMACCOM_DMARS3_wk DEFINE 0xFFFE130E

/* Automotive Direct Memory Access Controller   */
ADMAC_ADMAOR_BYTE DEFINE 0xFFFE6000
ADMAC_ADMAOR_BIT_DME DEFINE 0
ADMAC_wk1 DEFINE 0xFFFE6001
ADMAC_ADMAABR_BYTE DEFINE 0xFFFE6002
ADMAC_ADMAABR_BIT_AA DEFINE 0
ADMAC_wk2 DEFINE 0xFFFE6003
ADMAC_ADMAIE0_BYTE DEFINE 0xFFFE6010
ADMAC_ADMAIE0_BIT_Channel2 DEFINE 2
ADMAC_ADMAIE0_BIT_Channel3 DEFINE 3
ADMAC_ADMAIE0_BIT_Channel4 DEFINE 4
ADMAC_ADMAIE0_BIT_Channel5 DEFINE 5
ADMAC_ADMAIE0_BIT_Channel6 DEFINE 6
ADMAC_ADMAIE0_BIT_Channel7 DEFINE 7
ADMAC_ADMAIE1_BYTE DEFINE 0xFFFE6011
ADMAC_ADMAIE1_BIT_Channel8 DEFINE 0
ADMAC_ADMAIE1_BIT_Channel9 DEFINE 1
ADMAC_ADMAIE1_BIT_Channel10 DEFINE 2
ADMAC_ADMAIE1_BIT_Channel11 DEFINE 3
ADMAC_ADMAIE1_BIT_Channel12 DEFINE 4
ADMAC_ADMAIE1_BIT_Channel13 DEFINE 5
ADMAC_ADMAIE1_BIT_Channel14 DEFINE 6
ADMAC_ADMAIE1_BIT_Channel15 DEFINE 7
ADMAC_ADMAIE2_BYTE DEFINE 0xFFFE6012
ADMAC_ADMAIE2_BIT_Channel16 DEFINE 0
ADMAC_ADMAIE2_BIT_Channel17 DEFINE 1
ADMAC_ADMAIE2_BIT_Channel18 DEFINE 2
ADMAC_ADMAIE2_BIT_Channel19 DEFINE 3
ADMAC_ADMAIE2_BIT_Channel20 DEFINE 4
ADMAC_ADMAIE2_BIT_Channel21 DEFINE 5
ADMAC_ADMAIE2_BIT_Channel22 DEFINE 6
ADMAC_ADMAIE2_BIT_Channel23 DEFINE 7
ADMAC_ADMAIE3_BYTE DEFINE 0xFFFE6013
ADMAC_ADMAIE3_BIT_Channel24 DEFINE 0
ADMAC_ADMAIE3_BIT_Channel25 DEFINE 1
ADMAC_ADMAIE3_BIT_Channel26 DEFINE 2
ADMAC_ADMAIE3_BIT_Channel27 DEFINE 3
ADMAC_ADMAIE3_BIT_Channel28 DEFINE 4
ADMAC_ADMAIE3_BIT_Channel29 DEFINE 5
ADMAC_ADMAIE3_BIT_Channel30 DEFINE 6
ADMAC_ADMAIE3_BIT_Channel31 DEFINE 7
ADMAC_ADMAIE4_BYTE DEFINE 0xFFFE6014
ADMAC_ADMAIE4_BIT_Channel32 DEFINE 0
ADMAC_ADMAIE4_BIT_Channel33 DEFINE 1
ADMAC_ADMAIE4_BIT_Channel34 DEFINE 2
ADMAC_ADMAIE4_BIT_Channel35 DEFINE 3
ADMAC_ADMAIE4_BIT_Channel36 DEFINE 4
ADMAC_ADMAIE4_BIT_Channel37 DEFINE 5
ADMAC_ADMAIE4_BIT_Channel38 DEFINE 6
ADMAC_ADMAIE4_BIT_Channel39 DEFINE 7
ADMAC_ADMAIE5_BYTE DEFINE 0xFFFE6015
ADMAC_ADMAIE5_BIT_Channel40 DEFINE 0
ADMAC_ADMAIE5_BIT_Channel41 DEFINE 1
ADMAC_ADMAIE5_BIT_Channel42 DEFINE 2
ADMAC_ADMAIE5_BIT_Channel43 DEFINE 3
ADMAC_ADMAIE5_BIT_Channel44 DEFINE 4
ADMAC_ADMAIE5_BIT_Channel45 DEFINE 5
ADMAC_ADMAIE5_BIT_Channel46 DEFINE 6
ADMAC_ADMAIE5_BIT_Channel47 DEFINE 7
ADMAC_wk3 DEFINE 0xFFFE6016
ADMAC_ADMAIE7_BYTE DEFINE 0xFFFE6017
ADMAC_ADMAIE7_BIT_Channel56 DEFINE 0
ADMAC_ADMAIE7_BIT_Channel57 DEFINE 1
ADMAC_ADMAIE7_BIT_Channel58 DEFINE 2
ADMAC_ADMAIE7_BIT_Channel59 DEFINE 3
ADMAC_ADMAIE7_BIT_Channel60 DEFINE 4
ADMAC_ADMAIE7_BIT_Channel61 DEFINE 5
ADMAC_ADMAIE7_BIT_Channel62 DEFINE 6
ADMAC_ADMAIE7_BIT_Channel63 DEFINE 7
ADMAC_ADMAIE8_BYTE DEFINE 0xFFFE6018
ADMAC_ADMAIE8_BIT_Channel64 DEFINE 0
ADMAC_ADMAIE8_BIT_Channel65 DEFINE 1
ADMAC_ADMAIE8_BIT_Channel66 DEFINE 2
ADMAC_ADMAIE8_BIT_Channel67 DEFINE 3
ADMAC_ADMAIE8_BIT_Channel68 DEFINE 4
ADMAC_ADMAIE8_BIT_Channel69 DEFINE 5
ADMAC_ADMAIE8_BIT_Channel70 DEFINE 6
ADMAC_ADMAIE8_BIT_Channel71 DEFINE 7
ADMAC_ADMAIE9_BYTE DEFINE 0xFFFE6019
ADMAC_ADMAIE9_BIT_Channel74 DEFINE 2
ADMAC_wk4 DEFINE 0xFFFE601A
ADMAC_ADMADV0_BYTE DEFINE 0xFFFE6020
ADMAC_ADMADV0_BIT_Channel2 DEFINE 2
ADMAC_ADMADV0_BIT_Channel3 DEFINE 3
ADMAC_ADMADV0_BIT_Channel4 DEFINE 4
ADMAC_ADMADV0_BIT_Channel5 DEFINE 5
ADMAC_ADMADV0_BIT_Channel6 DEFINE 6
ADMAC_ADMADV0_BIT_Channel7 DEFINE 7
ADMAC_ADMADV1_BYTE DEFINE 0xFFFE6021
ADMAC_ADMADV1_BIT_Channel8 DEFINE 0
ADMAC_ADMADV1_BIT_Channel9 DEFINE 1
ADMAC_ADMADV1_BIT_Channel10 DEFINE 2
ADMAC_ADMADV1_BIT_Channel11 DEFINE 3
ADMAC_ADMADV1_BIT_Channel12 DEFINE 4
ADMAC_ADMADV1_BIT_Channel13 DEFINE 5
ADMAC_ADMADV1_BIT_Channel14 DEFINE 6
ADMAC_ADMADV1_BIT_Channel15 DEFINE 7
ADMAC_ADMADV2_BYTE DEFINE 0xFFFE6022
ADMAC_ADMADV2_BIT_Channel16 DEFINE 0
ADMAC_ADMADV2_BIT_Channel17 DEFINE 1
ADMAC_ADMADV2_BIT_Channel18 DEFINE 2
ADMAC_ADMADV2_BIT_Channel19 DEFINE 3
ADMAC_ADMADV2_BIT_Channel20 DEFINE 4
ADMAC_ADMADV2_BIT_Channel21 DEFINE 5
ADMAC_ADMADV2_BIT_Channel22 DEFINE 6
ADMAC_ADMADV2_BIT_Channel23 DEFINE 7
ADMAC_ADMADV3_BYTE DEFINE 0xFFFE6023
ADMAC_ADMADV3_BIT_Channel24 DEFINE 0
ADMAC_ADMADV3_BIT_Channel25 DEFINE 1
ADMAC_ADMADV3_BIT_Channel26 DEFINE 2
ADMAC_ADMADV3_BIT_Channel27 DEFINE 3
ADMAC_ADMADV3_BIT_Channel28 DEFINE 4
ADMAC_ADMADV3_BIT_Channel29 DEFINE 5
ADMAC_ADMADV3_BIT_Channel30 DEFINE 6
ADMAC_ADMADV3_BIT_Channel31 DEFINE 7
ADMAC_ADMADV4_BYTE DEFINE 0xFFFE6024
ADMAC_ADMADV4_BIT_Channel32 DEFINE 0
ADMAC_ADMADV4_BIT_Channel33 DEFINE 1
ADMAC_ADMADV4_BIT_Channel34 DEFINE 2
ADMAC_ADMADV4_BIT_Channel35 DEFINE 3
ADMAC_ADMADV4_BIT_Channel36 DEFINE 4
ADMAC_ADMADV4_BIT_Channel37 DEFINE 5
ADMAC_ADMADV4_BIT_Channel38 DEFINE 6
ADMAC_ADMADV4_BIT_Channel39 DEFINE 7
ADMAC_ADMADV5_BYTE DEFINE 0xFFFE6025
ADMAC_ADMADV5_BIT_Channel40 DEFINE 0
ADMAC_ADMADV5_BIT_Channel41 DEFINE 1
ADMAC_ADMADV5_BIT_Channel42 DEFINE 2
ADMAC_ADMADV5_BIT_Channel43 DEFINE 3
ADMAC_ADMADV5_BIT_Channel44 DEFINE 4
ADMAC_ADMADV5_BIT_Channel45 DEFINE 5
ADMAC_ADMADV5_BIT_Channel46 DEFINE 6
ADMAC_ADMADV5_BIT_Channel47 DEFINE 7
ADMAC_wk5 DEFINE 0xFFFE6026
ADMAC_ADMATE0_BYTE DEFINE 0xFFFE6030
ADMAC_ADMATE0_BIT_Channel56 DEFINE 0
ADMAC_ADMATE0_BIT_Channel57 DEFINE 1
ADMAC_ADMATE0_BIT_Channel58 DEFINE 2
ADMAC_ADMATE0_BIT_Channel59 DEFINE 3
ADMAC_ADMATE0_BIT_Channel60 DEFINE 4
ADMAC_ADMATE0_BIT_Channel61 DEFINE 5
ADMAC_ADMATE0_BIT_Channel62 DEFINE 6
ADMAC_ADMATE0_BIT_Channel63 DEFINE 7
ADMAC_ADMATE1_BYTE DEFINE 0xFFFE6031
ADMAC_ADMATE1_BIT_Channel64 DEFINE 0
ADMAC_ADMATE1_BIT_Channel65 DEFINE 1
ADMAC_ADMATE1_BIT_Channel66 DEFINE 2
ADMAC_ADMATE1_BIT_Channel67 DEFINE 3
ADMAC_ADMATE1_BIT_Channel68 DEFINE 4
ADMAC_ADMATE1_BIT_Channel69 DEFINE 5
ADMAC_ADMATE1_BIT_Channel70 DEFINE 6
ADMAC_ADMATE1_BIT_Channel71 DEFINE 7
ADMAC_ADMATE2_BYTE DEFINE 0xFFFE6032
ADMAC_ADMATE2_BIT_Channel74 DEFINE 2
ADMAC_wk6 DEFINE 0xFFFE6033
ADMAC_ADMADE0_BYTE DEFINE 0xFFFE6040
ADMAC_ADMADE0_BIT_Channel2 DEFINE 2
ADMAC_ADMADE0_BIT_Channel3 DEFINE 3
ADMAC_ADMADE0_BIT_Channel4 DEFINE 4
ADMAC_ADMADE0_BIT_Channel5 DEFINE 5
ADMAC_ADMADE0_BIT_Channel6 DEFINE 6
ADMAC_ADMADE0_BIT_Channel7 DEFINE 7
ADMAC_ADMADE1_BYTE DEFINE 0xFFFE6041
ADMAC_ADMADE1_BIT_Channel8 DEFINE 0
ADMAC_ADMADE1_BIT_Channel9 DEFINE 1
ADMAC_ADMADE1_BIT_Channel10 DEFINE 2
ADMAC_ADMADE1_BIT_Channel11 DEFINE 3
ADMAC_ADMADE1_BIT_Channel12 DEFINE 4
ADMAC_ADMADE1_BIT_Channel13 DEFINE 5
ADMAC_ADMADE1_BIT_Channel14 DEFINE 6
ADMAC_ADMADE1_BIT_Channel15 DEFINE 7
ADMAC_ADMADE2_BYTE DEFINE 0xFFFE6042
ADMAC_ADMADE2_BIT_Channel16 DEFINE 0
ADMAC_ADMADE2_BIT_Channel17 DEFINE 1
ADMAC_ADMADE2_BIT_Channel18 DEFINE 2
ADMAC_ADMADE2_BIT_Channel19 DEFINE 3
ADMAC_ADMADE2_BIT_Channel20 DEFINE 4
ADMAC_ADMADE2_BIT_Channel21 DEFINE 5
ADMAC_ADMADE2_BIT_Channel22 DEFINE 6
ADMAC_ADMADE2_BIT_Channel23 DEFINE 7
ADMAC_ADMADE3_BYTE DEFINE 0xFFFE6043
ADMAC_ADMADE3_BIT_Channel24 DEFINE 0
ADMAC_ADMADE3_BIT_Channel25 DEFINE 1
ADMAC_ADMADE3_BIT_Channel26 DEFINE 2
ADMAC_ADMADE3_BIT_Channel27 DEFINE 3
ADMAC_ADMADE3_BIT_Channel28 DEFINE 4
ADMAC_ADMADE3_BIT_Channel29 DEFINE 5
ADMAC_ADMADE3_BIT_Channel30 DEFINE 6
ADMAC_ADMADE3_BIT_Channel31 DEFINE 7
ADMAC_ADMADE4_BYTE DEFINE 0xFFFE6044
ADMAC_ADMADE4_BIT_Channel32 DEFINE 0
ADMAC_ADMADE4_BIT_Channel33 DEFINE 1
ADMAC_ADMADE4_BIT_Channel34 DEFINE 2
ADMAC_ADMADE4_BIT_Channel35 DEFINE 3
ADMAC_ADMADE4_BIT_Channel36 DEFINE 4
ADMAC_ADMADE4_BIT_Channel37 DEFINE 5
ADMAC_ADMADE4_BIT_Channel38 DEFINE 6
ADMAC_ADMADE4_BIT_Channel39 DEFINE 7
ADMAC_ADMADE5_BYTE DEFINE 0xFFFE6045
ADMAC_ADMADE5_BIT_Channel40 DEFINE 0
ADMAC_ADMADE5_BIT_Channel41 DEFINE 1
ADMAC_ADMADE5_BIT_Channel42 DEFINE 2
ADMAC_ADMADE5_BIT_Channel43 DEFINE 3
ADMAC_ADMADE5_BIT_Channel44 DEFINE 4
ADMAC_ADMADE5_BIT_Channel45 DEFINE 5
ADMAC_ADMADE5_BIT_Channel46 DEFINE 6
ADMAC_ADMADE5_BIT_Channel47 DEFINE 7
ADMAC_wk7 DEFINE 0xFFFE6046
ADMAC_ADMADE7_BYTE DEFINE 0xFFFE6047
ADMAC_ADMADE7_BIT_Channel72 DEFINE 0
ADMAC_ADMADE7_BIT_Channel74 DEFINE 2
ADMAC_wk8 DEFINE 0xFFFE6048
ADMAC_ADMAMODE0_BYTE DEFINE 0xFFFE6050
ADMAC_ADMAMODE0_BIT_Channel28 DEFINE 4
ADMAC_ADMAMODE0_BIT_Channel29 DEFINE 5
ADMAC_ADMAMODE0_BIT_Channel30 DEFINE 6
ADMAC_ADMAMODE0_BIT_Channel31 DEFINE 7
ADMAC_ADMAMODE1_BYTE DEFINE 0xFFFE6051
ADMAC_ADMAMODE1_BIT_Channel32 DEFINE 0
ADMAC_ADMAMODE1_BIT_Channel33 DEFINE 1
ADMAC_ADMAMODE1_BIT_Channel34 DEFINE 2
ADMAC_ADMAMODE1_BIT_Channel35 DEFINE 3
ADMAC_ADMAMODE1_BIT_Channel36 DEFINE 4
ADMAC_ADMAMODE1_BIT_Channel37 DEFINE 5
ADMAC_ADMAMODE1_BIT_Channel38 DEFINE 6
ADMAC_ADMAMODE1_BIT_Channel39 DEFINE 7
ADMAC_ADMAMODE2_BYTE DEFINE 0xFFFE6052
ADMAC_ADMAMODE2_BIT_Channel40 DEFINE 0
ADMAC_ADMAMODE2_BIT_Channel41 DEFINE 1
ADMAC_ADMAMODE2_BIT_Channel42 DEFINE 2
ADMAC_ADMAMODE2_BIT_Channel43 DEFINE 3
ADMAC_ADMAMODE2_BIT_Channel44 DEFINE 4
ADMAC_ADMAMODE2_BIT_Channel45 DEFINE 5
ADMAC_ADMAMODE2_BIT_Channel46 DEFINE 6
ADMAC_ADMAMODE2_BIT_Channel47 DEFINE 7
ADMAC_wk9 DEFINE 0xFFFE6053
ADMAC_ADMATCR0 DEFINE 0xFFFE6060
ADMAC_ADMARTCR0 DEFINE 0xFFFE6062
ADMAC_ADMATCR1 DEFINE 0xFFFE6064
ADMAC_ADMARTCR1 DEFINE 0xFFFE6066
ADMAC_wk10 DEFINE 0xFFFE6068
ADMAC_ADMATCR56 DEFINE 0xFFFE6070
ADMAC_ADMATCR57 DEFINE 0xFFFE6072
ADMAC_ADMATCR58 DEFINE 0xFFFE6074
ADMAC_ADMATCR59 DEFINE 0xFFFE6076
ADMAC_ADMATCR60 DEFINE 0xFFFE6078
ADMAC_ADMATCR61 DEFINE 0xFFFE607A
ADMAC_ADMATCR62 DEFINE 0xFFFE607C
ADMAC_ADMATCR63 DEFINE 0xFFFE607E
ADMAC_ADMATCR64 DEFINE 0xFFFE6080
ADMAC_ADMATCR65 DEFINE 0xFFFE6082
ADMAC_ADMATCR66 DEFINE 0xFFFE6084
ADMAC_ADMATCR67 DEFINE 0xFFFE6086
ADMAC_ADMATCR68 DEFINE 0xFFFE6088
ADMAC_ADMATCR69 DEFINE 0xFFFE608A
ADMAC_ADMATCR70 DEFINE 0xFFFE608C
ADMAC_ADMATCR71 DEFINE 0xFFFE608E
ADMAC_ADMAAR0 DEFINE 0xFFFE6090
ADMAC_ADMARAR0 DEFINE 0xFFFE6092
ADMAC_ADMAAR1 DEFINE 0xFFFE6094
ADMAC_ADMARAR1 DEFINE 0xFFFE6096
ADMAC_wk11 DEFINE 0xFFFE6098
ADMAC_ADMAAR56 DEFINE 0xFFFE60A0
ADMAC_ADMAAR57 DEFINE 0xFFFE60A2
ADMAC_ADMAAR58 DEFINE 0xFFFE60A4
ADMAC_ADMAAR59 DEFINE 0xFFFE60A6
ADMAC_ADMAAR60 DEFINE 0xFFFE60A8
ADMAC_ADMAAR61 DEFINE 0xFFFE60AA
ADMAC_ADMAAR62 DEFINE 0xFFFE60AC
ADMAC_ADMAAR63 DEFINE 0xFFFE60AE
ADMAC_ADMAAR64 DEFINE 0xFFFE60B0
ADMAC_ADMAAR65 DEFINE 0xFFFE60B2
ADMAC_ADMAAR66 DEFINE 0xFFFE60B4
ADMAC_ADMAAR67 DEFINE 0xFFFE60B6
ADMAC_ADMAAR68 DEFINE 0xFFFE60B8
ADMAC_ADMAAR69 DEFINE 0xFFFE60BA
ADMAC_ADMAAR70 DEFINE 0xFFFE60BC
ADMAC_ADMAAR71 DEFINE 0xFFFE60BE
ADMAC_ADMABUF2 DEFINE 0xFFFE60C0
ADMAC_ADMABUF3 DEFINE 0xFFFE60C4
ADMAC_ADMABUF4 DEFINE 0xFFFE60C8
ADMAC_ADMABUF5 DEFINE 0xFFFE60CC
ADMAC_ADMABUF6 DEFINE 0xFFFE60D0
ADMAC_ADMABUF7 DEFINE 0xFFFE60D4
ADMAC_wk12 DEFINE 0xFFFE60D8
ADMAC_ADMARVPR0_WORD DEFINE 0xFFFE60E0
ADMAC_ADMARVPR0_BIT_RCANAMB24 DEFINE 0
ADMAC_ADMARVPR0_BIT_RCANAMB25 DEFINE 1
ADMAC_ADMARVPR0_BIT_RCANAMB26 DEFINE 2
ADMAC_ADMARVPR0_BIT_RCANAMB27 DEFINE 3
ADMAC_ADMARVPR0_BIT_RCANAMB28 DEFINE 4
ADMAC_ADMARVPR0_BIT_RCANAMB29 DEFINE 5
ADMAC_ADMARVPR0_BIT_RCANAMB30 DEFINE 6
ADMAC_ADMARVPR0_BIT_RCANAMB31 DEFINE 7
ADMAC_ADMARVPR0_BIT_RCANAMB16 DEFINE 0
ADMAC_ADMARVPR0_BIT_RCANAMB17 DEFINE 1
ADMAC_ADMARVPR0_BIT_RCANAMB18 DEFINE 2
ADMAC_ADMARVPR0_BIT_RCANAMB19 DEFINE 3
ADMAC_ADMARVPR0_BIT_RCANAMB20 DEFINE 4
ADMAC_ADMARVPR0_BIT_RCANAMB21 DEFINE 5
ADMAC_ADMARVPR0_BIT_RCANAMB22 DEFINE 6
ADMAC_ADMARVPR0_BIT_RCANAMB23 DEFINE 7
ADMAC_ADMARVPR1_WORD DEFINE 0xFFFE60E2
ADMAC_ADMARVPR1_BIT_RCANAMB8 DEFINE 0
ADMAC_ADMARVPR1_BIT_RCANAMB9 DEFINE 1
ADMAC_ADMARVPR1_BIT_RCANAMB10 DEFINE 2
ADMAC_ADMARVPR1_BIT_RCANAMB11 DEFINE 3
ADMAC_ADMARVPR1_BIT_RCANAMB12 DEFINE 4
ADMAC_ADMARVPR1_BIT_RCANAMB13 DEFINE 5
ADMAC_ADMARVPR1_BIT_RCANAMB14 DEFINE 6
ADMAC_ADMARVPR1_BIT_RCANAMB15 DEFINE 7
ADMAC_ADMARVPR1_BIT_RCANAMB0 DEFINE 0
ADMAC_ADMARVPR1_BIT_RCANAMB1 DEFINE 1
ADMAC_ADMARVPR1_BIT_RCANAMB2 DEFINE 2
ADMAC_ADMARVPR1_BIT_RCANAMB3 DEFINE 3
ADMAC_ADMARVPR1_BIT_RCANAMB4 DEFINE 4
ADMAC_ADMARVPR1_BIT_RCANAMB5 DEFINE 5
ADMAC_ADMARVPR1_BIT_RCANAMB6 DEFINE 6
ADMAC_ADMARVPR1_BIT_RCANAMB7 DEFINE 7
ADMAC_ADMARVPR2_WORD DEFINE 0xFFFE60E4
ADMAC_ADMARVPR2_BIT_RCANBMB24 DEFINE 0
ADMAC_ADMARVPR2_BIT_RCANBMB25 DEFINE 1
ADMAC_ADMARVPR2_BIT_RCANBMB26 DEFINE 2
ADMAC_ADMARVPR2_BIT_RCANBMB27 DEFINE 3
ADMAC_ADMARVPR2_BIT_RCANBMB28 DEFINE 4
ADMAC_ADMARVPR2_BIT_RCANBMB29 DEFINE 5
ADMAC_ADMARVPR2_BIT_RCANBMB30 DEFINE 6
ADMAC_ADMARVPR2_BIT_RCANBMB31 DEFINE 7
ADMAC_ADMARVPR2_BIT_RCANBMB16 DEFINE 0
ADMAC_ADMARVPR2_BIT_RCANBMB17 DEFINE 1
ADMAC_ADMARVPR2_BIT_RCANBMB18 DEFINE 2
ADMAC_ADMARVPR2_BIT_RCANBMB19 DEFINE 3
ADMAC_ADMARVPR2_BIT_RCANBMB20 DEFINE 4
ADMAC_ADMARVPR2_BIT_RCANBMB21 DEFINE 5
ADMAC_ADMARVPR2_BIT_RCANBMB22 DEFINE 6
ADMAC_ADMARVPR2_BIT_RCANBMB23 DEFINE 7
ADMAC_ADMARVPR3_WORD DEFINE 0xFFFE60E6
ADMAC_ADMARVPR3_BIT_RCANBMB8 DEFINE 0
ADMAC_ADMARVPR3_BIT_RCANBMB9 DEFINE 1
ADMAC_ADMARVPR3_BIT_RCANBMB10 DEFINE 2
ADMAC_ADMARVPR3_BIT_RCANBMB11 DEFINE 3
ADMAC_ADMARVPR3_BIT_RCANBMB12 DEFINE 4
ADMAC_ADMARVPR3_BIT_RCANBMB13 DEFINE 5
ADMAC_ADMARVPR3_BIT_RCANBMB14 DEFINE 6
ADMAC_ADMARVPR3_BIT_RCANBMB15 DEFINE 7
ADMAC_ADMARVPR3_BIT_RCANBMB0 DEFINE 0
ADMAC_ADMARVPR3_BIT_RCANBMB1 DEFINE 1
ADMAC_ADMARVPR3_BIT_RCANBMB2 DEFINE 2
ADMAC_ADMARVPR3_BIT_RCANBMB3 DEFINE 3
ADMAC_ADMARVPR3_BIT_RCANBMB4 DEFINE 4
ADMAC_ADMARVPR3_BIT_RCANBMB5 DEFINE 5
ADMAC_ADMARVPR3_BIT_RCANBMB6 DEFINE 6
ADMAC_ADMARVPR3_BIT_RCANBMB7 DEFINE 7
ADMAC_ADMARVPR4_WORD DEFINE 0xFFFE60E8
ADMAC_ADMARVPR4_BIT_RCANCMB24 DEFINE 0
ADMAC_ADMARVPR4_BIT_RCANCMB25 DEFINE 1
ADMAC_ADMARVPR4_BIT_RCANCMB26 DEFINE 2
ADMAC_ADMARVPR4_BIT_RCANCMB27 DEFINE 3
ADMAC_ADMARVPR4_BIT_RCANCMB28 DEFINE 4
ADMAC_ADMARVPR4_BIT_RCANCMB29 DEFINE 5
ADMAC_ADMARVPR4_BIT_RCANCMB30 DEFINE 6
ADMAC_ADMARVPR4_BIT_RCANCMB31 DEFINE 7
ADMAC_ADMARVPR4_BIT_RCANCMB16 DEFINE 0
ADMAC_ADMARVPR4_BIT_RCANCMB17 DEFINE 1
ADMAC_ADMARVPR4_BIT_RCANCMB18 DEFINE 2
ADMAC_ADMARVPR4_BIT_RCANCMB19 DEFINE 3
ADMAC_ADMARVPR4_BIT_RCANCMB20 DEFINE 4
ADMAC_ADMARVPR4_BIT_RCANCMB21 DEFINE 5
ADMAC_ADMARVPR4_BIT_RCANCMB22 DEFINE 6
ADMAC_ADMARVPR4_BIT_RCANCMB23 DEFINE 7
ADMAC_ADMARVPR5_WORD DEFINE 0xFFFE60EA
ADMAC_ADMARVPR5_BIT_RCANCMB8 DEFINE 0
ADMAC_ADMARVPR5_BIT_RCANCMB9 DEFINE 1
ADMAC_ADMARVPR5_BIT_RCANCMB10 DEFINE 2
ADMAC_ADMARVPR5_BIT_RCANCMB11 DEFINE 3
ADMAC_ADMARVPR5_BIT_RCANCMB12 DEFINE 4
ADMAC_ADMARVPR5_BIT_RCANCMB13 DEFINE 5
ADMAC_ADMARVPR5_BIT_RCANCMB14 DEFINE 6
ADMAC_ADMARVPR5_BIT_RCANCMB15 DEFINE 7
ADMAC_ADMARVPR5_BIT_RCANCMB0 DEFINE 0
ADMAC_ADMARVPR5_BIT_RCANCMB1 DEFINE 1
ADMAC_ADMARVPR5_BIT_RCANCMB2 DEFINE 2
ADMAC_ADMARVPR5_BIT_RCANCMB3 DEFINE 3
ADMAC_ADMARVPR5_BIT_RCANCMB4 DEFINE 4
ADMAC_ADMARVPR5_BIT_RCANCMB5 DEFINE 5
ADMAC_ADMARVPR5_BIT_RCANCMB6 DEFINE 6
ADMAC_ADMARVPR5_BIT_RCANCMB7 DEFINE 7
ADMAC_wk13 DEFINE 0xFFFE60EC
ADMAC_ADMATVPR0_WORD DEFINE 0xFFFE60F0
ADMAC_ADMATVPR0_BIT_RCANAMB24 DEFINE 0
ADMAC_ADMATVPR0_BIT_RCANAMB25 DEFINE 1
ADMAC_ADMATVPR0_BIT_RCANAMB26 DEFINE 2
ADMAC_ADMATVPR0_BIT_RCANAMB27 DEFINE 3
ADMAC_ADMATVPR0_BIT_RCANAMB28 DEFINE 4
ADMAC_ADMATVPR0_BIT_RCANAMB29 DEFINE 5
ADMAC_ADMATVPR0_BIT_RCANAMB30 DEFINE 6
ADMAC_ADMATVPR0_BIT_RCANAMB31 DEFINE 7
ADMAC_ADMATVPR0_BIT_RCANAMB16 DEFINE 0
ADMAC_ADMATVPR0_BIT_RCANAMB17 DEFINE 1
ADMAC_ADMATVPR0_BIT_RCANAMB18 DEFINE 2
ADMAC_ADMATVPR0_BIT_RCANAMB19 DEFINE 3
ADMAC_ADMATVPR0_BIT_RCANAMB20 DEFINE 4
ADMAC_ADMATVPR0_BIT_RCANAMB21 DEFINE 5
ADMAC_ADMATVPR0_BIT_RCANAMB22 DEFINE 6
ADMAC_ADMATVPR0_BIT_RCANAMB23 DEFINE 7
ADMAC_ADMATVPR1_WORD DEFINE 0xFFFE60F2
ADMAC_ADMATVPR1_BIT_RCANAMB8 DEFINE 0
ADMAC_ADMATVPR1_BIT_RCANAMB9 DEFINE 1
ADMAC_ADMATVPR1_BIT_RCANAMB10 DEFINE 2
ADMAC_ADMATVPR1_BIT_RCANAMB11 DEFINE 3
ADMAC_ADMATVPR1_BIT_RCANAMB12 DEFINE 4
ADMAC_ADMATVPR1_BIT_RCANAMB13 DEFINE 5
ADMAC_ADMATVPR1_BIT_RCANAMB14 DEFINE 6
ADMAC_ADMATVPR1_BIT_RCANAMB15 DEFINE 7
ADMAC_ADMATVPR1_BIT_RCANAMB1 DEFINE 1
ADMAC_ADMATVPR1_BIT_RCANAMB2 DEFINE 2
ADMAC_ADMATVPR1_BIT_RCANAMB3 DEFINE 3
ADMAC_ADMATVPR1_BIT_RCANAMB4 DEFINE 4
ADMAC_ADMATVPR1_BIT_RCANAMB5 DEFINE 5
ADMAC_ADMATVPR1_BIT_RCANAMB6 DEFINE 6
ADMAC_ADMATVPR1_BIT_RCANAMB7 DEFINE 7
ADMAC_ADMATVPR2_WORD DEFINE 0xFFFE60F4
ADMAC_ADMATVPR2_BIT_RCANBMB24 DEFINE 0
ADMAC_ADMATVPR2_BIT_RCANBMB25 DEFINE 1
ADMAC_ADMATVPR2_BIT_RCANBMB26 DEFINE 2
ADMAC_ADMATVPR2_BIT_RCANBMB27 DEFINE 3
ADMAC_ADMATVPR2_BIT_RCANBMB28 DEFINE 4
ADMAC_ADMATVPR2_BIT_RCANBMB29 DEFINE 5
ADMAC_ADMATVPR2_BIT_RCANBMB30 DEFINE 6
ADMAC_ADMATVPR2_BIT_RCANBMB31 DEFINE 7
ADMAC_ADMATVPR2_BIT_RCANBMB16 DEFINE 0
ADMAC_ADMATVPR2_BIT_RCANBMB17 DEFINE 1
ADMAC_ADMATVPR2_BIT_RCANBMB18 DEFINE 2
ADMAC_ADMATVPR2_BIT_RCANBMB19 DEFINE 3
ADMAC_ADMATVPR2_BIT_RCANBMB20 DEFINE 4
ADMAC_ADMATVPR2_BIT_RCANBMB21 DEFINE 5
ADMAC_ADMATVPR2_BIT_RCANBMB22 DEFINE 6
ADMAC_ADMATVPR2_BIT_RCANBMB23 DEFINE 7
ADMAC_ADMATVPR3_WORD DEFINE 0xFFFE60F6
ADMAC_ADMATVPR3_BIT_RCANBMB8 DEFINE 0
ADMAC_ADMATVPR3_BIT_RCANBMB9 DEFINE 1
ADMAC_ADMATVPR3_BIT_RCANBMB10 DEFINE 2
ADMAC_ADMATVPR3_BIT_RCANBMB11 DEFINE 3
ADMAC_ADMATVPR3_BIT_RCANBMB12 DEFINE 4
ADMAC_ADMATVPR3_BIT_RCANBMB13 DEFINE 5
ADMAC_ADMATVPR3_BIT_RCANBMB14 DEFINE 6
ADMAC_ADMATVPR3_BIT_RCANBMB15 DEFINE 7
ADMAC_ADMATVPR3_BIT_RCANBMB1 DEFINE 1
ADMAC_ADMATVPR3_BIT_RCANBMB2 DEFINE 2
ADMAC_ADMATVPR3_BIT_RCANBMB3 DEFINE 3
ADMAC_ADMATVPR3_BIT_RCANBMB4 DEFINE 4
ADMAC_ADMATVPR3_BIT_RCANBMB5 DEFINE 5
ADMAC_ADMATVPR3_BIT_RCANBMB6 DEFINE 6
ADMAC_ADMATVPR3_BIT_RCANBMB7 DEFINE 7
ADMAC_ADMATVPR4_WORD DEFINE 0xFFFE60F8
ADMAC_ADMATVPR4_BIT_RCANCMB24 DEFINE 0
ADMAC_ADMATVPR4_BIT_RCANCMB25 DEFINE 1
ADMAC_ADMATVPR4_BIT_RCANCMB26 DEFINE 2
ADMAC_ADMATVPR4_BIT_RCANCMB27 DEFINE 3
ADMAC_ADMATVPR4_BIT_RCANCMB28 DEFINE 4
ADMAC_ADMATVPR4_BIT_RCANCMB29 DEFINE 5
ADMAC_ADMATVPR4_BIT_RCANCMB30 DEFINE 6
ADMAC_ADMATVPR4_BIT_RCANCMB31 DEFINE 7
ADMAC_ADMATVPR4_BIT_RCANCMB16 DEFINE 0
ADMAC_ADMATVPR4_BIT_RCANCMB17 DEFINE 1
ADMAC_ADMATVPR4_BIT_RCANCMB18 DEFINE 2
ADMAC_ADMATVPR4_BIT_RCANCMB19 DEFINE 3
ADMAC_ADMATVPR4_BIT_RCANCMB20 DEFINE 4
ADMAC_ADMATVPR4_BIT_RCANCMB21 DEFINE 5
ADMAC_ADMATVPR4_BIT_RCANCMB22 DEFINE 6
ADMAC_ADMATVPR4_BIT_RCANCMB23 DEFINE 7
ADMAC_ADMATVPR5_WORD DEFINE 0xFFFE60FA
ADMAC_ADMATVPR5_BIT_RCANCMB8 DEFINE 0
ADMAC_ADMATVPR5_BIT_RCANCMB9 DEFINE 1
ADMAC_ADMATVPR5_BIT_RCANCMB10 DEFINE 2
ADMAC_ADMATVPR5_BIT_RCANCMB11 DEFINE 3
ADMAC_ADMATVPR5_BIT_RCANCMB12 DEFINE 4
ADMAC_ADMATVPR5_BIT_RCANCMB13 DEFINE 5
ADMAC_ADMATVPR5_BIT_RCANCMB14 DEFINE 6
ADMAC_ADMATVPR5_BIT_RCANCMB15 DEFINE 7
ADMAC_ADMATVPR5_BIT_RCANCMB1 DEFINE 1
ADMAC_ADMATVPR5_BIT_RCANCMB2 DEFINE 2
ADMAC_ADMATVPR5_BIT_RCANCMB3 DEFINE 3
ADMAC_ADMATVPR5_BIT_RCANCMB4 DEFINE 4
ADMAC_ADMATVPR5_BIT_RCANCMB5 DEFINE 5
ADMAC_ADMATVPR5_BIT_RCANCMB6 DEFINE 6
ADMAC_ADMATVPR5_BIT_RCANCMB7 DEFINE 7

/* ATU Overall                                  */
ATUCTRL_ATUENR_WORD DEFINE 0xFFFFF000
ATUCTRL_ATUENR_BIT_THE DEFINE 0
ATUCTRL_ATUENR_BIT_TJE DEFINE 1
ATUCTRL_ATUENR_BIT_PSCE DEFINE 0
ATUCTRL_ATUENR_BIT_TAE DEFINE 1
ATUCTRL_ATUENR_BIT_TBE DEFINE 2
ATUCTRL_ATUENR_BIT_TCE DEFINE 3
ATUCTRL_ATUENR_BIT_TDE DEFINE 4
ATUCTRL_ATUENR_BIT_TEE DEFINE 5
ATUCTRL_ATUENR_BIT_TFE DEFINE 6
ATUCTRL_ATUENR_BIT_TGE DEFINE 7
ATUCTRL_CBCNT_BYTE DEFINE 0xFFFFF002
ATUCTRL_CBCNT_BIT_CB5EG DEFINE 0
ATUCTRL_CBCNT_BIT_CB5SEL DEFINE 2
ATUCTRL_CBCNT_BIT_CB4EG DEFINE 4
ATUCTRL_NCMR_BYTE DEFINE 0xFFFFF003
ATUCTRL_NCMR_BIT_NCMA DEFINE 0
ATUCTRL_NCMR_BIT_NCMC DEFINE 1
ATUCTRL_NCMR_BIT_NCMF DEFINE 2
ATUCTRL_NCMR_BIT_NCMJ DEFINE 3
ATUCTRL_NCMR_BIT_NCCSEL DEFINE 7
ATUCTRL_wk1 DEFINE 0xFFFFF004
ATUCTRL_PSCR0_WORD DEFINE 0xFFFFF100
ATUCTRL_PSCR0_BIT_PSC0 DEFINE 0
ATUCTRL_PSCR1_WORD DEFINE 0xFFFFF102
ATUCTRL_PSCR1_BIT_PSC1 DEFINE 0
ATUCTRL_PSCR2_WORD DEFINE 0xFFFFF104
ATUCTRL_PSCR2_BIT_PSC2 DEFINE 0
ATUCTRL_PSCR3_WORD DEFINE 0xFFFFF106
ATUCTRL_PSCR3_BIT_PSC3 DEFINE 0

/* ATU Timer A module                           */
ATUA_wk DEFINE 0xFFFFF200
ATUA_TCRA_BYTE DEFINE 0xFFFFF202
ATUA_TCRA_BIT_CKSELA DEFINE 0
ATUA_TCRA_BIT_EVOSEL1 DEFINE 3
ATUA_TCRA_BIT_EVOSEL2B DEFINE 6
ATUA_TCRA_BIT_EVOSEL2A DEFINE 7
ATUA_wk1 DEFINE 0xFFFFF203
ATUA_TIOR1A_WORD DEFINE 0xFFFFF204
ATUA_TIOR1A_BIT_IOA4 DEFINE 0
ATUA_TIOR1A_BIT_IOA5 DEFINE 2
ATUA_TIOR1A_BIT_IOA0 DEFINE 0
ATUA_TIOR1A_BIT_IOA1 DEFINE 2
ATUA_TIOR1A_BIT_IOA2 DEFINE 4
ATUA_TIOR1A_BIT_IOA3 DEFINE 6
ATUA_TIOR2A_WORD DEFINE 0xFFFFF206
ATUA_TIOR2A_BIT_NCKA0 DEFINE 0
ATUA_TIOR2A_BIT_NCKA1 DEFINE 1
ATUA_TIOR2A_BIT_NCKA2 DEFINE 2
ATUA_TIOR2A_BIT_NCKA3 DEFINE 3
ATUA_TIOR2A_BIT_NCKA4 DEFINE 4
ATUA_TIOR2A_BIT_NCKA5 DEFINE 5
ATUA_TIOR2A_BIT_NCEA0 DEFINE 0
ATUA_TIOR2A_BIT_NCEA1 DEFINE 1
ATUA_TIOR2A_BIT_NCEA2 DEFINE 2
ATUA_TIOR2A_BIT_NCEA3 DEFINE 3
ATUA_TIOR2A_BIT_NCEA4 DEFINE 4
ATUA_TIOR2A_BIT_NCEA5 DEFINE 5
ATUA_TSRA_BYTE DEFINE 0xFFFFF208
ATUA_TSRA_BIT_ICFA0 DEFINE 0
ATUA_TSRA_BIT_ICFA1 DEFINE 1
ATUA_TSRA_BIT_ICFA2 DEFINE 2
ATUA_TSRA_BIT_ICFA3 DEFINE 3
ATUA_TSRA_BIT_ICFA4 DEFINE 4
ATUA_TSRA_BIT_ICFA5 DEFINE 5
ATUA_TSRA_BIT_OVFA DEFINE 7
ATUA_TIERA_BYTE DEFINE 0xFFFFF209
ATUA_TIERA_BIT_ICEA0 DEFINE 0
ATUA_TIERA_BIT_ICEA1 DEFINE 1
ATUA_TIERA_BIT_ICEA2 DEFINE 2
ATUA_TIERA_BIT_ICEA3 DEFINE 3
ATUA_TIERA_BIT_ICEA4 DEFINE 4
ATUA_TIERA_BIT_ICEA5 DEFINE 5
ATUA_TIERA_BIT_OVEA DEFINE 7
ATUA_wk2 DEFINE 0xFFFFF20A
ATUA_NCNTA0 DEFINE 0xFFFFF210
ATUA_NCRA0 DEFINE 0xFFFFF211
ATUA_NCNTA1 DEFINE 0xFFFFF212
ATUA_NCRA1 DEFINE 0xFFFFF213
ATUA_NCNTA2 DEFINE 0xFFFFF214
ATUA_NCRA2 DEFINE 0xFFFFF215
ATUA_NCNTA3 DEFINE 0xFFFFF216
ATUA_NCRA3 DEFINE 0xFFFFF217
ATUA_NCNTA4 DEFINE 0xFFFFF218
ATUA_NCRA4 DEFINE 0xFFFFF219
ATUA_NCNTA5 DEFINE 0xFFFFF21A
ATUA_NCRA5 DEFINE 0xFFFFF21B
ATUA_wk3 DEFINE 0xFFFFF21C
ATUA_TCNTA DEFINE 0xFFFFF220
ATUA_wk4 DEFINE 0xFFFFF224
ATUA_ICRA0 DEFINE 0xFFFFF228
ATUA_ICRA1 DEFINE 0xFFFFF22C
ATUA_ICRA2 DEFINE 0xFFFFF230
ATUA_ICRA3 DEFINE 0xFFFFF234
ATUA_ICRA4 DEFINE 0xFFFFF238
ATUA_ICRA5 DEFINE 0xFFFFF23C

/* ATU Timer B module                           */
ATUB_wk DEFINE 0xFFFFF300
ATUB_TCRB_BYTE DEFINE 0xFFFFF304
ATUB_TCRB_BIT_CKSELB DEFINE 0
ATUB_TIORB_BYTE DEFINE 0xFFFFF305
ATUB_TIORB_BIT_IOB6 DEFINE 0
ATUB_TIORB_BIT_CCS DEFINE 3
ATUB_TIORB_BIT_LDEN DEFINE 4
ATUB_TIORB_BIT_EVCNTB DEFINE 5
ATUB_TIORB_BIT_CTCNTB5 DEFINE 6
ATUB_TIORB_BIT_LDSEL DEFINE 7
ATUB_TSRB_BYTE DEFINE 0xFFFFF306
ATUB_TSRB_BIT_CMFB0 DEFINE 0
ATUB_TSRB_BIT_ICFB0 DEFINE 1
ATUB_TSRB_BIT_CMFB1 DEFINE 2
ATUB_TSRB_BIT_CMFB6 DEFINE 3
ATUB_TIERB_BYTE DEFINE 0xFFFFF307
ATUB_TIERB_BIT_CMEB0 DEFINE 0
ATUB_TIERB_BIT_ICEB0 DEFINE 1
ATUB_TIERB_BIT_CMEB1 DEFINE 2
ATUB_TIERB_BIT_CMEB6 DEFINE 3
ATUB_TIERB_BIT_IREG DEFINE 4
ATUB_wk1 DEFINE 0xFFFFF308
ATUB_TCNTB0 DEFINE 0xFFFFF310
ATUB_ICRB0 DEFINE 0xFFFFF314
ATUB_OCRB0 DEFINE 0xFFFFF318
ATUB_TCNTB1 DEFINE 0xFFFFF31C
ATUB_OCRB1 DEFINE 0xFFFFF31D
ATUB_wk2 DEFINE 0xFFFFF31E
ATUB_ICRB1 DEFINE 0xFFFFF320
ATUB_ICRB2 DEFINE 0xFFFFF324
ATUB_wk3 DEFINE 0xFFFFF328
ATUB_LDB_LONG DEFINE 0xFFFFF330
ATUB_LDB_BIT_LDVAL DEFINE 0
ATUB_RLDB_LONG DEFINE 0xFFFFF334
ATUB_RLDB_BIT_RLDVAL DEFINE 8
ATUB_PIMR_WORD DEFINE 0xFFFFF338
ATUB_PIMR_BIT_PIM DEFINE 0
ATUB_wk4 DEFINE 0xFFFFF33A
ATUB_TCNTB2_LONG DEFINE 0xFFFFF33C
ATUB_TCNTB2_BIT_CNTB2 DEFINE 8
ATUB_TCNTB6_LONG DEFINE 0xFFFFF340
ATUB_TCNTB6_BIT_CNTB6 DEFINE 12
ATUB_OCRB6_LONG DEFINE 0xFFFFF344
ATUB_OCRB6_BIT_OCB6 DEFINE 12
ATUB_OCRB7_LONG DEFINE 0xFFFFF348
ATUB_OCRB7_BIT_OCB7 DEFINE 12
ATUB_wk5 DEFINE 0xFFFFF34C
ATUB_TCNTB3_LONG DEFINE 0xFFFFF350
ATUB_TCNTB3_BIT_CNTB3 DEFINE 12
ATUB_TCNTB4_LONG DEFINE 0xFFFFF354
ATUB_TCNTB4_BIT_CNTB4 DEFINE 12
ATUB_TCNTB5_LONG DEFINE 0xFFFFF358
ATUB_TCNTB5_BIT_CNTB5 DEFINE 12
ATUB_TCCLRB_LONG DEFINE 0xFFFFF35C
ATUB_TCCLRB_BIT_CCLRB DEFINE 12

/* ATU Timer C module                           */
ATUC_TSTRC_BYTE DEFINE 0xFFFFF400
ATUC_TSTRC_BIT_STRC0 DEFINE 0
ATUC_TSTRC_BIT_STRC1 DEFINE 1
ATUC_TSTRC_BIT_STRC2 DEFINE 2
ATUC_TSTRC_BIT_STRC3 DEFINE 3
ATUC_TSTRC_BIT_STRC4 DEFINE 4
ATUC_wk1 DEFINE 0xFFFFF401
ATUC_NCCRC0_BYTE DEFINE 0xFFFFF402
ATUC_NCCRC0_BIT_NCEC00 DEFINE 0
ATUC_NCCRC0_BIT_NCEC01 DEFINE 1
ATUC_NCCRC0_BIT_NCEC02 DEFINE 2
ATUC_NCCRC0_BIT_NCEC03 DEFINE 3
ATUC_NCCRC1_BYTE DEFINE 0xFFFFF403
ATUC_NCCRC1_BIT_NCEC10 DEFINE 0
ATUC_NCCRC1_BIT_NCEC11 DEFINE 1
ATUC_NCCRC1_BIT_NCEC12 DEFINE 2
ATUC_NCCRC1_BIT_NCEC13 DEFINE 3
ATUC_NCCRC2_BYTE DEFINE 0xFFFFF404
ATUC_NCCRC2_BIT_NCEC20 DEFINE 0
ATUC_NCCRC2_BIT_NCEC21 DEFINE 1
ATUC_NCCRC2_BIT_NCEC22 DEFINE 2
ATUC_NCCRC2_BIT_NCEC23 DEFINE 3
ATUC_NCCRC3_BYTE DEFINE 0xFFFFF405
ATUC_NCCRC3_BIT_NCEC30 DEFINE 0
ATUC_NCCRC3_BIT_NCEC31 DEFINE 1
ATUC_NCCRC3_BIT_NCEC32 DEFINE 2
ATUC_NCCRC3_BIT_NCEC33 DEFINE 3
ATUC_NCCRC4_BYTE DEFINE 0xFFFFF406
ATUC_NCCRC4_BIT_NCEC40 DEFINE 0
ATUC_NCCRC4_BIT_NCEC41 DEFINE 1
ATUC_NCCRC4_BIT_NCEC42 DEFINE 2
ATUC_NCCRC4_BIT_NCEC43 DEFINE 3
ATUC_wk2 DEFINE 0xFFFFF407
ATUC_NCNTC00 DEFINE 0xFFFFF410
ATUC_NCNTC01 DEFINE 0xFFFFF411
ATUC_NCNTC02 DEFINE 0xFFFFF412
ATUC_NCNTC03 DEFINE 0xFFFFF413
ATUC_NCRC00 DEFINE 0xFFFFF414
ATUC_NCRC01 DEFINE 0xFFFFF415
ATUC_NCRC02 DEFINE 0xFFFFF416
ATUC_NCRC03 DEFINE 0xFFFFF417
ATUC_NCNTC10 DEFINE 0xFFFFF418
ATUC_NCNTC11 DEFINE 0xFFFFF419
ATUC_NCNTC12 DEFINE 0xFFFFF41A
ATUC_NCNTC13 DEFINE 0xFFFFF41B
ATUC_NCRC10 DEFINE 0xFFFFF41C
ATUC_NCRC11 DEFINE 0xFFFFF41D
ATUC_NCRC12 DEFINE 0xFFFFF41E
ATUC_NCRC13 DEFINE 0xFFFFF41F
ATUC_NCNTC20 DEFINE 0xFFFFF420
ATUC_NCNTC21 DEFINE 0xFFFFF421
ATUC_NCNTC22 DEFINE 0xFFFFF422
ATUC_NCNTC23 DEFINE 0xFFFFF423
ATUC_NCRC20 DEFINE 0xFFFFF424
ATUC_NCRC21 DEFINE 0xFFFFF425
ATUC_NCRC22 DEFINE 0xFFFFF426
ATUC_NCRC23 DEFINE 0xFFFFF427
ATUC_NCNTC30 DEFINE 0xFFFFF428
ATUC_NCNTC31 DEFINE 0xFFFFF429
ATUC_NCNTC32 DEFINE 0xFFFFF42A
ATUC_NCNTC33 DEFINE 0xFFFFF42B
ATUC_NCRC30 DEFINE 0xFFFFF42C
ATUC_NCRC31 DEFINE 0xFFFFF42D
ATUC_NCRC32 DEFINE 0xFFFFF42E
ATUC_NCRC33 DEFINE 0xFFFFF42F
ATUC_NCNTC40 DEFINE 0xFFFFF430
ATUC_NCNTC41 DEFINE 0xFFFFF431
ATUC_NCNTC42 DEFINE 0xFFFFF432
ATUC_NCNTC43 DEFINE 0xFFFFF433
ATUC_NCRC40 DEFINE 0xFFFFF434
ATUC_NCRC41 DEFINE 0xFFFFF435
ATUC_NCRC42 DEFINE 0xFFFFF436
ATUC_NCRC43 DEFINE 0xFFFFF437
ATUC_wk3 DEFINE 0xFFFFF438
ATUC_SUBBLOCK1_t_timerC_subblock_TCRC_BYTE DEFINE 0xFFFFF440
ATUC_SUBBLOCK1_t_timerC_subblock_TCRC_BIT_CKSELC DEFINE 0
ATUC_SUBBLOCK1_t_timerC_subblock_TCRC_BIT_PWMC0 DEFINE 3
ATUC_SUBBLOCK1_t_timerC_subblock_TCRC_BIT_FCMC0 DEFINE 4
ATUC_SUBBLOCK1_t_timerC_subblock_TCRC_BIT_FCMC1 DEFINE 5
ATUC_SUBBLOCK1_t_timerC_subblock_TCRC_BIT_FCMC2 DEFINE 6
ATUC_SUBBLOCK1_t_timerC_subblock_TCRC_BIT_FCMC3 DEFINE 7
ATUC_SUBBLOCK1_t_timerC_subblock_TIERC_BYTE DEFINE 0xFFFFF441
ATUC_SUBBLOCK1_t_timerC_subblock_TIERC_BIT_IMEC0 DEFINE 0
ATUC_SUBBLOCK1_t_timerC_subblock_TIERC_BIT_IMEC1 DEFINE 1
ATUC_SUBBLOCK1_t_timerC_subblock_TIERC_BIT_IMEC2 DEFINE 2
ATUC_SUBBLOCK1_t_timerC_subblock_TIERC_BIT_IMEC3 DEFINE 3
ATUC_SUBBLOCK1_t_timerC_subblock_TIERC_BIT_OVEC DEFINE 4
ATUC_SUBBLOCK1_t_timerC_subblock_TIORC_WORD DEFINE 0xFFFFF442
ATUC_SUBBLOCK1_t_timerC_subblock_TIORC_BIT_IOC2 DEFINE 0
ATUC_SUBBLOCK1_t_timerC_subblock_TIORC_BIT_IOC3 DEFINE 4
ATUC_SUBBLOCK1_t_timerC_subblock_TIORC_BIT_IOC0 DEFINE 0
ATUC_SUBBLOCK1_t_timerC_subblock_TIORC_BIT_IOC1 DEFINE 4
ATUC_SUBBLOCK1_t_timerC_subblock_TSRC_BYTE DEFINE 0xFFFFF444
ATUC_SUBBLOCK1_t_timerC_subblock_TSRC_BIT_IMFC0 DEFINE 0
ATUC_SUBBLOCK1_t_timerC_subblock_TSRC_BIT_IMFC1 DEFINE 1
ATUC_SUBBLOCK1_t_timerC_subblock_TSRC_BIT_IMFC2 DEFINE 2
ATUC_SUBBLOCK1_t_timerC_subblock_TSRC_BIT_IMFC3 DEFINE 3
ATUC_SUBBLOCK1_t_timerC_subblock_TSRC_BIT_OVFC DEFINE 4
ATUC_SUBBLOCK1_t_timerC_subblock_wk1 DEFINE 0xFFFFF445
ATUC_SUBBLOCK1_t_timerC_subblock_GRC DEFINE 0xFFFFF448
ATUC_SUBBLOCK1_t_timerC_subblock_TCNTC DEFINE 0xFFFFF458
ATUC_SUBBLOCK1_t_timerC_subblock_wk2 DEFINE 0xFFFFF45C
ATUC_SUBBLOCK2_t_timerC_subblock_TCRC_BYTE DEFINE 0xFFFFF460
ATUC_SUBBLOCK2_t_timerC_subblock_TCRC_BIT_CKSELC DEFINE 0
ATUC_SUBBLOCK2_t_timerC_subblock_TCRC_BIT_PWMC0 DEFINE 3
ATUC_SUBBLOCK2_t_timerC_subblock_TCRC_BIT_FCMC0 DEFINE 4
ATUC_SUBBLOCK2_t_timerC_subblock_TCRC_BIT_FCMC1 DEFINE 5
ATUC_SUBBLOCK2_t_timerC_subblock_TCRC_BIT_FCMC2 DEFINE 6
ATUC_SUBBLOCK2_t_timerC_subblock_TCRC_BIT_FCMC3 DEFINE 7
ATUC_SUBBLOCK2_t_timerC_subblock_TIERC_BYTE DEFINE 0xFFFFF461
ATUC_SUBBLOCK2_t_timerC_subblock_TIERC_BIT_IMEC0 DEFINE 0
ATUC_SUBBLOCK2_t_timerC_subblock_TIERC_BIT_IMEC1 DEFINE 1
ATUC_SUBBLOCK2_t_timerC_subblock_TIERC_BIT_IMEC2 DEFINE 2
ATUC_SUBBLOCK2_t_timerC_subblock_TIERC_BIT_IMEC3 DEFINE 3
ATUC_SUBBLOCK2_t_timerC_subblock_TIERC_BIT_OVEC DEFINE 4
ATUC_SUBBLOCK2_t_timerC_subblock_TIORC_WORD DEFINE 0xFFFFF462
ATUC_SUBBLOCK2_t_timerC_subblock_TIORC_BIT_IOC2 DEFINE 0
ATUC_SUBBLOCK2_t_timerC_subblock_TIORC_BIT_IOC3 DEFINE 4
ATUC_SUBBLOCK2_t_timerC_subblock_TIORC_BIT_IOC0 DEFINE 0
ATUC_SUBBLOCK2_t_timerC_subblock_TIORC_BIT_IOC1 DEFINE 4
ATUC_SUBBLOCK2_t_timerC_subblock_TSRC_BYTE DEFINE 0xFFFFF464
ATUC_SUBBLOCK2_t_timerC_subblock_TSRC_BIT_IMFC0 DEFINE 0
ATUC_SUBBLOCK2_t_timerC_subblock_TSRC_BIT_IMFC1 DEFINE 1
ATUC_SUBBLOCK2_t_timerC_subblock_TSRC_BIT_IMFC2 DEFINE 2
ATUC_SUBBLOCK2_t_timerC_subblock_TSRC_BIT_IMFC3 DEFINE 3
ATUC_SUBBLOCK2_t_timerC_subblock_TSRC_BIT_OVFC DEFINE 4
ATUC_SUBBLOCK2_t_timerC_subblock_wk1 DEFINE 0xFFFFF465
ATUC_SUBBLOCK2_t_timerC_subblock_GRC DEFINE 0xFFFFF468
ATUC_SUBBLOCK2_t_timerC_subblock_TCNTC DEFINE 0xFFFFF478
ATUC_SUBBLOCK2_t_timerC_subblock_wk2 DEFINE 0xFFFFF47C
ATUC_SUBBLOCK3_t_timerC_subblock_TCRC_BYTE DEFINE 0xFFFFF480
ATUC_SUBBLOCK3_t_timerC_subblock_TCRC_BIT_CKSELC DEFINE 0
ATUC_SUBBLOCK3_t_timerC_subblock_TCRC_BIT_PWMC0 DEFINE 3
ATUC_SUBBLOCK3_t_timerC_subblock_TCRC_BIT_FCMC0 DEFINE 4
ATUC_SUBBLOCK3_t_timerC_subblock_TCRC_BIT_FCMC1 DEFINE 5
ATUC_SUBBLOCK3_t_timerC_subblock_TCRC_BIT_FCMC2 DEFINE 6
ATUC_SUBBLOCK3_t_timerC_subblock_TCRC_BIT_FCMC3 DEFINE 7
ATUC_SUBBLOCK3_t_timerC_subblock_TIERC_BYTE DEFINE 0xFFFFF481
ATUC_SUBBLOCK3_t_timerC_subblock_TIERC_BIT_IMEC0 DEFINE 0
ATUC_SUBBLOCK3_t_timerC_subblock_TIERC_BIT_IMEC1 DEFINE 1
ATUC_SUBBLOCK3_t_timerC_subblock_TIERC_BIT_IMEC2 DEFINE 2
ATUC_SUBBLOCK3_t_timerC_subblock_TIERC_BIT_IMEC3 DEFINE 3
ATUC_SUBBLOCK3_t_timerC_subblock_TIERC_BIT_OVEC DEFINE 4
ATUC_SUBBLOCK3_t_timerC_subblock_TIORC_WORD DEFINE 0xFFFFF482
ATUC_SUBBLOCK3_t_timerC_subblock_TIORC_BIT_IOC2 DEFINE 0
ATUC_SUBBLOCK3_t_timerC_subblock_TIORC_BIT_IOC3 DEFINE 4
ATUC_SUBBLOCK3_t_timerC_subblock_TIORC_BIT_IOC0 DEFINE 0
ATUC_SUBBLOCK3_t_timerC_subblock_TIORC_BIT_IOC1 DEFINE 4
ATUC_SUBBLOCK3_t_timerC_subblock_TSRC_BYTE DEFINE 0xFFFFF484
ATUC_SUBBLOCK3_t_timerC_subblock_TSRC_BIT_IMFC0 DEFINE 0
ATUC_SUBBLOCK3_t_timerC_subblock_TSRC_BIT_IMFC1 DEFINE 1
ATUC_SUBBLOCK3_t_timerC_subblock_TSRC_BIT_IMFC2 DEFINE 2
ATUC_SUBBLOCK3_t_timerC_subblock_TSRC_BIT_IMFC3 DEFINE 3
ATUC_SUBBLOCK3_t_timerC_subblock_TSRC_BIT_OVFC DEFINE 4
ATUC_SUBBLOCK3_t_timerC_subblock_wk1 DEFINE 0xFFFFF485
ATUC_SUBBLOCK3_t_timerC_subblock_GRC DEFINE 0xFFFFF488
ATUC_SUBBLOCK3_t_timerC_subblock_TCNTC DEFINE 0xFFFFF498
ATUC_SUBBLOCK3_t_timerC_subblock_wk2 DEFINE 0xFFFFF49C
ATUC_SUBBLOCK4_t_timerC_subblock_TCRC_BYTE DEFINE 0xFFFFF4A0
ATUC_SUBBLOCK4_t_timerC_subblock_TCRC_BIT_CKSELC DEFINE 0
ATUC_SUBBLOCK4_t_timerC_subblock_TCRC_BIT_PWMC0 DEFINE 3
ATUC_SUBBLOCK4_t_timerC_subblock_TCRC_BIT_FCMC0 DEFINE 4
ATUC_SUBBLOCK4_t_timerC_subblock_TCRC_BIT_FCMC1 DEFINE 5
ATUC_SUBBLOCK4_t_timerC_subblock_TCRC_BIT_FCMC2 DEFINE 6
ATUC_SUBBLOCK4_t_timerC_subblock_TCRC_BIT_FCMC3 DEFINE 7
ATUC_SUBBLOCK4_t_timerC_subblock_TIERC_BYTE DEFINE 0xFFFFF4A1
ATUC_SUBBLOCK4_t_timerC_subblock_TIERC_BIT_IMEC0 DEFINE 0
ATUC_SUBBLOCK4_t_timerC_subblock_TIERC_BIT_IMEC1 DEFINE 1
ATUC_SUBBLOCK4_t_timerC_subblock_TIERC_BIT_IMEC2 DEFINE 2
ATUC_SUBBLOCK4_t_timerC_subblock_TIERC_BIT_IMEC3 DEFINE 3
ATUC_SUBBLOCK4_t_timerC_subblock_TIERC_BIT_OVEC DEFINE 4
ATUC_SUBBLOCK4_t_timerC_subblock_TIORC_WORD DEFINE 0xFFFFF4A2
ATUC_SUBBLOCK4_t_timerC_subblock_TIORC_BIT_IOC2 DEFINE 0
ATUC_SUBBLOCK4_t_timerC_subblock_TIORC_BIT_IOC3 DEFINE 4
ATUC_SUBBLOCK4_t_timerC_subblock_TIORC_BIT_IOC0 DEFINE 0
ATUC_SUBBLOCK4_t_timerC_subblock_TIORC_BIT_IOC1 DEFINE 4
ATUC_SUBBLOCK4_t_timerC_subblock_TSRC_BYTE DEFINE 0xFFFFF4A4
ATUC_SUBBLOCK4_t_timerC_subblock_TSRC_BIT_IMFC0 DEFINE 0
ATUC_SUBBLOCK4_t_timerC_subblock_TSRC_BIT_IMFC1 DEFINE 1
ATUC_SUBBLOCK4_t_timerC_subblock_TSRC_BIT_IMFC2 DEFINE 2
ATUC_SUBBLOCK4_t_timerC_subblock_TSRC_BIT_IMFC3 DEFINE 3
ATUC_SUBBLOCK4_t_timerC_subblock_TSRC_BIT_OVFC DEFINE 4
ATUC_SUBBLOCK4_t_timerC_subblock_wk1 DEFINE 0xFFFFF4A5
ATUC_SUBBLOCK4_t_timerC_subblock_GRC DEFINE 0xFFFFF4A8
ATUC_SUBBLOCK4_t_timerC_subblock_TCNTC DEFINE 0xFFFFF4B8
ATUC_SUBBLOCK4_t_timerC_subblock_wk2 DEFINE 0xFFFFF4BC
ATUC_SUBBLOCK5_t_timerC_subblock_TCRC_BYTE DEFINE 0xFFFFF4C0
ATUC_SUBBLOCK5_t_timerC_subblock_TCRC_BIT_CKSELC DEFINE 0
ATUC_SUBBLOCK5_t_timerC_subblock_TCRC_BIT_PWMC0 DEFINE 3
ATUC_SUBBLOCK5_t_timerC_subblock_TCRC_BIT_FCMC0 DEFINE 4
ATUC_SUBBLOCK5_t_timerC_subblock_TCRC_BIT_FCMC1 DEFINE 5
ATUC_SUBBLOCK5_t_timerC_subblock_TCRC_BIT_FCMC2 DEFINE 6
ATUC_SUBBLOCK5_t_timerC_subblock_TCRC_BIT_FCMC3 DEFINE 7
ATUC_SUBBLOCK5_t_timerC_subblock_TIERC_BYTE DEFINE 0xFFFFF4C1
ATUC_SUBBLOCK5_t_timerC_subblock_TIERC_BIT_IMEC0 DEFINE 0
ATUC_SUBBLOCK5_t_timerC_subblock_TIERC_BIT_IMEC1 DEFINE 1
ATUC_SUBBLOCK5_t_timerC_subblock_TIERC_BIT_IMEC2 DEFINE 2
ATUC_SUBBLOCK5_t_timerC_subblock_TIERC_BIT_IMEC3 DEFINE 3
ATUC_SUBBLOCK5_t_timerC_subblock_TIERC_BIT_OVEC DEFINE 4
ATUC_SUBBLOCK5_t_timerC_subblock_TIORC_WORD DEFINE 0xFFFFF4C2
ATUC_SUBBLOCK5_t_timerC_subblock_TIORC_BIT_IOC2 DEFINE 0
ATUC_SUBBLOCK5_t_timerC_subblock_TIORC_BIT_IOC3 DEFINE 4
ATUC_SUBBLOCK5_t_timerC_subblock_TIORC_BIT_IOC0 DEFINE 0
ATUC_SUBBLOCK5_t_timerC_subblock_TIORC_BIT_IOC1 DEFINE 4
ATUC_SUBBLOCK5_t_timerC_subblock_TSRC_BYTE DEFINE 0xFFFFF4C4
ATUC_SUBBLOCK5_t_timerC_subblock_TSRC_BIT_IMFC0 DEFINE 0
ATUC_SUBBLOCK5_t_timerC_subblock_TSRC_BIT_IMFC1 DEFINE 1
ATUC_SUBBLOCK5_t_timerC_subblock_TSRC_BIT_IMFC2 DEFINE 2
ATUC_SUBBLOCK5_t_timerC_subblock_TSRC_BIT_IMFC3 DEFINE 3
ATUC_SUBBLOCK5_t_timerC_subblock_TSRC_BIT_OVFC DEFINE 4
ATUC_SUBBLOCK5_t_timerC_subblock_wk1 DEFINE 0xFFFFF4C5
ATUC_SUBBLOCK5_t_timerC_subblock_GRC DEFINE 0xFFFFF4C8
ATUC_SUBBLOCK5_t_timerC_subblock_TCNTC DEFINE 0xFFFFF4D8
ATUC_SUBBLOCK5_t_timerC_subblock_wk2 DEFINE 0xFFFFF4DC

/* ATU Timer D module                           */
ATUD_TSTRD_BYTE DEFINE 0xFFFFF500
ATUD_TSTRD_BIT_STRD0 DEFINE 0
ATUD_TSTRD_BIT_STRD1 DEFINE 1
ATUD_TSTRD_BIT_STRD2 DEFINE 2
ATUD_TSTRD_BIT_STRD3 DEFINE 3
ATUD_wk1 DEFINE 0xFFFFF501
ATUD_SUBBLOCKA1_t_timerD_subblockA_TCNT1D DEFINE 0xFFFFF520
ATUD_SUBBLOCKA1_t_timerD_subblockA_TCNT2D DEFINE 0xFFFFF524
ATUD_SUBBLOCKA1_t_timerD_subblockA_OSBRD DEFINE 0xFFFFF528
ATUD_SUBBLOCKA1_t_timerD_subblockA_TCRD_WORD DEFINE 0xFFFFF52C
ATUD_SUBBLOCKA1_t_timerD_subblockA_TCRD_BIT_CKSEL2D DEFINE 0
ATUD_SUBBLOCKA1_t_timerD_subblockA_TCRD_BIT_C1CED DEFINE 4
ATUD_SUBBLOCKA1_t_timerD_subblockA_TCRD_BIT_C2CED DEFINE 5
ATUD_SUBBLOCKA1_t_timerD_subblockA_TCRD_BIT_OBRED DEFINE 6
ATUD_SUBBLOCKA1_t_timerD_subblockA_TCRD_BIT_DCSELD DEFINE 0
ATUD_SUBBLOCKA1_t_timerD_subblockA_TCRD_BIT_CKSEL1D DEFINE 4
ATUD_SUBBLOCKA1_t_timerD_subblockA_TOCRD_BYTE DEFINE 0xFFFFF52E
ATUD_SUBBLOCKA1_t_timerD_subblockA_TOCRD_BIT_TONEAD DEFINE 0
ATUD_SUBBLOCKA1_t_timerD_subblockA_TOCRD_BIT_TONEBD DEFINE 1
ATUD_SUBBLOCKA1_t_timerD_subblockA_CMPOD_BYTE DEFINE 0xFFFFF52F
ATUD_SUBBLOCKA1_t_timerD_subblockA_CMPOD_BIT_CMPAD0 DEFINE 0
ATUD_SUBBLOCKA1_t_timerD_subblockA_CMPOD_BIT_CMPAD1 DEFINE 1
ATUD_SUBBLOCKA1_t_timerD_subblockA_CMPOD_BIT_CMPAD2 DEFINE 2
ATUD_SUBBLOCKA1_t_timerD_subblockA_CMPOD_BIT_CMPAD3 DEFINE 3
ATUD_SUBBLOCKA1_t_timerD_subblockA_CMPOD_BIT_CMPBD0 DEFINE 4
ATUD_SUBBLOCKA1_t_timerD_subblockA_CMPOD_BIT_CMPBD1 DEFINE 5
ATUD_SUBBLOCKA1_t_timerD_subblockA_CMPOD_BIT_CMPBD2 DEFINE 6
ATUD_SUBBLOCKA1_t_timerD_subblockA_CMPOD_BIT_CMPBD3 DEFINE 7
ATUD_SUBBLOCKA2_t_timerD_subblockA_TCNT1D DEFINE 0xFFFFF530
ATUD_SUBBLOCKA2_t_timerD_subblockA_TCNT2D DEFINE 0xFFFFF534
ATUD_SUBBLOCKA2_t_timerD_subblockA_OSBRD DEFINE 0xFFFFF538
ATUD_SUBBLOCKA2_t_timerD_subblockA_TCRD_WORD DEFINE 0xFFFFF53C
ATUD_SUBBLOCKA2_t_timerD_subblockA_TCRD_BIT_CKSEL2D DEFINE 0
ATUD_SUBBLOCKA2_t_timerD_subblockA_TCRD_BIT_C1CED DEFINE 4
ATUD_SUBBLOCKA2_t_timerD_subblockA_TCRD_BIT_C2CED DEFINE 5
ATUD_SUBBLOCKA2_t_timerD_subblockA_TCRD_BIT_OBRED DEFINE 6
ATUD_SUBBLOCKA2_t_timerD_subblockA_TCRD_BIT_DCSELD DEFINE 0
ATUD_SUBBLOCKA2_t_timerD_subblockA_TCRD_BIT_CKSEL1D DEFINE 4
ATUD_SUBBLOCKA2_t_timerD_subblockA_TOCRD_BYTE DEFINE 0xFFFFF53E
ATUD_SUBBLOCKA2_t_timerD_subblockA_TOCRD_BIT_TONEAD DEFINE 0
ATUD_SUBBLOCKA2_t_timerD_subblockA_TOCRD_BIT_TONEBD DEFINE 1
ATUD_SUBBLOCKA2_t_timerD_subblockA_CMPOD_BYTE DEFINE 0xFFFFF53F
ATUD_SUBBLOCKA2_t_timerD_subblockA_CMPOD_BIT_CMPAD0 DEFINE 0
ATUD_SUBBLOCKA2_t_timerD_subblockA_CMPOD_BIT_CMPAD1 DEFINE 1
ATUD_SUBBLOCKA2_t_timerD_subblockA_CMPOD_BIT_CMPAD2 DEFINE 2
ATUD_SUBBLOCKA2_t_timerD_subblockA_CMPOD_BIT_CMPAD3 DEFINE 3
ATUD_SUBBLOCKA2_t_timerD_subblockA_CMPOD_BIT_CMPBD0 DEFINE 4
ATUD_SUBBLOCKA2_t_timerD_subblockA_CMPOD_BIT_CMPBD1 DEFINE 5
ATUD_SUBBLOCKA2_t_timerD_subblockA_CMPOD_BIT_CMPBD2 DEFINE 6
ATUD_SUBBLOCKA2_t_timerD_subblockA_CMPOD_BIT_CMPBD3 DEFINE 7
ATUD_SUBBLOCKA3_t_timerD_subblockA_TCNT1D DEFINE 0xFFFFF540
ATUD_SUBBLOCKA3_t_timerD_subblockA_TCNT2D DEFINE 0xFFFFF544
ATUD_SUBBLOCKA3_t_timerD_subblockA_OSBRD DEFINE 0xFFFFF548
ATUD_SUBBLOCKA3_t_timerD_subblockA_TCRD_WORD DEFINE 0xFFFFF54C
ATUD_SUBBLOCKA3_t_timerD_subblockA_TCRD_BIT_CKSEL2D DEFINE 0
ATUD_SUBBLOCKA3_t_timerD_subblockA_TCRD_BIT_C1CED DEFINE 4
ATUD_SUBBLOCKA3_t_timerD_subblockA_TCRD_BIT_C2CED DEFINE 5
ATUD_SUBBLOCKA3_t_timerD_subblockA_TCRD_BIT_OBRED DEFINE 6
ATUD_SUBBLOCKA3_t_timerD_subblockA_TCRD_BIT_DCSELD DEFINE 0
ATUD_SUBBLOCKA3_t_timerD_subblockA_TCRD_BIT_CKSEL1D DEFINE 4
ATUD_SUBBLOCKA3_t_timerD_subblockA_TOCRD_BYTE DEFINE 0xFFFFF54E
ATUD_SUBBLOCKA3_t_timerD_subblockA_TOCRD_BIT_TONEAD DEFINE 0
ATUD_SUBBLOCKA3_t_timerD_subblockA_TOCRD_BIT_TONEBD DEFINE 1
ATUD_SUBBLOCKA3_t_timerD_subblockA_CMPOD_BYTE DEFINE 0xFFFFF54F
ATUD_SUBBLOCKA3_t_timerD_subblockA_CMPOD_BIT_CMPAD0 DEFINE 0
ATUD_SUBBLOCKA3_t_timerD_subblockA_CMPOD_BIT_CMPAD1 DEFINE 1
ATUD_SUBBLOCKA3_t_timerD_subblockA_CMPOD_BIT_CMPAD2 DEFINE 2
ATUD_SUBBLOCKA3_t_timerD_subblockA_CMPOD_BIT_CMPAD3 DEFINE 3
ATUD_SUBBLOCKA3_t_timerD_subblockA_CMPOD_BIT_CMPBD0 DEFINE 4
ATUD_SUBBLOCKA3_t_timerD_subblockA_CMPOD_BIT_CMPBD1 DEFINE 5
ATUD_SUBBLOCKA3_t_timerD_subblockA_CMPOD_BIT_CMPBD2 DEFINE 6
ATUD_SUBBLOCKA3_t_timerD_subblockA_CMPOD_BIT_CMPBD3 DEFINE 7
ATUD_SUBBLOCKA4_t_timerD_subblockA_TCNT1D DEFINE 0xFFFFF550
ATUD_SUBBLOCKA4_t_timerD_subblockA_TCNT2D DEFINE 0xFFFFF554
ATUD_SUBBLOCKA4_t_timerD_subblockA_OSBRD DEFINE 0xFFFFF558
ATUD_SUBBLOCKA4_t_timerD_subblockA_TCRD_WORD DEFINE 0xFFFFF55C
ATUD_SUBBLOCKA4_t_timerD_subblockA_TCRD_BIT_CKSEL2D DEFINE 0
ATUD_SUBBLOCKA4_t_timerD_subblockA_TCRD_BIT_C1CED DEFINE 4
ATUD_SUBBLOCKA4_t_timerD_subblockA_TCRD_BIT_C2CED DEFINE 5
ATUD_SUBBLOCKA4_t_timerD_subblockA_TCRD_BIT_OBRED DEFINE 6
ATUD_SUBBLOCKA4_t_timerD_subblockA_TCRD_BIT_DCSELD DEFINE 0
ATUD_SUBBLOCKA4_t_timerD_subblockA_TCRD_BIT_CKSEL1D DEFINE 4
ATUD_SUBBLOCKA4_t_timerD_subblockA_TOCRD_BYTE DEFINE 0xFFFFF55E
ATUD_SUBBLOCKA4_t_timerD_subblockA_TOCRD_BIT_TONEAD DEFINE 0
ATUD_SUBBLOCKA4_t_timerD_subblockA_TOCRD_BIT_TONEBD DEFINE 1
ATUD_SUBBLOCKA4_t_timerD_subblockA_CMPOD_BYTE DEFINE 0xFFFFF55F
ATUD_SUBBLOCKA4_t_timerD_subblockA_CMPOD_BIT_CMPAD0 DEFINE 0
ATUD_SUBBLOCKA4_t_timerD_subblockA_CMPOD_BIT_CMPAD1 DEFINE 1
ATUD_SUBBLOCKA4_t_timerD_subblockA_CMPOD_BIT_CMPAD2 DEFINE 2
ATUD_SUBBLOCKA4_t_timerD_subblockA_CMPOD_BIT_CMPAD3 DEFINE 3
ATUD_SUBBLOCKA4_t_timerD_subblockA_CMPOD_BIT_CMPBD0 DEFINE 4
ATUD_SUBBLOCKA4_t_timerD_subblockA_CMPOD_BIT_CMPBD1 DEFINE 5
ATUD_SUBBLOCKA4_t_timerD_subblockA_CMPOD_BIT_CMPBD2 DEFINE 6
ATUD_SUBBLOCKA4_t_timerD_subblockA_CMPOD_BIT_CMPBD3 DEFINE 7
ATUD_wk2 DEFINE 0xFFFFF560
ATUD_SUBBLOCKB1_t_timerD_subblockB_TIOR1D_WORD DEFINE 0xFFFFF580
ATUD_SUBBLOCKB1_t_timerD_subblockB_TIOR1D_BIT_IOAD0 DEFINE 0
ATUD_SUBBLOCKB1_t_timerD_subblockB_TIOR1D_BIT_IOAD1 DEFINE 2
ATUD_SUBBLOCKB1_t_timerD_subblockB_TIOR1D_BIT_IOAD2 DEFINE 4
ATUD_SUBBLOCKB1_t_timerD_subblockB_TIOR1D_BIT_IOAD3 DEFINE 6
ATUD_SUBBLOCKB1_t_timerD_subblockB_TIOR1D_BIT_OSSD0 DEFINE 8
ATUD_SUBBLOCKB1_t_timerD_subblockB_TIOR1D_BIT_OSSD1 DEFINE 10
ATUD_SUBBLOCKB1_t_timerD_subblockB_TIOR1D_BIT_OSSD2 DEFINE 12
ATUD_SUBBLOCKB1_t_timerD_subblockB_TIOR1D_BIT_OSSD3 DEFINE 14
ATUD_SUBBLOCKB1_t_timerD_subblockB_TIOR2D_WORD DEFINE 0xFFFFF582
ATUD_SUBBLOCKB1_t_timerD_subblockB_TIOR2D_BIT_IOBD0 DEFINE 0
ATUD_SUBBLOCKB1_t_timerD_subblockB_TIOR2D_BIT_IOBD1 DEFINE 4
ATUD_SUBBLOCKB1_t_timerD_subblockB_TIOR2D_BIT_IOBD2 DEFINE 8
ATUD_SUBBLOCKB1_t_timerD_subblockB_TIOR2D_BIT_IOBD3 DEFINE 12
ATUD_SUBBLOCKB1_t_timerD_subblockB_wk1 DEFINE 0xFFFFF584
ATUD_SUBBLOCKB1_t_timerD_subblockB_DSTRD_BYTE DEFINE 0xFFFFF585
ATUD_SUBBLOCKB1_t_timerD_subblockB_DSTRD_BIT_DSTD0 DEFINE 0
ATUD_SUBBLOCKB1_t_timerD_subblockB_DSTRD_BIT_DSTD1 DEFINE 1
ATUD_SUBBLOCKB1_t_timerD_subblockB_DSTRD_BIT_DSTD2 DEFINE 2
ATUD_SUBBLOCKB1_t_timerD_subblockB_DSTRD_BIT_DSTD3 DEFINE 3
ATUD_SUBBLOCKB1_t_timerD_subblockB_wk2 DEFINE 0xFFFFF586
ATUD_SUBBLOCKB1_t_timerD_subblockB_DSRD_BYTE DEFINE 0xFFFFF587
ATUD_SUBBLOCKB1_t_timerD_subblockB_DSRD_BIT_DSFD0 DEFINE 0
ATUD_SUBBLOCKB1_t_timerD_subblockB_DSRD_BIT_DSFD1 DEFINE 1
ATUD_SUBBLOCKB1_t_timerD_subblockB_DSRD_BIT_DSFD2 DEFINE 2
ATUD_SUBBLOCKB1_t_timerD_subblockB_DSRD_BIT_DSFD3 DEFINE 3
ATUD_SUBBLOCKB1_t_timerD_subblockB_DCRD_WORD DEFINE 0xFFFFF588
ATUD_SUBBLOCKB1_t_timerD_subblockB_DCRD_BIT_TRGSELD0 DEFINE 0
ATUD_SUBBLOCKB1_t_timerD_subblockB_DCRD_BIT_TRGSELD1 DEFINE 4
ATUD_SUBBLOCKB1_t_timerD_subblockB_DCRD_BIT_TRGSELD2 DEFINE 8
ATUD_SUBBLOCKB1_t_timerD_subblockB_DCRD_BIT_TRGSELD3 DEFINE 12
ATUD_SUBBLOCKB1_t_timerD_subblockB_wk3 DEFINE 0xFFFFF58A
ATUD_SUBBLOCKB1_t_timerD_subblockB_TSRD_WORD DEFINE 0xFFFFF58C
ATUD_SUBBLOCKB1_t_timerD_subblockB_TSRD_BIT_UDFD0 DEFINE 0
ATUD_SUBBLOCKB1_t_timerD_subblockB_TSRD_BIT_UDFD1 DEFINE 1
ATUD_SUBBLOCKB1_t_timerD_subblockB_TSRD_BIT_UDFD2 DEFINE 2
ATUD_SUBBLOCKB1_t_timerD_subblockB_TSRD_BIT_UDFD3 DEFINE 3
ATUD_SUBBLOCKB1_t_timerD_subblockB_TSRD_BIT_OVF1D DEFINE 4
ATUD_SUBBLOCKB1_t_timerD_subblockB_TSRD_BIT_OVF2D DEFINE 5
ATUD_SUBBLOCKB1_t_timerD_subblockB_TSRD_BIT_CMFBD0 DEFINE 0
ATUD_SUBBLOCKB1_t_timerD_subblockB_TSRD_BIT_CMFBD1 DEFINE 1
ATUD_SUBBLOCKB1_t_timerD_subblockB_TSRD_BIT_CMFBD2 DEFINE 2
ATUD_SUBBLOCKB1_t_timerD_subblockB_TSRD_BIT_CMFBD3 DEFINE 3
ATUD_SUBBLOCKB1_t_timerD_subblockB_TSRD_BIT_CMFAD0 DEFINE 4
ATUD_SUBBLOCKB1_t_timerD_subblockB_TSRD_BIT_CMFAD1 DEFINE 5
ATUD_SUBBLOCKB1_t_timerD_subblockB_TSRD_BIT_CMFAD2 DEFINE 6
ATUD_SUBBLOCKB1_t_timerD_subblockB_TSRD_BIT_CMFAD3 DEFINE 7
ATUD_SUBBLOCKB1_t_timerD_subblockB_TIERD_WORD DEFINE 0xFFFFF58E
ATUD_SUBBLOCKB1_t_timerD_subblockB_TIERD_BIT_UDED0 DEFINE 0
ATUD_SUBBLOCKB1_t_timerD_subblockB_TIERD_BIT_UDED1 DEFINE 1
ATUD_SUBBLOCKB1_t_timerD_subblockB_TIERD_BIT_UDED2 DEFINE 2
ATUD_SUBBLOCKB1_t_timerD_subblockB_TIERD_BIT_UDED3 DEFINE 3
ATUD_SUBBLOCKB1_t_timerD_subblockB_TIERD_BIT_OVE1D DEFINE 4
ATUD_SUBBLOCKB1_t_timerD_subblockB_TIERD_BIT_OVE2D DEFINE 5
ATUD_SUBBLOCKB1_t_timerD_subblockB_TIERD_BIT_CMEBD0 DEFINE 0
ATUD_SUBBLOCKB1_t_timerD_subblockB_TIERD_BIT_CMEBD1 DEFINE 1
ATUD_SUBBLOCKB1_t_timerD_subblockB_TIERD_BIT_CMEBD2 DEFINE 2
ATUD_SUBBLOCKB1_t_timerD_subblockB_TIERD_BIT_CMEBD3 DEFINE 3
ATUD_SUBBLOCKB1_t_timerD_subblockB_TIERD_BIT_CMEAD0 DEFINE 4
ATUD_SUBBLOCKB1_t_timerD_subblockB_TIERD_BIT_CMEAD1 DEFINE 5
ATUD_SUBBLOCKB1_t_timerD_subblockB_TIERD_BIT_CMEAD2 DEFINE 6
ATUD_SUBBLOCKB1_t_timerD_subblockB_TIERD_BIT_CMEAD3 DEFINE 7
ATUD_SUBBLOCKB1_t_timerD_subblockB_OCRD DEFINE 0xFFFFF590
ATUD_SUBBLOCKB1_t_timerD_subblockB_GRD DEFINE 0xFFFFF5A0
ATUD_SUBBLOCKB1_t_timerD_subblockB_DCNTD DEFINE 0xFFFFF5B0
ATUD_SUBBLOCKB2_t_timerD_subblockB_TIOR1D_WORD DEFINE 0xFFFFF5C0
ATUD_SUBBLOCKB2_t_timerD_subblockB_TIOR1D_BIT_IOAD0 DEFINE 0
ATUD_SUBBLOCKB2_t_timerD_subblockB_TIOR1D_BIT_IOAD1 DEFINE 2
ATUD_SUBBLOCKB2_t_timerD_subblockB_TIOR1D_BIT_IOAD2 DEFINE 4
ATUD_SUBBLOCKB2_t_timerD_subblockB_TIOR1D_BIT_IOAD3 DEFINE 6
ATUD_SUBBLOCKB2_t_timerD_subblockB_TIOR1D_BIT_OSSD0 DEFINE 8
ATUD_SUBBLOCKB2_t_timerD_subblockB_TIOR1D_BIT_OSSD1 DEFINE 10
ATUD_SUBBLOCKB2_t_timerD_subblockB_TIOR1D_BIT_OSSD2 DEFINE 12
ATUD_SUBBLOCKB2_t_timerD_subblockB_TIOR1D_BIT_OSSD3 DEFINE 14
ATUD_SUBBLOCKB2_t_timerD_subblockB_TIOR2D_WORD DEFINE 0xFFFFF5C2
ATUD_SUBBLOCKB2_t_timerD_subblockB_TIOR2D_BIT_IOBD0 DEFINE 0
ATUD_SUBBLOCKB2_t_timerD_subblockB_TIOR2D_BIT_IOBD1 DEFINE 4
ATUD_SUBBLOCKB2_t_timerD_subblockB_TIOR2D_BIT_IOBD2 DEFINE 8
ATUD_SUBBLOCKB2_t_timerD_subblockB_TIOR2D_BIT_IOBD3 DEFINE 12
ATUD_SUBBLOCKB2_t_timerD_subblockB_wk1 DEFINE 0xFFFFF5C4
ATUD_SUBBLOCKB2_t_timerD_subblockB_DSTRD_BYTE DEFINE 0xFFFFF5C5
ATUD_SUBBLOCKB2_t_timerD_subblockB_DSTRD_BIT_DSTD0 DEFINE 0
ATUD_SUBBLOCKB2_t_timerD_subblockB_DSTRD_BIT_DSTD1 DEFINE 1
ATUD_SUBBLOCKB2_t_timerD_subblockB_DSTRD_BIT_DSTD2 DEFINE 2
ATUD_SUBBLOCKB2_t_timerD_subblockB_DSTRD_BIT_DSTD3 DEFINE 3
ATUD_SUBBLOCKB2_t_timerD_subblockB_wk2 DEFINE 0xFFFFF5C6
ATUD_SUBBLOCKB2_t_timerD_subblockB_DSRD_BYTE DEFINE 0xFFFFF5C7
ATUD_SUBBLOCKB2_t_timerD_subblockB_DSRD_BIT_DSFD0 DEFINE 0
ATUD_SUBBLOCKB2_t_timerD_subblockB_DSRD_BIT_DSFD1 DEFINE 1
ATUD_SUBBLOCKB2_t_timerD_subblockB_DSRD_BIT_DSFD2 DEFINE 2
ATUD_SUBBLOCKB2_t_timerD_subblockB_DSRD_BIT_DSFD3 DEFINE 3
ATUD_SUBBLOCKB2_t_timerD_subblockB_DCRD_WORD DEFINE 0xFFFFF5C8
ATUD_SUBBLOCKB2_t_timerD_subblockB_DCRD_BIT_TRGSELD0 DEFINE 0
ATUD_SUBBLOCKB2_t_timerD_subblockB_DCRD_BIT_TRGSELD1 DEFINE 4
ATUD_SUBBLOCKB2_t_timerD_subblockB_DCRD_BIT_TRGSELD2 DEFINE 8
ATUD_SUBBLOCKB2_t_timerD_subblockB_DCRD_BIT_TRGSELD3 DEFINE 12
ATUD_SUBBLOCKB2_t_timerD_subblockB_wk3 DEFINE 0xFFFFF5CA
ATUD_SUBBLOCKB2_t_timerD_subblockB_TSRD_WORD DEFINE 0xFFFFF5CC
ATUD_SUBBLOCKB2_t_timerD_subblockB_TSRD_BIT_UDFD0 DEFINE 0
ATUD_SUBBLOCKB2_t_timerD_subblockB_TSRD_BIT_UDFD1 DEFINE 1
ATUD_SUBBLOCKB2_t_timerD_subblockB_TSRD_BIT_UDFD2 DEFINE 2
ATUD_SUBBLOCKB2_t_timerD_subblockB_TSRD_BIT_UDFD3 DEFINE 3
ATUD_SUBBLOCKB2_t_timerD_subblockB_TSRD_BIT_OVF1D DEFINE 4
ATUD_SUBBLOCKB2_t_timerD_subblockB_TSRD_BIT_OVF2D DEFINE 5
ATUD_SUBBLOCKB2_t_timerD_subblockB_TSRD_BIT_CMFBD0 DEFINE 0
ATUD_SUBBLOCKB2_t_timerD_subblockB_TSRD_BIT_CMFBD1 DEFINE 1
ATUD_SUBBLOCKB2_t_timerD_subblockB_TSRD_BIT_CMFBD2 DEFINE 2
ATUD_SUBBLOCKB2_t_timerD_subblockB_TSRD_BIT_CMFBD3 DEFINE 3
ATUD_SUBBLOCKB2_t_timerD_subblockB_TSRD_BIT_CMFAD0 DEFINE 4
ATUD_SUBBLOCKB2_t_timerD_subblockB_TSRD_BIT_CMFAD1 DEFINE 5
ATUD_SUBBLOCKB2_t_timerD_subblockB_TSRD_BIT_CMFAD2 DEFINE 6
ATUD_SUBBLOCKB2_t_timerD_subblockB_TSRD_BIT_CMFAD3 DEFINE 7
ATUD_SUBBLOCKB2_t_timerD_subblockB_TIERD_WORD DEFINE 0xFFFFF5CE
ATUD_SUBBLOCKB2_t_timerD_subblockB_TIERD_BIT_UDED0 DEFINE 0
ATUD_SUBBLOCKB2_t_timerD_subblockB_TIERD_BIT_UDED1 DEFINE 1
ATUD_SUBBLOCKB2_t_timerD_subblockB_TIERD_BIT_UDED2 DEFINE 2
ATUD_SUBBLOCKB2_t_timerD_subblockB_TIERD_BIT_UDED3 DEFINE 3
ATUD_SUBBLOCKB2_t_timerD_subblockB_TIERD_BIT_OVE1D DEFINE 4
ATUD_SUBBLOCKB2_t_timerD_subblockB_TIERD_BIT_OVE2D DEFINE 5
ATUD_SUBBLOCKB2_t_timerD_subblockB_TIERD_BIT_CMEBD0 DEFINE 0
ATUD_SUBBLOCKB2_t_timerD_subblockB_TIERD_BIT_CMEBD1 DEFINE 1
ATUD_SUBBLOCKB2_t_timerD_subblockB_TIERD_BIT_CMEBD2 DEFINE 2
ATUD_SUBBLOCKB2_t_timerD_subblockB_TIERD_BIT_CMEBD3 DEFINE 3
ATUD_SUBBLOCKB2_t_timerD_subblockB_TIERD_BIT_CMEAD0 DEFINE 4
ATUD_SUBBLOCKB2_t_timerD_subblockB_TIERD_BIT_CMEAD1 DEFINE 5
ATUD_SUBBLOCKB2_t_timerD_subblockB_TIERD_BIT_CMEAD2 DEFINE 6
ATUD_SUBBLOCKB2_t_timerD_subblockB_TIERD_BIT_CMEAD3 DEFINE 7
ATUD_SUBBLOCKB2_t_timerD_subblockB_OCRD DEFINE 0xFFFFF5D0
ATUD_SUBBLOCKB2_t_timerD_subblockB_GRD DEFINE 0xFFFFF5E0
ATUD_SUBBLOCKB2_t_timerD_subblockB_DCNTD DEFINE 0xFFFFF5F0
ATUD_SUBBLOCKB3_t_timerD_subblockB_TIOR1D_WORD DEFINE 0xFFFFF600
ATUD_SUBBLOCKB3_t_timerD_subblockB_TIOR1D_BIT_IOAD0 DEFINE 0
ATUD_SUBBLOCKB3_t_timerD_subblockB_TIOR1D_BIT_IOAD1 DEFINE 2
ATUD_SUBBLOCKB3_t_timerD_subblockB_TIOR1D_BIT_IOAD2 DEFINE 4
ATUD_SUBBLOCKB3_t_timerD_subblockB_TIOR1D_BIT_IOAD3 DEFINE 6
ATUD_SUBBLOCKB3_t_timerD_subblockB_TIOR1D_BIT_OSSD0 DEFINE 8
ATUD_SUBBLOCKB3_t_timerD_subblockB_TIOR1D_BIT_OSSD1 DEFINE 10
ATUD_SUBBLOCKB3_t_timerD_subblockB_TIOR1D_BIT_OSSD2 DEFINE 12
ATUD_SUBBLOCKB3_t_timerD_subblockB_TIOR1D_BIT_OSSD3 DEFINE 14
ATUD_SUBBLOCKB3_t_timerD_subblockB_TIOR2D_WORD DEFINE 0xFFFFF602
ATUD_SUBBLOCKB3_t_timerD_subblockB_TIOR2D_BIT_IOBD0 DEFINE 0
ATUD_SUBBLOCKB3_t_timerD_subblockB_TIOR2D_BIT_IOBD1 DEFINE 4
ATUD_SUBBLOCKB3_t_timerD_subblockB_TIOR2D_BIT_IOBD2 DEFINE 8
ATUD_SUBBLOCKB3_t_timerD_subblockB_TIOR2D_BIT_IOBD3 DEFINE 12
ATUD_SUBBLOCKB3_t_timerD_subblockB_wk1 DEFINE 0xFFFFF604
ATUD_SUBBLOCKB3_t_timerD_subblockB_DSTRD_BYTE DEFINE 0xFFFFF605
ATUD_SUBBLOCKB3_t_timerD_subblockB_DSTRD_BIT_DSTD0 DEFINE 0
ATUD_SUBBLOCKB3_t_timerD_subblockB_DSTRD_BIT_DSTD1 DEFINE 1
ATUD_SUBBLOCKB3_t_timerD_subblockB_DSTRD_BIT_DSTD2 DEFINE 2
ATUD_SUBBLOCKB3_t_timerD_subblockB_DSTRD_BIT_DSTD3 DEFINE 3
ATUD_SUBBLOCKB3_t_timerD_subblockB_wk2 DEFINE 0xFFFFF606
ATUD_SUBBLOCKB3_t_timerD_subblockB_DSRD_BYTE DEFINE 0xFFFFF607
ATUD_SUBBLOCKB3_t_timerD_subblockB_DSRD_BIT_DSFD0 DEFINE 0
ATUD_SUBBLOCKB3_t_timerD_subblockB_DSRD_BIT_DSFD1 DEFINE 1
ATUD_SUBBLOCKB3_t_timerD_subblockB_DSRD_BIT_DSFD2 DEFINE 2
ATUD_SUBBLOCKB3_t_timerD_subblockB_DSRD_BIT_DSFD3 DEFINE 3
ATUD_SUBBLOCKB3_t_timerD_subblockB_DCRD_WORD DEFINE 0xFFFFF608
ATUD_SUBBLOCKB3_t_timerD_subblockB_DCRD_BIT_TRGSELD0 DEFINE 0
ATUD_SUBBLOCKB3_t_timerD_subblockB_DCRD_BIT_TRGSELD1 DEFINE 4
ATUD_SUBBLOCKB3_t_timerD_subblockB_DCRD_BIT_TRGSELD2 DEFINE 8
ATUD_SUBBLOCKB3_t_timerD_subblockB_DCRD_BIT_TRGSELD3 DEFINE 12
ATUD_SUBBLOCKB3_t_timerD_subblockB_wk3 DEFINE 0xFFFFF60A
ATUD_SUBBLOCKB3_t_timerD_subblockB_TSRD_WORD DEFINE 0xFFFFF60C
ATUD_SUBBLOCKB3_t_timerD_subblockB_TSRD_BIT_UDFD0 DEFINE 0
ATUD_SUBBLOCKB3_t_timerD_subblockB_TSRD_BIT_UDFD1 DEFINE 1
ATUD_SUBBLOCKB3_t_timerD_subblockB_TSRD_BIT_UDFD2 DEFINE 2
ATUD_SUBBLOCKB3_t_timerD_subblockB_TSRD_BIT_UDFD3 DEFINE 3
ATUD_SUBBLOCKB3_t_timerD_subblockB_TSRD_BIT_OVF1D DEFINE 4
ATUD_SUBBLOCKB3_t_timerD_subblockB_TSRD_BIT_OVF2D DEFINE 5
ATUD_SUBBLOCKB3_t_timerD_subblockB_TSRD_BIT_CMFBD0 DEFINE 0
ATUD_SUBBLOCKB3_t_timerD_subblockB_TSRD_BIT_CMFBD1 DEFINE 1
ATUD_SUBBLOCKB3_t_timerD_subblockB_TSRD_BIT_CMFBD2 DEFINE 2
ATUD_SUBBLOCKB3_t_timerD_subblockB_TSRD_BIT_CMFBD3 DEFINE 3
ATUD_SUBBLOCKB3_t_timerD_subblockB_TSRD_BIT_CMFAD0 DEFINE 4
ATUD_SUBBLOCKB3_t_timerD_subblockB_TSRD_BIT_CMFAD1 DEFINE 5
ATUD_SUBBLOCKB3_t_timerD_subblockB_TSRD_BIT_CMFAD2 DEFINE 6
ATUD_SUBBLOCKB3_t_timerD_subblockB_TSRD_BIT_CMFAD3 DEFINE 7
ATUD_SUBBLOCKB3_t_timerD_subblockB_TIERD_WORD DEFINE 0xFFFFF60E
ATUD_SUBBLOCKB3_t_timerD_subblockB_TIERD_BIT_UDED0 DEFINE 0
ATUD_SUBBLOCKB3_t_timerD_subblockB_TIERD_BIT_UDED1 DEFINE 1
ATUD_SUBBLOCKB3_t_timerD_subblockB_TIERD_BIT_UDED2 DEFINE 2
ATUD_SUBBLOCKB3_t_timerD_subblockB_TIERD_BIT_UDED3 DEFINE 3
ATUD_SUBBLOCKB3_t_timerD_subblockB_TIERD_BIT_OVE1D DEFINE 4
ATUD_SUBBLOCKB3_t_timerD_subblockB_TIERD_BIT_OVE2D DEFINE 5
ATUD_SUBBLOCKB3_t_timerD_subblockB_TIERD_BIT_CMEBD0 DEFINE 0
ATUD_SUBBLOCKB3_t_timerD_subblockB_TIERD_BIT_CMEBD1 DEFINE 1
ATUD_SUBBLOCKB3_t_timerD_subblockB_TIERD_BIT_CMEBD2 DEFINE 2
ATUD_SUBBLOCKB3_t_timerD_subblockB_TIERD_BIT_CMEBD3 DEFINE 3
ATUD_SUBBLOCKB3_t_timerD_subblockB_TIERD_BIT_CMEAD0 DEFINE 4
ATUD_SUBBLOCKB3_t_timerD_subblockB_TIERD_BIT_CMEAD1 DEFINE 5
ATUD_SUBBLOCKB3_t_timerD_subblockB_TIERD_BIT_CMEAD2 DEFINE 6
ATUD_SUBBLOCKB3_t_timerD_subblockB_TIERD_BIT_CMEAD3 DEFINE 7
ATUD_SUBBLOCKB3_t_timerD_subblockB_OCRD DEFINE 0xFFFFF610
ATUD_SUBBLOCKB3_t_timerD_subblockB_GRD DEFINE 0xFFFFF620
ATUD_SUBBLOCKB3_t_timerD_subblockB_DCNTD DEFINE 0xFFFFF630
ATUD_SUBBLOCKB4_t_timerD_subblockB_TIOR1D_WORD DEFINE 0xFFFFF640
ATUD_SUBBLOCKB4_t_timerD_subblockB_TIOR1D_BIT_IOAD0 DEFINE 0
ATUD_SUBBLOCKB4_t_timerD_subblockB_TIOR1D_BIT_IOAD1 DEFINE 2
ATUD_SUBBLOCKB4_t_timerD_subblockB_TIOR1D_BIT_IOAD2 DEFINE 4
ATUD_SUBBLOCKB4_t_timerD_subblockB_TIOR1D_BIT_IOAD3 DEFINE 6
ATUD_SUBBLOCKB4_t_timerD_subblockB_TIOR1D_BIT_OSSD0 DEFINE 8
ATUD_SUBBLOCKB4_t_timerD_subblockB_TIOR1D_BIT_OSSD1 DEFINE 10
ATUD_SUBBLOCKB4_t_timerD_subblockB_TIOR1D_BIT_OSSD2 DEFINE 12
ATUD_SUBBLOCKB4_t_timerD_subblockB_TIOR1D_BIT_OSSD3 DEFINE 14
ATUD_SUBBLOCKB4_t_timerD_subblockB_TIOR2D_WORD DEFINE 0xFFFFF642
ATUD_SUBBLOCKB4_t_timerD_subblockB_TIOR2D_BIT_IOBD0 DEFINE 0
ATUD_SUBBLOCKB4_t_timerD_subblockB_TIOR2D_BIT_IOBD1 DEFINE 4
ATUD_SUBBLOCKB4_t_timerD_subblockB_TIOR2D_BIT_IOBD2 DEFINE 8
ATUD_SUBBLOCKB4_t_timerD_subblockB_TIOR2D_BIT_IOBD3 DEFINE 12
ATUD_SUBBLOCKB4_t_timerD_subblockB_wk1 DEFINE 0xFFFFF644
ATUD_SUBBLOCKB4_t_timerD_subblockB_DSTRD_BYTE DEFINE 0xFFFFF645
ATUD_SUBBLOCKB4_t_timerD_subblockB_DSTRD_BIT_DSTD0 DEFINE 0
ATUD_SUBBLOCKB4_t_timerD_subblockB_DSTRD_BIT_DSTD1 DEFINE 1
ATUD_SUBBLOCKB4_t_timerD_subblockB_DSTRD_BIT_DSTD2 DEFINE 2
ATUD_SUBBLOCKB4_t_timerD_subblockB_DSTRD_BIT_DSTD3 DEFINE 3
ATUD_SUBBLOCKB4_t_timerD_subblockB_wk2 DEFINE 0xFFFFF646
ATUD_SUBBLOCKB4_t_timerD_subblockB_DSRD_BYTE DEFINE 0xFFFFF647
ATUD_SUBBLOCKB4_t_timerD_subblockB_DSRD_BIT_DSFD0 DEFINE 0
ATUD_SUBBLOCKB4_t_timerD_subblockB_DSRD_BIT_DSFD1 DEFINE 1
ATUD_SUBBLOCKB4_t_timerD_subblockB_DSRD_BIT_DSFD2 DEFINE 2
ATUD_SUBBLOCKB4_t_timerD_subblockB_DSRD_BIT_DSFD3 DEFINE 3
ATUD_SUBBLOCKB4_t_timerD_subblockB_DCRD_WORD DEFINE 0xFFFFF648
ATUD_SUBBLOCKB4_t_timerD_subblockB_DCRD_BIT_TRGSELD0 DEFINE 0
ATUD_SUBBLOCKB4_t_timerD_subblockB_DCRD_BIT_TRGSELD1 DEFINE 4
ATUD_SUBBLOCKB4_t_timerD_subblockB_DCRD_BIT_TRGSELD2 DEFINE 8
ATUD_SUBBLOCKB4_t_timerD_subblockB_DCRD_BIT_TRGSELD3 DEFINE 12
ATUD_SUBBLOCKB4_t_timerD_subblockB_wk3 DEFINE 0xFFFFF64A
ATUD_SUBBLOCKB4_t_timerD_subblockB_TSRD_WORD DEFINE 0xFFFFF64C
ATUD_SUBBLOCKB4_t_timerD_subblockB_TSRD_BIT_UDFD0 DEFINE 0
ATUD_SUBBLOCKB4_t_timerD_subblockB_TSRD_BIT_UDFD1 DEFINE 1
ATUD_SUBBLOCKB4_t_timerD_subblockB_TSRD_BIT_UDFD2 DEFINE 2
ATUD_SUBBLOCKB4_t_timerD_subblockB_TSRD_BIT_UDFD3 DEFINE 3
ATUD_SUBBLOCKB4_t_timerD_subblockB_TSRD_BIT_OVF1D DEFINE 4
ATUD_SUBBLOCKB4_t_timerD_subblockB_TSRD_BIT_OVF2D DEFINE 5
ATUD_SUBBLOCKB4_t_timerD_subblockB_TSRD_BIT_CMFBD0 DEFINE 0
ATUD_SUBBLOCKB4_t_timerD_subblockB_TSRD_BIT_CMFBD1 DEFINE 1
ATUD_SUBBLOCKB4_t_timerD_subblockB_TSRD_BIT_CMFBD2 DEFINE 2
ATUD_SUBBLOCKB4_t_timerD_subblockB_TSRD_BIT_CMFBD3 DEFINE 3
ATUD_SUBBLOCKB4_t_timerD_subblockB_TSRD_BIT_CMFAD0 DEFINE 4
ATUD_SUBBLOCKB4_t_timerD_subblockB_TSRD_BIT_CMFAD1 DEFINE 5
ATUD_SUBBLOCKB4_t_timerD_subblockB_TSRD_BIT_CMFAD2 DEFINE 6
ATUD_SUBBLOCKB4_t_timerD_subblockB_TSRD_BIT_CMFAD3 DEFINE 7
ATUD_SUBBLOCKB4_t_timerD_subblockB_TIERD_WORD DEFINE 0xFFFFF64E
ATUD_SUBBLOCKB4_t_timerD_subblockB_TIERD_BIT_UDED0 DEFINE 0
ATUD_SUBBLOCKB4_t_timerD_subblockB_TIERD_BIT_UDED1 DEFINE 1
ATUD_SUBBLOCKB4_t_timerD_subblockB_TIERD_BIT_UDED2 DEFINE 2
ATUD_SUBBLOCKB4_t_timerD_subblockB_TIERD_BIT_UDED3 DEFINE 3
ATUD_SUBBLOCKB4_t_timerD_subblockB_TIERD_BIT_OVE1D DEFINE 4
ATUD_SUBBLOCKB4_t_timerD_subblockB_TIERD_BIT_OVE2D DEFINE 5
ATUD_SUBBLOCKB4_t_timerD_subblockB_TIERD_BIT_CMEBD0 DEFINE 0
ATUD_SUBBLOCKB4_t_timerD_subblockB_TIERD_BIT_CMEBD1 DEFINE 1
ATUD_SUBBLOCKB4_t_timerD_subblockB_TIERD_BIT_CMEBD2 DEFINE 2
ATUD_SUBBLOCKB4_t_timerD_subblockB_TIERD_BIT_CMEBD3 DEFINE 3
ATUD_SUBBLOCKB4_t_timerD_subblockB_TIERD_BIT_CMEAD0 DEFINE 4
ATUD_SUBBLOCKB4_t_timerD_subblockB_TIERD_BIT_CMEAD1 DEFINE 5
ATUD_SUBBLOCKB4_t_timerD_subblockB_TIERD_BIT_CMEAD2 DEFINE 6
ATUD_SUBBLOCKB4_t_timerD_subblockB_TIERD_BIT_CMEAD3 DEFINE 7
ATUD_SUBBLOCKB4_t_timerD_subblockB_OCRD DEFINE 0xFFFFF650
ATUD_SUBBLOCKB4_t_timerD_subblockB_GRD DEFINE 0xFFFFF660
ATUD_SUBBLOCKB4_t_timerD_subblockB_DCNTD DEFINE 0xFFFFF670

/* ATU Timer E module                           */
ATUE_TSTRE_BYTE DEFINE 0xFFFFF700
ATUE_TSTRE_BIT_STRE0 DEFINE 0
ATUE_TSTRE_BIT_STRE1 DEFINE 1
ATUE_TSTRE_BIT_STRE2 DEFINE 2
ATUE_TSTRE_BIT_STRE3 DEFINE 3
ATUE_TSTRE_BIT_STRE4 DEFINE 4
ATUE_TSTRE_BIT_STRE5 DEFINE 5
ATUE_wk1 DEFINE 0xFFFFF701
ATUE_SUBBLOCK1_t_timerE_subblock_TCRE_BYTE DEFINE 0xFFFFF800
ATUE_SUBBLOCK1_t_timerE_subblock_TCRE_BIT_CKSELE DEFINE 0
ATUE_SUBBLOCK1_t_timerE_subblock_TOCRE_BYTE DEFINE 0xFFFFF801
ATUE_SUBBLOCK1_t_timerE_subblock_TOCRE_BIT_TONEE0 DEFINE 0
ATUE_SUBBLOCK1_t_timerE_subblock_TOCRE_BIT_TONEE1 DEFINE 1
ATUE_SUBBLOCK1_t_timerE_subblock_TOCRE_BIT_TONEE2 DEFINE 2
ATUE_SUBBLOCK1_t_timerE_subblock_TOCRE_BIT_TONEE3 DEFINE 3
ATUE_SUBBLOCK1_t_timerE_subblock_TIERE_BYTE DEFINE 0xFFFFF802
ATUE_SUBBLOCK1_t_timerE_subblock_TIERE_BIT_CMEE0 DEFINE 0
ATUE_SUBBLOCK1_t_timerE_subblock_TIERE_BIT_CMEE1 DEFINE 1
ATUE_SUBBLOCK1_t_timerE_subblock_TIERE_BIT_CMEE2 DEFINE 2
ATUE_SUBBLOCK1_t_timerE_subblock_TIERE_BIT_CMEE3 DEFINE 3
ATUE_SUBBLOCK1_t_timerE_subblock_RLDCRE_BYTE DEFINE 0xFFFFF803
ATUE_SUBBLOCK1_t_timerE_subblock_RLDCRE_BIT_RLDENE0 DEFINE 0
ATUE_SUBBLOCK1_t_timerE_subblock_RLDCRE_BIT_RLDENE1 DEFINE 1
ATUE_SUBBLOCK1_t_timerE_subblock_RLDCRE_BIT_RLDENE2 DEFINE 2
ATUE_SUBBLOCK1_t_timerE_subblock_RLDCRE_BIT_RLDENE3 DEFINE 3
ATUE_SUBBLOCK1_t_timerE_subblock_TSRE_BYTE DEFINE 0xFFFFF804
ATUE_SUBBLOCK1_t_timerE_subblock_TSRE_BIT_CMFE0 DEFINE 0
ATUE_SUBBLOCK1_t_timerE_subblock_TSRE_BIT_CMFE1 DEFINE 1
ATUE_SUBBLOCK1_t_timerE_subblock_TSRE_BIT_CMFE2 DEFINE 2
ATUE_SUBBLOCK1_t_timerE_subblock_TSRE_BIT_CMFE3 DEFINE 3
ATUE_SUBBLOCK1_t_timerE_subblock_TSRE_BIT_OVFE0 DEFINE 4
ATUE_SUBBLOCK1_t_timerE_subblock_TSRE_BIT_OVFE1 DEFINE 5
ATUE_SUBBLOCK1_t_timerE_subblock_TSRE_BIT_OVFE2 DEFINE 6
ATUE_SUBBLOCK1_t_timerE_subblock_TSRE_BIT_OVFE3 DEFINE 7
ATUE_SUBBLOCK1_t_timerE_subblock_wk1 DEFINE 0xFFFFF805
ATUE_SUBBLOCK1_t_timerE_subblock_PSCRE_BYTE DEFINE 0xFFFFF808
ATUE_SUBBLOCK1_t_timerE_subblock_PSCRE_BIT_PSCE DEFINE 0
ATUE_SUBBLOCK1_t_timerE_subblock_wk2 DEFINE 0xFFFFF809
ATUE_SUBBLOCK1_t_timerE_subblock_SSTRE_BYTE DEFINE 0xFFFFF80C
ATUE_SUBBLOCK1_t_timerE_subblock_SSTRE_BIT_SSTRE0 DEFINE 0
ATUE_SUBBLOCK1_t_timerE_subblock_SSTRE_BIT_SSTRE1 DEFINE 1
ATUE_SUBBLOCK1_t_timerE_subblock_SSTRE_BIT_SSTRE2 DEFINE 2
ATUE_SUBBLOCK1_t_timerE_subblock_SSTRE_BIT_SSTRE3 DEFINE 3
ATUE_SUBBLOCK1_t_timerE_subblock_wk3 DEFINE 0xFFFFF80D
ATUE_SUBBLOCK1_t_timerE_subblock_CYLRE DEFINE 0xFFFFF810
ATUE_SUBBLOCK1_t_timerE_subblock_DTRE DEFINE 0xFFFFF818
ATUE_SUBBLOCK1_t_timerE_subblock_CRLDE DEFINE 0xFFFFF820
ATUE_SUBBLOCK1_t_timerE_subblock_DRLDE DEFINE 0xFFFFF828
ATUE_SUBBLOCK1_t_timerE_subblock_TCNTE DEFINE 0xFFFFF830
ATUE_SUBBLOCK1_t_timerE_subblock_wk4 DEFINE 0xFFFFF838
ATUE_SUBBLOCK2_t_timerE_subblock_TCRE_BYTE DEFINE 0xFFFFF840
ATUE_SUBBLOCK2_t_timerE_subblock_TCRE_BIT_CKSELE DEFINE 0
ATUE_SUBBLOCK2_t_timerE_subblock_TOCRE_BYTE DEFINE 0xFFFFF841
ATUE_SUBBLOCK2_t_timerE_subblock_TOCRE_BIT_TONEE0 DEFINE 0
ATUE_SUBBLOCK2_t_timerE_subblock_TOCRE_BIT_TONEE1 DEFINE 1
ATUE_SUBBLOCK2_t_timerE_subblock_TOCRE_BIT_TONEE2 DEFINE 2
ATUE_SUBBLOCK2_t_timerE_subblock_TOCRE_BIT_TONEE3 DEFINE 3
ATUE_SUBBLOCK2_t_timerE_subblock_TIERE_BYTE DEFINE 0xFFFFF842
ATUE_SUBBLOCK2_t_timerE_subblock_TIERE_BIT_CMEE0 DEFINE 0
ATUE_SUBBLOCK2_t_timerE_subblock_TIERE_BIT_CMEE1 DEFINE 1
ATUE_SUBBLOCK2_t_timerE_subblock_TIERE_BIT_CMEE2 DEFINE 2
ATUE_SUBBLOCK2_t_timerE_subblock_TIERE_BIT_CMEE3 DEFINE 3
ATUE_SUBBLOCK2_t_timerE_subblock_RLDCRE_BYTE DEFINE 0xFFFFF843
ATUE_SUBBLOCK2_t_timerE_subblock_RLDCRE_BIT_RLDENE0 DEFINE 0
ATUE_SUBBLOCK2_t_timerE_subblock_RLDCRE_BIT_RLDENE1 DEFINE 1
ATUE_SUBBLOCK2_t_timerE_subblock_RLDCRE_BIT_RLDENE2 DEFINE 2
ATUE_SUBBLOCK2_t_timerE_subblock_RLDCRE_BIT_RLDENE3 DEFINE 3
ATUE_SUBBLOCK2_t_timerE_subblock_TSRE_BYTE DEFINE 0xFFFFF844
ATUE_SUBBLOCK2_t_timerE_subblock_TSRE_BIT_CMFE0 DEFINE 0
ATUE_SUBBLOCK2_t_timerE_subblock_TSRE_BIT_CMFE1 DEFINE 1
ATUE_SUBBLOCK2_t_timerE_subblock_TSRE_BIT_CMFE2 DEFINE 2
ATUE_SUBBLOCK2_t_timerE_subblock_TSRE_BIT_CMFE3 DEFINE 3
ATUE_SUBBLOCK2_t_timerE_subblock_TSRE_BIT_OVFE0 DEFINE 4
ATUE_SUBBLOCK2_t_timerE_subblock_TSRE_BIT_OVFE1 DEFINE 5
ATUE_SUBBLOCK2_t_timerE_subblock_TSRE_BIT_OVFE2 DEFINE 6
ATUE_SUBBLOCK2_t_timerE_subblock_TSRE_BIT_OVFE3 DEFINE 7
ATUE_SUBBLOCK2_t_timerE_subblock_wk1 DEFINE 0xFFFFF845
ATUE_SUBBLOCK2_t_timerE_subblock_PSCRE_BYTE DEFINE 0xFFFFF848
ATUE_SUBBLOCK2_t_timerE_subblock_PSCRE_BIT_PSCE DEFINE 0
ATUE_SUBBLOCK2_t_timerE_subblock_wk2 DEFINE 0xFFFFF849
ATUE_SUBBLOCK2_t_timerE_subblock_SSTRE_BYTE DEFINE 0xFFFFF84C
ATUE_SUBBLOCK2_t_timerE_subblock_SSTRE_BIT_SSTRE0 DEFINE 0
ATUE_SUBBLOCK2_t_timerE_subblock_SSTRE_BIT_SSTRE1 DEFINE 1
ATUE_SUBBLOCK2_t_timerE_subblock_SSTRE_BIT_SSTRE2 DEFINE 2
ATUE_SUBBLOCK2_t_timerE_subblock_SSTRE_BIT_SSTRE3 DEFINE 3
ATUE_SUBBLOCK2_t_timerE_subblock_wk3 DEFINE 0xFFFFF84D
ATUE_SUBBLOCK2_t_timerE_subblock_CYLRE DEFINE 0xFFFFF850
ATUE_SUBBLOCK2_t_timerE_subblock_DTRE DEFINE 0xFFFFF858
ATUE_SUBBLOCK2_t_timerE_subblock_CRLDE DEFINE 0xFFFFF860
ATUE_SUBBLOCK2_t_timerE_subblock_DRLDE DEFINE 0xFFFFF868
ATUE_SUBBLOCK2_t_timerE_subblock_TCNTE DEFINE 0xFFFFF870
ATUE_SUBBLOCK2_t_timerE_subblock_wk4 DEFINE 0xFFFFF878
ATUE_SUBBLOCK3_t_timerE_subblock_TCRE_BYTE DEFINE 0xFFFFF880
ATUE_SUBBLOCK3_t_timerE_subblock_TCRE_BIT_CKSELE DEFINE 0
ATUE_SUBBLOCK3_t_timerE_subblock_TOCRE_BYTE DEFINE 0xFFFFF881
ATUE_SUBBLOCK3_t_timerE_subblock_TOCRE_BIT_TONEE0 DEFINE 0
ATUE_SUBBLOCK3_t_timerE_subblock_TOCRE_BIT_TONEE1 DEFINE 1
ATUE_SUBBLOCK3_t_timerE_subblock_TOCRE_BIT_TONEE2 DEFINE 2
ATUE_SUBBLOCK3_t_timerE_subblock_TOCRE_BIT_TONEE3 DEFINE 3
ATUE_SUBBLOCK3_t_timerE_subblock_TIERE_BYTE DEFINE 0xFFFFF882
ATUE_SUBBLOCK3_t_timerE_subblock_TIERE_BIT_CMEE0 DEFINE 0
ATUE_SUBBLOCK3_t_timerE_subblock_TIERE_BIT_CMEE1 DEFINE 1
ATUE_SUBBLOCK3_t_timerE_subblock_TIERE_BIT_CMEE2 DEFINE 2
ATUE_SUBBLOCK3_t_timerE_subblock_TIERE_BIT_CMEE3 DEFINE 3
ATUE_SUBBLOCK3_t_timerE_subblock_RLDCRE_BYTE DEFINE 0xFFFFF883
ATUE_SUBBLOCK3_t_timerE_subblock_RLDCRE_BIT_RLDENE0 DEFINE 0
ATUE_SUBBLOCK3_t_timerE_subblock_RLDCRE_BIT_RLDENE1 DEFINE 1
ATUE_SUBBLOCK3_t_timerE_subblock_RLDCRE_BIT_RLDENE2 DEFINE 2
ATUE_SUBBLOCK3_t_timerE_subblock_RLDCRE_BIT_RLDENE3 DEFINE 3
ATUE_SUBBLOCK3_t_timerE_subblock_TSRE_BYTE DEFINE 0xFFFFF884
ATUE_SUBBLOCK3_t_timerE_subblock_TSRE_BIT_CMFE0 DEFINE 0
ATUE_SUBBLOCK3_t_timerE_subblock_TSRE_BIT_CMFE1 DEFINE 1
ATUE_SUBBLOCK3_t_timerE_subblock_TSRE_BIT_CMFE2 DEFINE 2
ATUE_SUBBLOCK3_t_timerE_subblock_TSRE_BIT_CMFE3 DEFINE 3
ATUE_SUBBLOCK3_t_timerE_subblock_TSRE_BIT_OVFE0 DEFINE 4
ATUE_SUBBLOCK3_t_timerE_subblock_TSRE_BIT_OVFE1 DEFINE 5
ATUE_SUBBLOCK3_t_timerE_subblock_TSRE_BIT_OVFE2 DEFINE 6
ATUE_SUBBLOCK3_t_timerE_subblock_TSRE_BIT_OVFE3 DEFINE 7
ATUE_SUBBLOCK3_t_timerE_subblock_wk1 DEFINE 0xFFFFF885
ATUE_SUBBLOCK3_t_timerE_subblock_PSCRE_BYTE DEFINE 0xFFFFF888
ATUE_SUBBLOCK3_t_timerE_subblock_PSCRE_BIT_PSCE DEFINE 0
ATUE_SUBBLOCK3_t_timerE_subblock_wk2 DEFINE 0xFFFFF889
ATUE_SUBBLOCK3_t_timerE_subblock_SSTRE_BYTE DEFINE 0xFFFFF88C
ATUE_SUBBLOCK3_t_timerE_subblock_SSTRE_BIT_SSTRE0 DEFINE 0
ATUE_SUBBLOCK3_t_timerE_subblock_SSTRE_BIT_SSTRE1 DEFINE 1
ATUE_SUBBLOCK3_t_timerE_subblock_SSTRE_BIT_SSTRE2 DEFINE 2
ATUE_SUBBLOCK3_t_timerE_subblock_SSTRE_BIT_SSTRE3 DEFINE 3
ATUE_SUBBLOCK3_t_timerE_subblock_wk3 DEFINE 0xFFFFF88D
ATUE_SUBBLOCK3_t_timerE_subblock_CYLRE DEFINE 0xFFFFF890
ATUE_SUBBLOCK3_t_timerE_subblock_DTRE DEFINE 0xFFFFF898
ATUE_SUBBLOCK3_t_timerE_subblock_CRLDE DEFINE 0xFFFFF8A0
ATUE_SUBBLOCK3_t_timerE_subblock_DRLDE DEFINE 0xFFFFF8A8
ATUE_SUBBLOCK3_t_timerE_subblock_TCNTE DEFINE 0xFFFFF8B0
ATUE_SUBBLOCK3_t_timerE_subblock_wk4 DEFINE 0xFFFFF8B8
ATUE_SUBBLOCK4_t_timerE_subblock_TCRE_BYTE DEFINE 0xFFFFF8C0
ATUE_SUBBLOCK4_t_timerE_subblock_TCRE_BIT_CKSELE DEFINE 0
ATUE_SUBBLOCK4_t_timerE_subblock_TOCRE_BYTE DEFINE 0xFFFFF8C1
ATUE_SUBBLOCK4_t_timerE_subblock_TOCRE_BIT_TONEE0 DEFINE 0
ATUE_SUBBLOCK4_t_timerE_subblock_TOCRE_BIT_TONEE1 DEFINE 1
ATUE_SUBBLOCK4_t_timerE_subblock_TOCRE_BIT_TONEE2 DEFINE 2
ATUE_SUBBLOCK4_t_timerE_subblock_TOCRE_BIT_TONEE3 DEFINE 3
ATUE_SUBBLOCK4_t_timerE_subblock_TIERE_BYTE DEFINE 0xFFFFF8C2
ATUE_SUBBLOCK4_t_timerE_subblock_TIERE_BIT_CMEE0 DEFINE 0
ATUE_SUBBLOCK4_t_timerE_subblock_TIERE_BIT_CMEE1 DEFINE 1
ATUE_SUBBLOCK4_t_timerE_subblock_TIERE_BIT_CMEE2 DEFINE 2
ATUE_SUBBLOCK4_t_timerE_subblock_TIERE_BIT_CMEE3 DEFINE 3
ATUE_SUBBLOCK4_t_timerE_subblock_RLDCRE_BYTE DEFINE 0xFFFFF8C3
ATUE_SUBBLOCK4_t_timerE_subblock_RLDCRE_BIT_RLDENE0 DEFINE 0
ATUE_SUBBLOCK4_t_timerE_subblock_RLDCRE_BIT_RLDENE1 DEFINE 1
ATUE_SUBBLOCK4_t_timerE_subblock_RLDCRE_BIT_RLDENE2 DEFINE 2
ATUE_SUBBLOCK4_t_timerE_subblock_RLDCRE_BIT_RLDENE3 DEFINE 3
ATUE_SUBBLOCK4_t_timerE_subblock_TSRE_BYTE DEFINE 0xFFFFF8C4
ATUE_SUBBLOCK4_t_timerE_subblock_TSRE_BIT_CMFE0 DEFINE 0
ATUE_SUBBLOCK4_t_timerE_subblock_TSRE_BIT_CMFE1 DEFINE 1
ATUE_SUBBLOCK4_t_timerE_subblock_TSRE_BIT_CMFE2 DEFINE 2
ATUE_SUBBLOCK4_t_timerE_subblock_TSRE_BIT_CMFE3 DEFINE 3
ATUE_SUBBLOCK4_t_timerE_subblock_TSRE_BIT_OVFE0 DEFINE 4
ATUE_SUBBLOCK4_t_timerE_subblock_TSRE_BIT_OVFE1 DEFINE 5
ATUE_SUBBLOCK4_t_timerE_subblock_TSRE_BIT_OVFE2 DEFINE 6
ATUE_SUBBLOCK4_t_timerE_subblock_TSRE_BIT_OVFE3 DEFINE 7
ATUE_SUBBLOCK4_t_timerE_subblock_wk1 DEFINE 0xFFFFF8C5
ATUE_SUBBLOCK4_t_timerE_subblock_PSCRE_BYTE DEFINE 0xFFFFF8C8
ATUE_SUBBLOCK4_t_timerE_subblock_PSCRE_BIT_PSCE DEFINE 0
ATUE_SUBBLOCK4_t_timerE_subblock_wk2 DEFINE 0xFFFFF8C9
ATUE_SUBBLOCK4_t_timerE_subblock_SSTRE_BYTE DEFINE 0xFFFFF8CC
ATUE_SUBBLOCK4_t_timerE_subblock_SSTRE_BIT_SSTRE0 DEFINE 0
ATUE_SUBBLOCK4_t_timerE_subblock_SSTRE_BIT_SSTRE1 DEFINE 1
ATUE_SUBBLOCK4_t_timerE_subblock_SSTRE_BIT_SSTRE2 DEFINE 2
ATUE_SUBBLOCK4_t_timerE_subblock_SSTRE_BIT_SSTRE3 DEFINE 3
ATUE_SUBBLOCK4_t_timerE_subblock_wk3 DEFINE 0xFFFFF8CD
ATUE_SUBBLOCK4_t_timerE_subblock_CYLRE DEFINE 0xFFFFF8D0
ATUE_SUBBLOCK4_t_timerE_subblock_DTRE DEFINE 0xFFFFF8D8
ATUE_SUBBLOCK4_t_timerE_subblock_CRLDE DEFINE 0xFFFFF8E0
ATUE_SUBBLOCK4_t_timerE_subblock_DRLDE DEFINE 0xFFFFF8E8
ATUE_SUBBLOCK4_t_timerE_subblock_TCNTE DEFINE 0xFFFFF8F0
ATUE_SUBBLOCK4_t_timerE_subblock_wk4 DEFINE 0xFFFFF8F8
ATUE_SUBBLOCK5_t_timerE_subblock_TCRE_BYTE DEFINE 0xFFFFF900
ATUE_SUBBLOCK5_t_timerE_subblock_TCRE_BIT_CKSELE DEFINE 0
ATUE_SUBBLOCK5_t_timerE_subblock_TOCRE_BYTE DEFINE 0xFFFFF901
ATUE_SUBBLOCK5_t_timerE_subblock_TOCRE_BIT_TONEE0 DEFINE 0
ATUE_SUBBLOCK5_t_timerE_subblock_TOCRE_BIT_TONEE1 DEFINE 1
ATUE_SUBBLOCK5_t_timerE_subblock_TOCRE_BIT_TONEE2 DEFINE 2
ATUE_SUBBLOCK5_t_timerE_subblock_TOCRE_BIT_TONEE3 DEFINE 3
ATUE_SUBBLOCK5_t_timerE_subblock_TIERE_BYTE DEFINE 0xFFFFF902
ATUE_SUBBLOCK5_t_timerE_subblock_TIERE_BIT_CMEE0 DEFINE 0
ATUE_SUBBLOCK5_t_timerE_subblock_TIERE_BIT_CMEE1 DEFINE 1
ATUE_SUBBLOCK5_t_timerE_subblock_TIERE_BIT_CMEE2 DEFINE 2
ATUE_SUBBLOCK5_t_timerE_subblock_TIERE_BIT_CMEE3 DEFINE 3
ATUE_SUBBLOCK5_t_timerE_subblock_RLDCRE_BYTE DEFINE 0xFFFFF903
ATUE_SUBBLOCK5_t_timerE_subblock_RLDCRE_BIT_RLDENE0 DEFINE 0
ATUE_SUBBLOCK5_t_timerE_subblock_RLDCRE_BIT_RLDENE1 DEFINE 1
ATUE_SUBBLOCK5_t_timerE_subblock_RLDCRE_BIT_RLDENE2 DEFINE 2
ATUE_SUBBLOCK5_t_timerE_subblock_RLDCRE_BIT_RLDENE3 DEFINE 3
ATUE_SUBBLOCK5_t_timerE_subblock_TSRE_BYTE DEFINE 0xFFFFF904
ATUE_SUBBLOCK5_t_timerE_subblock_TSRE_BIT_CMFE0 DEFINE 0
ATUE_SUBBLOCK5_t_timerE_subblock_TSRE_BIT_CMFE1 DEFINE 1
ATUE_SUBBLOCK5_t_timerE_subblock_TSRE_BIT_CMFE2 DEFINE 2
ATUE_SUBBLOCK5_t_timerE_subblock_TSRE_BIT_CMFE3 DEFINE 3
ATUE_SUBBLOCK5_t_timerE_subblock_TSRE_BIT_OVFE0 DEFINE 4
ATUE_SUBBLOCK5_t_timerE_subblock_TSRE_BIT_OVFE1 DEFINE 5
ATUE_SUBBLOCK5_t_timerE_subblock_TSRE_BIT_OVFE2 DEFINE 6
ATUE_SUBBLOCK5_t_timerE_subblock_TSRE_BIT_OVFE3 DEFINE 7
ATUE_SUBBLOCK5_t_timerE_subblock_wk1 DEFINE 0xFFFFF905
ATUE_SUBBLOCK5_t_timerE_subblock_PSCRE_BYTE DEFINE 0xFFFFF908
ATUE_SUBBLOCK5_t_timerE_subblock_PSCRE_BIT_PSCE DEFINE 0
ATUE_SUBBLOCK5_t_timerE_subblock_wk2 DEFINE 0xFFFFF909
ATUE_SUBBLOCK5_t_timerE_subblock_SSTRE_BYTE DEFINE 0xFFFFF90C
ATUE_SUBBLOCK5_t_timerE_subblock_SSTRE_BIT_SSTRE0 DEFINE 0
ATUE_SUBBLOCK5_t_timerE_subblock_SSTRE_BIT_SSTRE1 DEFINE 1
ATUE_SUBBLOCK5_t_timerE_subblock_SSTRE_BIT_SSTRE2 DEFINE 2
ATUE_SUBBLOCK5_t_timerE_subblock_SSTRE_BIT_SSTRE3 DEFINE 3
ATUE_SUBBLOCK5_t_timerE_subblock_wk3 DEFINE 0xFFFFF90D
ATUE_SUBBLOCK5_t_timerE_subblock_CYLRE DEFINE 0xFFFFF910
ATUE_SUBBLOCK5_t_timerE_subblock_DTRE DEFINE 0xFFFFF918
ATUE_SUBBLOCK5_t_timerE_subblock_CRLDE DEFINE 0xFFFFF920
ATUE_SUBBLOCK5_t_timerE_subblock_DRLDE DEFINE 0xFFFFF928
ATUE_SUBBLOCK5_t_timerE_subblock_TCNTE DEFINE 0xFFFFF930
ATUE_SUBBLOCK5_t_timerE_subblock_wk4 DEFINE 0xFFFFF938
ATUE_SUBBLOCK6_t_timerE_subblock_TCRE_BYTE DEFINE 0xFFFFF940
ATUE_SUBBLOCK6_t_timerE_subblock_TCRE_BIT_CKSELE DEFINE 0
ATUE_SUBBLOCK6_t_timerE_subblock_TOCRE_BYTE DEFINE 0xFFFFF941
ATUE_SUBBLOCK6_t_timerE_subblock_TOCRE_BIT_TONEE0 DEFINE 0
ATUE_SUBBLOCK6_t_timerE_subblock_TOCRE_BIT_TONEE1 DEFINE 1
ATUE_SUBBLOCK6_t_timerE_subblock_TOCRE_BIT_TONEE2 DEFINE 2
ATUE_SUBBLOCK6_t_timerE_subblock_TOCRE_BIT_TONEE3 DEFINE 3
ATUE_SUBBLOCK6_t_timerE_subblock_TIERE_BYTE DEFINE 0xFFFFF942
ATUE_SUBBLOCK6_t_timerE_subblock_TIERE_BIT_CMEE0 DEFINE 0
ATUE_SUBBLOCK6_t_timerE_subblock_TIERE_BIT_CMEE1 DEFINE 1
ATUE_SUBBLOCK6_t_timerE_subblock_TIERE_BIT_CMEE2 DEFINE 2
ATUE_SUBBLOCK6_t_timerE_subblock_TIERE_BIT_CMEE3 DEFINE 3
ATUE_SUBBLOCK6_t_timerE_subblock_RLDCRE_BYTE DEFINE 0xFFFFF943
ATUE_SUBBLOCK6_t_timerE_subblock_RLDCRE_BIT_RLDENE0 DEFINE 0
ATUE_SUBBLOCK6_t_timerE_subblock_RLDCRE_BIT_RLDENE1 DEFINE 1
ATUE_SUBBLOCK6_t_timerE_subblock_RLDCRE_BIT_RLDENE2 DEFINE 2
ATUE_SUBBLOCK6_t_timerE_subblock_RLDCRE_BIT_RLDENE3 DEFINE 3
ATUE_SUBBLOCK6_t_timerE_subblock_TSRE_BYTE DEFINE 0xFFFFF944
ATUE_SUBBLOCK6_t_timerE_subblock_TSRE_BIT_CMFE0 DEFINE 0
ATUE_SUBBLOCK6_t_timerE_subblock_TSRE_BIT_CMFE1 DEFINE 1
ATUE_SUBBLOCK6_t_timerE_subblock_TSRE_BIT_CMFE2 DEFINE 2
ATUE_SUBBLOCK6_t_timerE_subblock_TSRE_BIT_CMFE3 DEFINE 3
ATUE_SUBBLOCK6_t_timerE_subblock_TSRE_BIT_OVFE0 DEFINE 4
ATUE_SUBBLOCK6_t_timerE_subblock_TSRE_BIT_OVFE1 DEFINE 5
ATUE_SUBBLOCK6_t_timerE_subblock_TSRE_BIT_OVFE2 DEFINE 6
ATUE_SUBBLOCK6_t_timerE_subblock_TSRE_BIT_OVFE3 DEFINE 7
ATUE_SUBBLOCK6_t_timerE_subblock_wk1 DEFINE 0xFFFFF945
ATUE_SUBBLOCK6_t_timerE_subblock_PSCRE_BYTE DEFINE 0xFFFFF948
ATUE_SUBBLOCK6_t_timerE_subblock_PSCRE_BIT_PSCE DEFINE 0
ATUE_SUBBLOCK6_t_timerE_subblock_wk2 DEFINE 0xFFFFF949
ATUE_SUBBLOCK6_t_timerE_subblock_SSTRE_BYTE DEFINE 0xFFFFF94C
ATUE_SUBBLOCK6_t_timerE_subblock_SSTRE_BIT_SSTRE0 DEFINE 0
ATUE_SUBBLOCK6_t_timerE_subblock_SSTRE_BIT_SSTRE1 DEFINE 1
ATUE_SUBBLOCK6_t_timerE_subblock_SSTRE_BIT_SSTRE2 DEFINE 2
ATUE_SUBBLOCK6_t_timerE_subblock_SSTRE_BIT_SSTRE3 DEFINE 3
ATUE_SUBBLOCK6_t_timerE_subblock_wk3 DEFINE 0xFFFFF94D
ATUE_SUBBLOCK6_t_timerE_subblock_CYLRE DEFINE 0xFFFFF950
ATUE_SUBBLOCK6_t_timerE_subblock_DTRE DEFINE 0xFFFFF958
ATUE_SUBBLOCK6_t_timerE_subblock_CRLDE DEFINE 0xFFFFF960
ATUE_SUBBLOCK6_t_timerE_subblock_DRLDE DEFINE 0xFFFFF968
ATUE_SUBBLOCK6_t_timerE_subblock_TCNTE DEFINE 0xFFFFF970
ATUE_SUBBLOCK6_t_timerE_subblock_wk4 DEFINE 0xFFFFF978

/* ATU Timer F module                           */
ATUF_TSTRF_LONG DEFINE 0xFFFFFA00
ATUF_TSTRF_BIT_STRF16 DEFINE 0
ATUF_TSTRF_BIT_STRF17 DEFINE 1
ATUF_TSTRF_BIT_STRF18 DEFINE 2
ATUF_TSTRF_BIT_STRF19 DEFINE 3
ATUF_TSTRF_BIT_STRF8 DEFINE 0
ATUF_TSTRF_BIT_STRF9 DEFINE 1
ATUF_TSTRF_BIT_STRF10 DEFINE 2
ATUF_TSTRF_BIT_STRF11 DEFINE 3
ATUF_TSTRF_BIT_STRF12 DEFINE 4
ATUF_TSTRF_BIT_STRF13 DEFINE 5
ATUF_TSTRF_BIT_STRF14 DEFINE 6
ATUF_TSTRF_BIT_STRF15 DEFINE 7
ATUF_TSTRF_BIT_STRF0 DEFINE 0
ATUF_TSTRF_BIT_STRF1 DEFINE 1
ATUF_TSTRF_BIT_STRF2 DEFINE 2
ATUF_TSTRF_BIT_STRF3 DEFINE 3
ATUF_TSTRF_BIT_STRF4 DEFINE 4
ATUF_TSTRF_BIT_STRF5 DEFINE 5
ATUF_TSTRF_BIT_STRF6 DEFINE 6
ATUF_TSTRF_BIT_STRF7 DEFINE 7
ATUF_NCCRF_LONG DEFINE 0xFFFFFA04
ATUF_NCCRF_BIT_NCEF16 DEFINE 0
ATUF_NCCRF_BIT_NCEF17 DEFINE 1
ATUF_NCCRF_BIT_NCEF18 DEFINE 2
ATUF_NCCRF_BIT_NCEF19 DEFINE 3
ATUF_NCCRF_BIT_NCEF8 DEFINE 0
ATUF_NCCRF_BIT_NCEF9 DEFINE 1
ATUF_NCCRF_BIT_NCEF10 DEFINE 2
ATUF_NCCRF_BIT_NCEF11 DEFINE 3
ATUF_NCCRF_BIT_NCEF12 DEFINE 4
ATUF_NCCRF_BIT_NCEF13 DEFINE 5
ATUF_NCCRF_BIT_NCEF14 DEFINE 6
ATUF_NCCRF_BIT_NCEF15 DEFINE 7
ATUF_NCCRF_BIT_NCEF0 DEFINE 0
ATUF_NCCRF_BIT_NCEF1 DEFINE 1
ATUF_NCCRF_BIT_NCEF2 DEFINE 2
ATUF_NCCRF_BIT_NCEF3 DEFINE 3
ATUF_NCCRF_BIT_NCEF4 DEFINE 4
ATUF_NCCRF_BIT_NCEF5 DEFINE 5
ATUF_NCCRF_BIT_NCEF6 DEFINE 6
ATUF_NCCRF_BIT_NCEF7 DEFINE 7
ATUF_wk1 DEFINE 0xFFFFFA08
ATUF_NCNTFA0 DEFINE 0xFFFFFA10
ATUF_NCRFA0 DEFINE 0xFFFFFA11
ATUF_NCNTFA1 DEFINE 0xFFFFFA12
ATUF_NCRFA1 DEFINE 0xFFFFFA13
ATUF_NCNTFA2 DEFINE 0xFFFFFA14
ATUF_NCRFA2 DEFINE 0xFFFFFA15
ATUF_NCNTFA3 DEFINE 0xFFFFFA16
ATUF_NCRFA3 DEFINE 0xFFFFFA17
ATUF_NCNTFA4 DEFINE 0xFFFFFA18
ATUF_NCRFA4 DEFINE 0xFFFFFA19
ATUF_NCNTFA5 DEFINE 0xFFFFFA1A
ATUF_NCRFA5 DEFINE 0xFFFFFA1B
ATUF_NCNTFA6 DEFINE 0xFFFFFA1C
ATUF_NCRFA6 DEFINE 0xFFFFFA1D
ATUF_NCNTFA7 DEFINE 0xFFFFFA1E
ATUF_NCRFA7 DEFINE 0xFFFFFA1F
ATUF_NCNTFA8 DEFINE 0xFFFFFA20
ATUF_NCRFA8 DEFINE 0xFFFFFA21
ATUF_NCNTFA9 DEFINE 0xFFFFFA22
ATUF_NCRFA9 DEFINE 0xFFFFFA23
ATUF_NCNTFA10 DEFINE 0xFFFFFA24
ATUF_NCRFA10 DEFINE 0xFFFFFA25
ATUF_NCNTFA11 DEFINE 0xFFFFFA26
ATUF_NCRFA11 DEFINE 0xFFFFFA27
ATUF_NCNTFA12 DEFINE 0xFFFFFA28
ATUF_NCRFA12 DEFINE 0xFFFFFA29
ATUF_NCNTFA13 DEFINE 0xFFFFFA2A
ATUF_NCRFA13 DEFINE 0xFFFFFA2B
ATUF_NCNTFA14 DEFINE 0xFFFFFA2C
ATUF_NCRFA14 DEFINE 0xFFFFFA2D
ATUF_NCNTFA15 DEFINE 0xFFFFFA2E
ATUF_NCRFA15 DEFINE 0xFFFFFA2F
ATUF_NCNTFA16 DEFINE 0xFFFFFA30
ATUF_NCRFA16 DEFINE 0xFFFFFA31
ATUF_NCNTFA17 DEFINE 0xFFFFFA32
ATUF_NCRFA17 DEFINE 0xFFFFFA33
ATUF_NCNTFA18 DEFINE 0xFFFFFA34
ATUF_NCRFA18 DEFINE 0xFFFFFA35
ATUF_NCNTFA19 DEFINE 0xFFFFFA36
ATUF_NCRFA19 DEFINE 0xFFFFFA37
ATUF_wk2 DEFINE 0xFFFFFA38
ATUF_NCNTFB0 DEFINE 0xFFFFFA50
ATUF_NCRFB0 DEFINE 0xFFFFFA51
ATUF_NCNTFB1 DEFINE 0xFFFFFA52
ATUF_NCRFB1 DEFINE 0xFFFFFA53
ATUF_NCNTFB2 DEFINE 0xFFFFFA54
ATUF_NCRFB2 DEFINE 0xFFFFFA55
ATUF_wk3 DEFINE 0xFFFFFA56
ATUF_SUBBLOCK1_t_timerF_subblock_TCRF_BYTE DEFINE 0xFFFFFA80
ATUF_SUBBLOCK1_t_timerF_subblock_TCRF_BIT_EGSELF DEFINE 0
ATUF_SUBBLOCK1_t_timerF_subblock_TCRF_BIT_MDF DEFINE 2
ATUF_SUBBLOCK1_t_timerF_subblock_TCRF_BIT_CKSELF DEFINE 5
ATUF_SUBBLOCK1_t_timerF_subblock_TIERF_BYTE DEFINE 0xFFFFFA81
ATUF_SUBBLOCK1_t_timerF_subblock_TIERF_BIT_ICEF DEFINE 0
ATUF_SUBBLOCK1_t_timerF_subblock_TIERF_BIT_OVEAF DEFINE 1
ATUF_SUBBLOCK1_t_timerF_subblock_TIERF_BIT_OVEBF DEFINE 2
ATUF_SUBBLOCK1_t_timerF_subblock_TIERF_BIT_OVECF DEFINE 3
ATUF_SUBBLOCK1_t_timerF_subblock_wk1 DEFINE 0xFFFFFA82
ATUF_SUBBLOCK1_t_timerF_subblock_TSRF_BYTE DEFINE 0xFFFFFA83
ATUF_SUBBLOCK1_t_timerF_subblock_TSRF_BIT_ICFF DEFINE 0
ATUF_SUBBLOCK1_t_timerF_subblock_TSRF_BIT_OVFAF DEFINE 1
ATUF_SUBBLOCK1_t_timerF_subblock_TSRF_BIT_OVFBF DEFINE 2
ATUF_SUBBLOCK1_t_timerF_subblock_TSRF_BIT_OVFCF DEFINE 3
ATUF_SUBBLOCK1_t_timerF_subblock_ECNTAF DEFINE 0xFFFFFA84
ATUF_SUBBLOCK1_t_timerF_subblock_ECNTBF DEFINE 0xFFFFFA88
ATUF_SUBBLOCK1_t_timerF_subblock_GRBF DEFINE 0xFFFFFA8A
ATUF_SUBBLOCK1_t_timerF_subblock_ECNTCF DEFINE 0xFFFFFA8C
ATUF_SUBBLOCK1_t_timerF_subblock_GRAF DEFINE 0xFFFFFA90
ATUF_SUBBLOCK1_t_timerF_subblock_CDRF DEFINE 0xFFFFFA94
ATUF_SUBBLOCK1_t_timerF_subblock_GRCF DEFINE 0xFFFFFA98
ATUF_SUBBLOCK1_t_timerF_subblock_GRDF DEFINE 0xFFFFFA9C
ATUF_SUBBLOCK2_t_timerF_subblock_TCRF_BYTE DEFINE 0xFFFFFAA0
ATUF_SUBBLOCK2_t_timerF_subblock_TCRF_BIT_EGSELF DEFINE 0
ATUF_SUBBLOCK2_t_timerF_subblock_TCRF_BIT_MDF DEFINE 2
ATUF_SUBBLOCK2_t_timerF_subblock_TCRF_BIT_CKSELF DEFINE 5
ATUF_SUBBLOCK2_t_timerF_subblock_TIERF_BYTE DEFINE 0xFFFFFAA1
ATUF_SUBBLOCK2_t_timerF_subblock_TIERF_BIT_ICEF DEFINE 0
ATUF_SUBBLOCK2_t_timerF_subblock_TIERF_BIT_OVEAF DEFINE 1
ATUF_SUBBLOCK2_t_timerF_subblock_TIERF_BIT_OVEBF DEFINE 2
ATUF_SUBBLOCK2_t_timerF_subblock_TIERF_BIT_OVECF DEFINE 3
ATUF_SUBBLOCK2_t_timerF_subblock_wk1 DEFINE 0xFFFFFAA2
ATUF_SUBBLOCK2_t_timerF_subblock_TSRF_BYTE DEFINE 0xFFFFFAA3
ATUF_SUBBLOCK2_t_timerF_subblock_TSRF_BIT_ICFF DEFINE 0
ATUF_SUBBLOCK2_t_timerF_subblock_TSRF_BIT_OVFAF DEFINE 1
ATUF_SUBBLOCK2_t_timerF_subblock_TSRF_BIT_OVFBF DEFINE 2
ATUF_SUBBLOCK2_t_timerF_subblock_TSRF_BIT_OVFCF DEFINE 3
ATUF_SUBBLOCK2_t_timerF_subblock_ECNTAF DEFINE 0xFFFFFAA4
ATUF_SUBBLOCK2_t_timerF_subblock_ECNTBF DEFINE 0xFFFFFAA8
ATUF_SUBBLOCK2_t_timerF_subblock_GRBF DEFINE 0xFFFFFAAA
ATUF_SUBBLOCK2_t_timerF_subblock_ECNTCF DEFINE 0xFFFFFAAC
ATUF_SUBBLOCK2_t_timerF_subblock_GRAF DEFINE 0xFFFFFAB0
ATUF_SUBBLOCK2_t_timerF_subblock_CDRF DEFINE 0xFFFFFAB4
ATUF_SUBBLOCK2_t_timerF_subblock_GRCF DEFINE 0xFFFFFAB8
ATUF_SUBBLOCK2_t_timerF_subblock_GRDF DEFINE 0xFFFFFABC
ATUF_SUBBLOCK3_t_timerF_subblock_TCRF_BYTE DEFINE 0xFFFFFAC0
ATUF_SUBBLOCK3_t_timerF_subblock_TCRF_BIT_EGSELF DEFINE 0
ATUF_SUBBLOCK3_t_timerF_subblock_TCRF_BIT_MDF DEFINE 2
ATUF_SUBBLOCK3_t_timerF_subblock_TCRF_BIT_CKSELF DEFINE 5
ATUF_SUBBLOCK3_t_timerF_subblock_TIERF_BYTE DEFINE 0xFFFFFAC1
ATUF_SUBBLOCK3_t_timerF_subblock_TIERF_BIT_ICEF DEFINE 0
ATUF_SUBBLOCK3_t_timerF_subblock_TIERF_BIT_OVEAF DEFINE 1
ATUF_SUBBLOCK3_t_timerF_subblock_TIERF_BIT_OVEBF DEFINE 2
ATUF_SUBBLOCK3_t_timerF_subblock_TIERF_BIT_OVECF DEFINE 3
ATUF_SUBBLOCK3_t_timerF_subblock_wk1 DEFINE 0xFFFFFAC2
ATUF_SUBBLOCK3_t_timerF_subblock_TSRF_BYTE DEFINE 0xFFFFFAC3
ATUF_SUBBLOCK3_t_timerF_subblock_TSRF_BIT_ICFF DEFINE 0
ATUF_SUBBLOCK3_t_timerF_subblock_TSRF_BIT_OVFAF DEFINE 1
ATUF_SUBBLOCK3_t_timerF_subblock_TSRF_BIT_OVFBF DEFINE 2
ATUF_SUBBLOCK3_t_timerF_subblock_TSRF_BIT_OVFCF DEFINE 3
ATUF_SUBBLOCK3_t_timerF_subblock_ECNTAF DEFINE 0xFFFFFAC4
ATUF_SUBBLOCK3_t_timerF_subblock_ECNTBF DEFINE 0xFFFFFAC8
ATUF_SUBBLOCK3_t_timerF_subblock_GRBF DEFINE 0xFFFFFACA
ATUF_SUBBLOCK3_t_timerF_subblock_ECNTCF DEFINE 0xFFFFFACC
ATUF_SUBBLOCK3_t_timerF_subblock_GRAF DEFINE 0xFFFFFAD0
ATUF_SUBBLOCK3_t_timerF_subblock_CDRF DEFINE 0xFFFFFAD4
ATUF_SUBBLOCK3_t_timerF_subblock_GRCF DEFINE 0xFFFFFAD8
ATUF_SUBBLOCK3_t_timerF_subblock_GRDF DEFINE 0xFFFFFADC
ATUF_SUBBLOCK4_t_timerF_subblock_TCRF_BYTE DEFINE 0xFFFFFAE0
ATUF_SUBBLOCK4_t_timerF_subblock_TCRF_BIT_EGSELF DEFINE 0
ATUF_SUBBLOCK4_t_timerF_subblock_TCRF_BIT_MDF DEFINE 2
ATUF_SUBBLOCK4_t_timerF_subblock_TCRF_BIT_CKSELF DEFINE 5
ATUF_SUBBLOCK4_t_timerF_subblock_TIERF_BYTE DEFINE 0xFFFFFAE1
ATUF_SUBBLOCK4_t_timerF_subblock_TIERF_BIT_ICEF DEFINE 0
ATUF_SUBBLOCK4_t_timerF_subblock_TIERF_BIT_OVEAF DEFINE 1
ATUF_SUBBLOCK4_t_timerF_subblock_TIERF_BIT_OVEBF DEFINE 2
ATUF_SUBBLOCK4_t_timerF_subblock_TIERF_BIT_OVECF DEFINE 3
ATUF_SUBBLOCK4_t_timerF_subblock_wk1 DEFINE 0xFFFFFAE2
ATUF_SUBBLOCK4_t_timerF_subblock_TSRF_BYTE DEFINE 0xFFFFFAE3
ATUF_SUBBLOCK4_t_timerF_subblock_TSRF_BIT_ICFF DEFINE 0
ATUF_SUBBLOCK4_t_timerF_subblock_TSRF_BIT_OVFAF DEFINE 1
ATUF_SUBBLOCK4_t_timerF_subblock_TSRF_BIT_OVFBF DEFINE 2
ATUF_SUBBLOCK4_t_timerF_subblock_TSRF_BIT_OVFCF DEFINE 3
ATUF_SUBBLOCK4_t_timerF_subblock_ECNTAF DEFINE 0xFFFFFAE4
ATUF_SUBBLOCK4_t_timerF_subblock_ECNTBF DEFINE 0xFFFFFAE8
ATUF_SUBBLOCK4_t_timerF_subblock_GRBF DEFINE 0xFFFFFAEA
ATUF_SUBBLOCK4_t_timerF_subblock_ECNTCF DEFINE 0xFFFFFAEC
ATUF_SUBBLOCK4_t_timerF_subblock_GRAF DEFINE 0xFFFFFAF0
ATUF_SUBBLOCK4_t_timerF_subblock_CDRF DEFINE 0xFFFFFAF4
ATUF_SUBBLOCK4_t_timerF_subblock_GRCF DEFINE 0xFFFFFAF8
ATUF_SUBBLOCK4_t_timerF_subblock_GRDF DEFINE 0xFFFFFAFC
ATUF_SUBBLOCK5_t_timerF_subblock_TCRF_BYTE DEFINE 0xFFFFFB00
ATUF_SUBBLOCK5_t_timerF_subblock_TCRF_BIT_EGSELF DEFINE 0
ATUF_SUBBLOCK5_t_timerF_subblock_TCRF_BIT_MDF DEFINE 2
ATUF_SUBBLOCK5_t_timerF_subblock_TCRF_BIT_CKSELF DEFINE 5
ATUF_SUBBLOCK5_t_timerF_subblock_TIERF_BYTE DEFINE 0xFFFFFB01
ATUF_SUBBLOCK5_t_timerF_subblock_TIERF_BIT_ICEF DEFINE 0
ATUF_SUBBLOCK5_t_timerF_subblock_TIERF_BIT_OVEAF DEFINE 1
ATUF_SUBBLOCK5_t_timerF_subblock_TIERF_BIT_OVEBF DEFINE 2
ATUF_SUBBLOCK5_t_timerF_subblock_TIERF_BIT_OVECF DEFINE 3
ATUF_SUBBLOCK5_t_timerF_subblock_wk1 DEFINE 0xFFFFFB02
ATUF_SUBBLOCK5_t_timerF_subblock_TSRF_BYTE DEFINE 0xFFFFFB03
ATUF_SUBBLOCK5_t_timerF_subblock_TSRF_BIT_ICFF DEFINE 0
ATUF_SUBBLOCK5_t_timerF_subblock_TSRF_BIT_OVFAF DEFINE 1
ATUF_SUBBLOCK5_t_timerF_subblock_TSRF_BIT_OVFBF DEFINE 2
ATUF_SUBBLOCK5_t_timerF_subblock_TSRF_BIT_OVFCF DEFINE 3
ATUF_SUBBLOCK5_t_timerF_subblock_ECNTAF DEFINE 0xFFFFFB04
ATUF_SUBBLOCK5_t_timerF_subblock_ECNTBF DEFINE 0xFFFFFB08
ATUF_SUBBLOCK5_t_timerF_subblock_GRBF DEFINE 0xFFFFFB0A
ATUF_SUBBLOCK5_t_timerF_subblock_ECNTCF DEFINE 0xFFFFFB0C
ATUF_SUBBLOCK5_t_timerF_subblock_GRAF DEFINE 0xFFFFFB10
ATUF_SUBBLOCK5_t_timerF_subblock_CDRF DEFINE 0xFFFFFB14
ATUF_SUBBLOCK5_t_timerF_subblock_GRCF DEFINE 0xFFFFFB18
ATUF_SUBBLOCK5_t_timerF_subblock_GRDF DEFINE 0xFFFFFB1C
ATUF_SUBBLOCK6_t_timerF_subblock_TCRF_BYTE DEFINE 0xFFFFFB20
ATUF_SUBBLOCK6_t_timerF_subblock_TCRF_BIT_EGSELF DEFINE 0
ATUF_SUBBLOCK6_t_timerF_subblock_TCRF_BIT_MDF DEFINE 2
ATUF_SUBBLOCK6_t_timerF_subblock_TCRF_BIT_CKSELF DEFINE 5
ATUF_SUBBLOCK6_t_timerF_subblock_TIERF_BYTE DEFINE 0xFFFFFB21
ATUF_SUBBLOCK6_t_timerF_subblock_TIERF_BIT_ICEF DEFINE 0
ATUF_SUBBLOCK6_t_timerF_subblock_TIERF_BIT_OVEAF DEFINE 1
ATUF_SUBBLOCK6_t_timerF_subblock_TIERF_BIT_OVEBF DEFINE 2
ATUF_SUBBLOCK6_t_timerF_subblock_TIERF_BIT_OVECF DEFINE 3
ATUF_SUBBLOCK6_t_timerF_subblock_wk1 DEFINE 0xFFFFFB22
ATUF_SUBBLOCK6_t_timerF_subblock_TSRF_BYTE DEFINE 0xFFFFFB23
ATUF_SUBBLOCK6_t_timerF_subblock_TSRF_BIT_ICFF DEFINE 0
ATUF_SUBBLOCK6_t_timerF_subblock_TSRF_BIT_OVFAF DEFINE 1
ATUF_SUBBLOCK6_t_timerF_subblock_TSRF_BIT_OVFBF DEFINE 2
ATUF_SUBBLOCK6_t_timerF_subblock_TSRF_BIT_OVFCF DEFINE 3
ATUF_SUBBLOCK6_t_timerF_subblock_ECNTAF DEFINE 0xFFFFFB24
ATUF_SUBBLOCK6_t_timerF_subblock_ECNTBF DEFINE 0xFFFFFB28
ATUF_SUBBLOCK6_t_timerF_subblock_GRBF DEFINE 0xFFFFFB2A
ATUF_SUBBLOCK6_t_timerF_subblock_ECNTCF DEFINE 0xFFFFFB2C
ATUF_SUBBLOCK6_t_timerF_subblock_GRAF DEFINE 0xFFFFFB30
ATUF_SUBBLOCK6_t_timerF_subblock_CDRF DEFINE 0xFFFFFB34
ATUF_SUBBLOCK6_t_timerF_subblock_GRCF DEFINE 0xFFFFFB38
ATUF_SUBBLOCK6_t_timerF_subblock_GRDF DEFINE 0xFFFFFB3C
ATUF_SUBBLOCK7_t_timerF_subblock_TCRF_BYTE DEFINE 0xFFFFFB40
ATUF_SUBBLOCK7_t_timerF_subblock_TCRF_BIT_EGSELF DEFINE 0
ATUF_SUBBLOCK7_t_timerF_subblock_TCRF_BIT_MDF DEFINE 2
ATUF_SUBBLOCK7_t_timerF_subblock_TCRF_BIT_CKSELF DEFINE 5
ATUF_SUBBLOCK7_t_timerF_subblock_TIERF_BYTE DEFINE 0xFFFFFB41
ATUF_SUBBLOCK7_t_timerF_subblock_TIERF_BIT_ICEF DEFINE 0
ATUF_SUBBLOCK7_t_timerF_subblock_TIERF_BIT_OVEAF DEFINE 1
ATUF_SUBBLOCK7_t_timerF_subblock_TIERF_BIT_OVEBF DEFINE 2
ATUF_SUBBLOCK7_t_timerF_subblock_TIERF_BIT_OVECF DEFINE 3
ATUF_SUBBLOCK7_t_timerF_subblock_wk1 DEFINE 0xFFFFFB42
ATUF_SUBBLOCK7_t_timerF_subblock_TSRF_BYTE DEFINE 0xFFFFFB43
ATUF_SUBBLOCK7_t_timerF_subblock_TSRF_BIT_ICFF DEFINE 0
ATUF_SUBBLOCK7_t_timerF_subblock_TSRF_BIT_OVFAF DEFINE 1
ATUF_SUBBLOCK7_t_timerF_subblock_TSRF_BIT_OVFBF DEFINE 2
ATUF_SUBBLOCK7_t_timerF_subblock_TSRF_BIT_OVFCF DEFINE 3
ATUF_SUBBLOCK7_t_timerF_subblock_ECNTAF DEFINE 0xFFFFFB44
ATUF_SUBBLOCK7_t_timerF_subblock_ECNTBF DEFINE 0xFFFFFB48
ATUF_SUBBLOCK7_t_timerF_subblock_GRBF DEFINE 0xFFFFFB4A
ATUF_SUBBLOCK7_t_timerF_subblock_ECNTCF DEFINE 0xFFFFFB4C
ATUF_SUBBLOCK7_t_timerF_subblock_GRAF DEFINE 0xFFFFFB50
ATUF_SUBBLOCK7_t_timerF_subblock_CDRF DEFINE 0xFFFFFB54
ATUF_SUBBLOCK7_t_timerF_subblock_GRCF DEFINE 0xFFFFFB58
ATUF_SUBBLOCK7_t_timerF_subblock_GRDF DEFINE 0xFFFFFB5C
ATUF_SUBBLOCK8_t_timerF_subblock_TCRF_BYTE DEFINE 0xFFFFFB60
ATUF_SUBBLOCK8_t_timerF_subblock_TCRF_BIT_EGSELF DEFINE 0
ATUF_SUBBLOCK8_t_timerF_subblock_TCRF_BIT_MDF DEFINE 2
ATUF_SUBBLOCK8_t_timerF_subblock_TCRF_BIT_CKSELF DEFINE 5
ATUF_SUBBLOCK8_t_timerF_subblock_TIERF_BYTE DEFINE 0xFFFFFB61
ATUF_SUBBLOCK8_t_timerF_subblock_TIERF_BIT_ICEF DEFINE 0
ATUF_SUBBLOCK8_t_timerF_subblock_TIERF_BIT_OVEAF DEFINE 1
ATUF_SUBBLOCK8_t_timerF_subblock_TIERF_BIT_OVEBF DEFINE 2
ATUF_SUBBLOCK8_t_timerF_subblock_TIERF_BIT_OVECF DEFINE 3
ATUF_SUBBLOCK8_t_timerF_subblock_wk1 DEFINE 0xFFFFFB62
ATUF_SUBBLOCK8_t_timerF_subblock_TSRF_BYTE DEFINE 0xFFFFFB63
ATUF_SUBBLOCK8_t_timerF_subblock_TSRF_BIT_ICFF DEFINE 0
ATUF_SUBBLOCK8_t_timerF_subblock_TSRF_BIT_OVFAF DEFINE 1
ATUF_SUBBLOCK8_t_timerF_subblock_TSRF_BIT_OVFBF DEFINE 2
ATUF_SUBBLOCK8_t_timerF_subblock_TSRF_BIT_OVFCF DEFINE 3
ATUF_SUBBLOCK8_t_timerF_subblock_ECNTAF DEFINE 0xFFFFFB64
ATUF_SUBBLOCK8_t_timerF_subblock_ECNTBF DEFINE 0xFFFFFB68
ATUF_SUBBLOCK8_t_timerF_subblock_GRBF DEFINE 0xFFFFFB6A
ATUF_SUBBLOCK8_t_timerF_subblock_ECNTCF DEFINE 0xFFFFFB6C
ATUF_SUBBLOCK8_t_timerF_subblock_GRAF DEFINE 0xFFFFFB70
ATUF_SUBBLOCK8_t_timerF_subblock_CDRF DEFINE 0xFFFFFB74
ATUF_SUBBLOCK8_t_timerF_subblock_GRCF DEFINE 0xFFFFFB78
ATUF_SUBBLOCK8_t_timerF_subblock_GRDF DEFINE 0xFFFFFB7C
ATUF_SUBBLOCK9_t_timerF_subblock_TCRF_BYTE DEFINE 0xFFFFFB80
ATUF_SUBBLOCK9_t_timerF_subblock_TCRF_BIT_EGSELF DEFINE 0
ATUF_SUBBLOCK9_t_timerF_subblock_TCRF_BIT_MDF DEFINE 2
ATUF_SUBBLOCK9_t_timerF_subblock_TCRF_BIT_CKSELF DEFINE 5
ATUF_SUBBLOCK9_t_timerF_subblock_TIERF_BYTE DEFINE 0xFFFFFB81
ATUF_SUBBLOCK9_t_timerF_subblock_TIERF_BIT_ICEF DEFINE 0
ATUF_SUBBLOCK9_t_timerF_subblock_TIERF_BIT_OVEAF DEFINE 1
ATUF_SUBBLOCK9_t_timerF_subblock_TIERF_BIT_OVEBF DEFINE 2
ATUF_SUBBLOCK9_t_timerF_subblock_TIERF_BIT_OVECF DEFINE 3
ATUF_SUBBLOCK9_t_timerF_subblock_wk1 DEFINE 0xFFFFFB82
ATUF_SUBBLOCK9_t_timerF_subblock_TSRF_BYTE DEFINE 0xFFFFFB83
ATUF_SUBBLOCK9_t_timerF_subblock_TSRF_BIT_ICFF DEFINE 0
ATUF_SUBBLOCK9_t_timerF_subblock_TSRF_BIT_OVFAF DEFINE 1
ATUF_SUBBLOCK9_t_timerF_subblock_TSRF_BIT_OVFBF DEFINE 2
ATUF_SUBBLOCK9_t_timerF_subblock_TSRF_BIT_OVFCF DEFINE 3
ATUF_SUBBLOCK9_t_timerF_subblock_ECNTAF DEFINE 0xFFFFFB84
ATUF_SUBBLOCK9_t_timerF_subblock_ECNTBF DEFINE 0xFFFFFB88
ATUF_SUBBLOCK9_t_timerF_subblock_GRBF DEFINE 0xFFFFFB8A
ATUF_SUBBLOCK9_t_timerF_subblock_ECNTCF DEFINE 0xFFFFFB8C
ATUF_SUBBLOCK9_t_timerF_subblock_GRAF DEFINE 0xFFFFFB90
ATUF_SUBBLOCK9_t_timerF_subblock_CDRF DEFINE 0xFFFFFB94
ATUF_SUBBLOCK9_t_timerF_subblock_GRCF DEFINE 0xFFFFFB98
ATUF_SUBBLOCK9_t_timerF_subblock_GRDF DEFINE 0xFFFFFB9C
ATUF_SUBBLOCK10_t_timerF_subblock_TCRF_BYTE DEFINE 0xFFFFFBA0
ATUF_SUBBLOCK10_t_timerF_subblock_TCRF_BIT_EGSELF DEFINE 0
ATUF_SUBBLOCK10_t_timerF_subblock_TCRF_BIT_MDF DEFINE 2
ATUF_SUBBLOCK10_t_timerF_subblock_TCRF_BIT_CKSELF DEFINE 5
ATUF_SUBBLOCK10_t_timerF_subblock_TIERF_BYTE DEFINE 0xFFFFFBA1
ATUF_SUBBLOCK10_t_timerF_subblock_TIERF_BIT_ICEF DEFINE 0
ATUF_SUBBLOCK10_t_timerF_subblock_TIERF_BIT_OVEAF DEFINE 1
ATUF_SUBBLOCK10_t_timerF_subblock_TIERF_BIT_OVEBF DEFINE 2
ATUF_SUBBLOCK10_t_timerF_subblock_TIERF_BIT_OVECF DEFINE 3
ATUF_SUBBLOCK10_t_timerF_subblock_wk1 DEFINE 0xFFFFFBA2
ATUF_SUBBLOCK10_t_timerF_subblock_TSRF_BYTE DEFINE 0xFFFFFBA3
ATUF_SUBBLOCK10_t_timerF_subblock_TSRF_BIT_ICFF DEFINE 0
ATUF_SUBBLOCK10_t_timerF_subblock_TSRF_BIT_OVFAF DEFINE 1
ATUF_SUBBLOCK10_t_timerF_subblock_TSRF_BIT_OVFBF DEFINE 2
ATUF_SUBBLOCK10_t_timerF_subblock_TSRF_BIT_OVFCF DEFINE 3
ATUF_SUBBLOCK10_t_timerF_subblock_ECNTAF DEFINE 0xFFFFFBA4
ATUF_SUBBLOCK10_t_timerF_subblock_ECNTBF DEFINE 0xFFFFFBA8
ATUF_SUBBLOCK10_t_timerF_subblock_GRBF DEFINE 0xFFFFFBAA
ATUF_SUBBLOCK10_t_timerF_subblock_ECNTCF DEFINE 0xFFFFFBAC
ATUF_SUBBLOCK10_t_timerF_subblock_GRAF DEFINE 0xFFFFFBB0
ATUF_SUBBLOCK10_t_timerF_subblock_CDRF DEFINE 0xFFFFFBB4
ATUF_SUBBLOCK10_t_timerF_subblock_GRCF DEFINE 0xFFFFFBB8
ATUF_SUBBLOCK10_t_timerF_subblock_GRDF DEFINE 0xFFFFFBBC
ATUF_SUBBLOCK11_t_timerF_subblock_TCRF_BYTE DEFINE 0xFFFFFBC0
ATUF_SUBBLOCK11_t_timerF_subblock_TCRF_BIT_EGSELF DEFINE 0
ATUF_SUBBLOCK11_t_timerF_subblock_TCRF_BIT_MDF DEFINE 2
ATUF_SUBBLOCK11_t_timerF_subblock_TCRF_BIT_CKSELF DEFINE 5
ATUF_SUBBLOCK11_t_timerF_subblock_TIERF_BYTE DEFINE 0xFFFFFBC1
ATUF_SUBBLOCK11_t_timerF_subblock_TIERF_BIT_ICEF DEFINE 0
ATUF_SUBBLOCK11_t_timerF_subblock_TIERF_BIT_OVEAF DEFINE 1
ATUF_SUBBLOCK11_t_timerF_subblock_TIERF_BIT_OVEBF DEFINE 2
ATUF_SUBBLOCK11_t_timerF_subblock_TIERF_BIT_OVECF DEFINE 3
ATUF_SUBBLOCK11_t_timerF_subblock_wk1 DEFINE 0xFFFFFBC2
ATUF_SUBBLOCK11_t_timerF_subblock_TSRF_BYTE DEFINE 0xFFFFFBC3
ATUF_SUBBLOCK11_t_timerF_subblock_TSRF_BIT_ICFF DEFINE 0
ATUF_SUBBLOCK11_t_timerF_subblock_TSRF_BIT_OVFAF DEFINE 1
ATUF_SUBBLOCK11_t_timerF_subblock_TSRF_BIT_OVFBF DEFINE 2
ATUF_SUBBLOCK11_t_timerF_subblock_TSRF_BIT_OVFCF DEFINE 3
ATUF_SUBBLOCK11_t_timerF_subblock_ECNTAF DEFINE 0xFFFFFBC4
ATUF_SUBBLOCK11_t_timerF_subblock_ECNTBF DEFINE 0xFFFFFBC8
ATUF_SUBBLOCK11_t_timerF_subblock_GRBF DEFINE 0xFFFFFBCA
ATUF_SUBBLOCK11_t_timerF_subblock_ECNTCF DEFINE 0xFFFFFBCC
ATUF_SUBBLOCK11_t_timerF_subblock_GRAF DEFINE 0xFFFFFBD0
ATUF_SUBBLOCK11_t_timerF_subblock_CDRF DEFINE 0xFFFFFBD4
ATUF_SUBBLOCK11_t_timerF_subblock_GRCF DEFINE 0xFFFFFBD8
ATUF_SUBBLOCK11_t_timerF_subblock_GRDF DEFINE 0xFFFFFBDC
ATUF_SUBBLOCK12_t_timerF_subblock_TCRF_BYTE DEFINE 0xFFFFFBE0
ATUF_SUBBLOCK12_t_timerF_subblock_TCRF_BIT_EGSELF DEFINE 0
ATUF_SUBBLOCK12_t_timerF_subblock_TCRF_BIT_MDF DEFINE 2
ATUF_SUBBLOCK12_t_timerF_subblock_TCRF_BIT_CKSELF DEFINE 5
ATUF_SUBBLOCK12_t_timerF_subblock_TIERF_BYTE DEFINE 0xFFFFFBE1
ATUF_SUBBLOCK12_t_timerF_subblock_TIERF_BIT_ICEF DEFINE 0
ATUF_SUBBLOCK12_t_timerF_subblock_TIERF_BIT_OVEAF DEFINE 1
ATUF_SUBBLOCK12_t_timerF_subblock_TIERF_BIT_OVEBF DEFINE 2
ATUF_SUBBLOCK12_t_timerF_subblock_TIERF_BIT_OVECF DEFINE 3
ATUF_SUBBLOCK12_t_timerF_subblock_wk1 DEFINE 0xFFFFFBE2
ATUF_SUBBLOCK12_t_timerF_subblock_TSRF_BYTE DEFINE 0xFFFFFBE3
ATUF_SUBBLOCK12_t_timerF_subblock_TSRF_BIT_ICFF DEFINE 0
ATUF_SUBBLOCK12_t_timerF_subblock_TSRF_BIT_OVFAF DEFINE 1
ATUF_SUBBLOCK12_t_timerF_subblock_TSRF_BIT_OVFBF DEFINE 2
ATUF_SUBBLOCK12_t_timerF_subblock_TSRF_BIT_OVFCF DEFINE 3
ATUF_SUBBLOCK12_t_timerF_subblock_ECNTAF DEFINE 0xFFFFFBE4
ATUF_SUBBLOCK12_t_timerF_subblock_ECNTBF DEFINE 0xFFFFFBE8
ATUF_SUBBLOCK12_t_timerF_subblock_GRBF DEFINE 0xFFFFFBEA
ATUF_SUBBLOCK12_t_timerF_subblock_ECNTCF DEFINE 0xFFFFFBEC
ATUF_SUBBLOCK12_t_timerF_subblock_GRAF DEFINE 0xFFFFFBF0
ATUF_SUBBLOCK12_t_timerF_subblock_CDRF DEFINE 0xFFFFFBF4
ATUF_SUBBLOCK12_t_timerF_subblock_GRCF DEFINE 0xFFFFFBF8
ATUF_SUBBLOCK12_t_timerF_subblock_GRDF DEFINE 0xFFFFFBFC
ATUF_SUBBLOCK13_t_timerF_subblock_TCRF_BYTE DEFINE 0xFFFFFC00
ATUF_SUBBLOCK13_t_timerF_subblock_TCRF_BIT_EGSELF DEFINE 0
ATUF_SUBBLOCK13_t_timerF_subblock_TCRF_BIT_MDF DEFINE 2
ATUF_SUBBLOCK13_t_timerF_subblock_TCRF_BIT_CKSELF DEFINE 5
ATUF_SUBBLOCK13_t_timerF_subblock_TIERF_BYTE DEFINE 0xFFFFFC01
ATUF_SUBBLOCK13_t_timerF_subblock_TIERF_BIT_ICEF DEFINE 0
ATUF_SUBBLOCK13_t_timerF_subblock_TIERF_BIT_OVEAF DEFINE 1
ATUF_SUBBLOCK13_t_timerF_subblock_TIERF_BIT_OVEBF DEFINE 2
ATUF_SUBBLOCK13_t_timerF_subblock_TIERF_BIT_OVECF DEFINE 3
ATUF_SUBBLOCK13_t_timerF_subblock_wk1 DEFINE 0xFFFFFC02
ATUF_SUBBLOCK13_t_timerF_subblock_TSRF_BYTE DEFINE 0xFFFFFC03
ATUF_SUBBLOCK13_t_timerF_subblock_TSRF_BIT_ICFF DEFINE 0
ATUF_SUBBLOCK13_t_timerF_subblock_TSRF_BIT_OVFAF DEFINE 1
ATUF_SUBBLOCK13_t_timerF_subblock_TSRF_BIT_OVFBF DEFINE 2
ATUF_SUBBLOCK13_t_timerF_subblock_TSRF_BIT_OVFCF DEFINE 3
ATUF_SUBBLOCK13_t_timerF_subblock_ECNTAF DEFINE 0xFFFFFC04
ATUF_SUBBLOCK13_t_timerF_subblock_ECNTBF DEFINE 0xFFFFFC08
ATUF_SUBBLOCK13_t_timerF_subblock_GRBF DEFINE 0xFFFFFC0A
ATUF_SUBBLOCK13_t_timerF_subblock_ECNTCF DEFINE 0xFFFFFC0C
ATUF_SUBBLOCK13_t_timerF_subblock_GRAF DEFINE 0xFFFFFC10
ATUF_SUBBLOCK13_t_timerF_subblock_CDRF DEFINE 0xFFFFFC14
ATUF_SUBBLOCK13_t_timerF_subblock_GRCF DEFINE 0xFFFFFC18
ATUF_SUBBLOCK13_t_timerF_subblock_GRDF DEFINE 0xFFFFFC1C
ATUF_SUBBLOCK14_t_timerF_subblock_TCRF_BYTE DEFINE 0xFFFFFC20
ATUF_SUBBLOCK14_t_timerF_subblock_TCRF_BIT_EGSELF DEFINE 0
ATUF_SUBBLOCK14_t_timerF_subblock_TCRF_BIT_MDF DEFINE 2
ATUF_SUBBLOCK14_t_timerF_subblock_TCRF_BIT_CKSELF DEFINE 5
ATUF_SUBBLOCK14_t_timerF_subblock_TIERF_BYTE DEFINE 0xFFFFFC21
ATUF_SUBBLOCK14_t_timerF_subblock_TIERF_BIT_ICEF DEFINE 0
ATUF_SUBBLOCK14_t_timerF_subblock_TIERF_BIT_OVEAF DEFINE 1
ATUF_SUBBLOCK14_t_timerF_subblock_TIERF_BIT_OVEBF DEFINE 2
ATUF_SUBBLOCK14_t_timerF_subblock_TIERF_BIT_OVECF DEFINE 3
ATUF_SUBBLOCK14_t_timerF_subblock_wk1 DEFINE 0xFFFFFC22
ATUF_SUBBLOCK14_t_timerF_subblock_TSRF_BYTE DEFINE 0xFFFFFC23
ATUF_SUBBLOCK14_t_timerF_subblock_TSRF_BIT_ICFF DEFINE 0
ATUF_SUBBLOCK14_t_timerF_subblock_TSRF_BIT_OVFAF DEFINE 1
ATUF_SUBBLOCK14_t_timerF_subblock_TSRF_BIT_OVFBF DEFINE 2
ATUF_SUBBLOCK14_t_timerF_subblock_TSRF_BIT_OVFCF DEFINE 3
ATUF_SUBBLOCK14_t_timerF_subblock_ECNTAF DEFINE 0xFFFFFC24
ATUF_SUBBLOCK14_t_timerF_subblock_ECNTBF DEFINE 0xFFFFFC28
ATUF_SUBBLOCK14_t_timerF_subblock_GRBF DEFINE 0xFFFFFC2A
ATUF_SUBBLOCK14_t_timerF_subblock_ECNTCF DEFINE 0xFFFFFC2C
ATUF_SUBBLOCK14_t_timerF_subblock_GRAF DEFINE 0xFFFFFC30
ATUF_SUBBLOCK14_t_timerF_subblock_CDRF DEFINE 0xFFFFFC34
ATUF_SUBBLOCK14_t_timerF_subblock_GRCF DEFINE 0xFFFFFC38
ATUF_SUBBLOCK14_t_timerF_subblock_GRDF DEFINE 0xFFFFFC3C
ATUF_SUBBLOCK15_t_timerF_subblock_TCRF_BYTE DEFINE 0xFFFFFC40
ATUF_SUBBLOCK15_t_timerF_subblock_TCRF_BIT_EGSELF DEFINE 0
ATUF_SUBBLOCK15_t_timerF_subblock_TCRF_BIT_MDF DEFINE 2
ATUF_SUBBLOCK15_t_timerF_subblock_TCRF_BIT_CKSELF DEFINE 5
ATUF_SUBBLOCK15_t_timerF_subblock_TIERF_BYTE DEFINE 0xFFFFFC41
ATUF_SUBBLOCK15_t_timerF_subblock_TIERF_BIT_ICEF DEFINE 0
ATUF_SUBBLOCK15_t_timerF_subblock_TIERF_BIT_OVEAF DEFINE 1
ATUF_SUBBLOCK15_t_timerF_subblock_TIERF_BIT_OVEBF DEFINE 2
ATUF_SUBBLOCK15_t_timerF_subblock_TIERF_BIT_OVECF DEFINE 3
ATUF_SUBBLOCK15_t_timerF_subblock_wk1 DEFINE 0xFFFFFC42
ATUF_SUBBLOCK15_t_timerF_subblock_TSRF_BYTE DEFINE 0xFFFFFC43
ATUF_SUBBLOCK15_t_timerF_subblock_TSRF_BIT_ICFF DEFINE 0
ATUF_SUBBLOCK15_t_timerF_subblock_TSRF_BIT_OVFAF DEFINE 1
ATUF_SUBBLOCK15_t_timerF_subblock_TSRF_BIT_OVFBF DEFINE 2
ATUF_SUBBLOCK15_t_timerF_subblock_TSRF_BIT_OVFCF DEFINE 3
ATUF_SUBBLOCK15_t_timerF_subblock_ECNTAF DEFINE 0xFFFFFC44
ATUF_SUBBLOCK15_t_timerF_subblock_ECNTBF DEFINE 0xFFFFFC48
ATUF_SUBBLOCK15_t_timerF_subblock_GRBF DEFINE 0xFFFFFC4A
ATUF_SUBBLOCK15_t_timerF_subblock_ECNTCF DEFINE 0xFFFFFC4C
ATUF_SUBBLOCK15_t_timerF_subblock_GRAF DEFINE 0xFFFFFC50
ATUF_SUBBLOCK15_t_timerF_subblock_CDRF DEFINE 0xFFFFFC54
ATUF_SUBBLOCK15_t_timerF_subblock_GRCF DEFINE 0xFFFFFC58
ATUF_SUBBLOCK15_t_timerF_subblock_GRDF DEFINE 0xFFFFFC5C
ATUF_SUBBLOCK16_t_timerF_subblock_TCRF_BYTE DEFINE 0xFFFFFC60
ATUF_SUBBLOCK16_t_timerF_subblock_TCRF_BIT_EGSELF DEFINE 0
ATUF_SUBBLOCK16_t_timerF_subblock_TCRF_BIT_MDF DEFINE 2
ATUF_SUBBLOCK16_t_timerF_subblock_TCRF_BIT_CKSELF DEFINE 5
ATUF_SUBBLOCK16_t_timerF_subblock_TIERF_BYTE DEFINE 0xFFFFFC61
ATUF_SUBBLOCK16_t_timerF_subblock_TIERF_BIT_ICEF DEFINE 0
ATUF_SUBBLOCK16_t_timerF_subblock_TIERF_BIT_OVEAF DEFINE 1
ATUF_SUBBLOCK16_t_timerF_subblock_TIERF_BIT_OVEBF DEFINE 2
ATUF_SUBBLOCK16_t_timerF_subblock_TIERF_BIT_OVECF DEFINE 3
ATUF_SUBBLOCK16_t_timerF_subblock_wk1 DEFINE 0xFFFFFC62
ATUF_SUBBLOCK16_t_timerF_subblock_TSRF_BYTE DEFINE 0xFFFFFC63
ATUF_SUBBLOCK16_t_timerF_subblock_TSRF_BIT_ICFF DEFINE 0
ATUF_SUBBLOCK16_t_timerF_subblock_TSRF_BIT_OVFAF DEFINE 1
ATUF_SUBBLOCK16_t_timerF_subblock_TSRF_BIT_OVFBF DEFINE 2
ATUF_SUBBLOCK16_t_timerF_subblock_TSRF_BIT_OVFCF DEFINE 3
ATUF_SUBBLOCK16_t_timerF_subblock_ECNTAF DEFINE 0xFFFFFC64
ATUF_SUBBLOCK16_t_timerF_subblock_ECNTBF DEFINE 0xFFFFFC68
ATUF_SUBBLOCK16_t_timerF_subblock_GRBF DEFINE 0xFFFFFC6A
ATUF_SUBBLOCK16_t_timerF_subblock_ECNTCF DEFINE 0xFFFFFC6C
ATUF_SUBBLOCK16_t_timerF_subblock_GRAF DEFINE 0xFFFFFC70
ATUF_SUBBLOCK16_t_timerF_subblock_CDRF DEFINE 0xFFFFFC74
ATUF_SUBBLOCK16_t_timerF_subblock_GRCF DEFINE 0xFFFFFC78
ATUF_SUBBLOCK16_t_timerF_subblock_GRDF DEFINE 0xFFFFFC7C
ATUF_SUBBLOCK17_t_timerF_subblock_TCRF_BYTE DEFINE 0xFFFFFC80
ATUF_SUBBLOCK17_t_timerF_subblock_TCRF_BIT_EGSELF DEFINE 0
ATUF_SUBBLOCK17_t_timerF_subblock_TCRF_BIT_MDF DEFINE 2
ATUF_SUBBLOCK17_t_timerF_subblock_TCRF_BIT_CKSELF DEFINE 5
ATUF_SUBBLOCK17_t_timerF_subblock_TIERF_BYTE DEFINE 0xFFFFFC81
ATUF_SUBBLOCK17_t_timerF_subblock_TIERF_BIT_ICEF DEFINE 0
ATUF_SUBBLOCK17_t_timerF_subblock_TIERF_BIT_OVEAF DEFINE 1
ATUF_SUBBLOCK17_t_timerF_subblock_TIERF_BIT_OVEBF DEFINE 2
ATUF_SUBBLOCK17_t_timerF_subblock_TIERF_BIT_OVECF DEFINE 3
ATUF_SUBBLOCK17_t_timerF_subblock_wk1 DEFINE 0xFFFFFC82
ATUF_SUBBLOCK17_t_timerF_subblock_TSRF_BYTE DEFINE 0xFFFFFC83
ATUF_SUBBLOCK17_t_timerF_subblock_TSRF_BIT_ICFF DEFINE 0
ATUF_SUBBLOCK17_t_timerF_subblock_TSRF_BIT_OVFAF DEFINE 1
ATUF_SUBBLOCK17_t_timerF_subblock_TSRF_BIT_OVFBF DEFINE 2
ATUF_SUBBLOCK17_t_timerF_subblock_TSRF_BIT_OVFCF DEFINE 3
ATUF_SUBBLOCK17_t_timerF_subblock_ECNTAF DEFINE 0xFFFFFC84
ATUF_SUBBLOCK17_t_timerF_subblock_ECNTBF DEFINE 0xFFFFFC88
ATUF_SUBBLOCK17_t_timerF_subblock_GRBF DEFINE 0xFFFFFC8A
ATUF_SUBBLOCK17_t_timerF_subblock_ECNTCF DEFINE 0xFFFFFC8C
ATUF_SUBBLOCK17_t_timerF_subblock_GRAF DEFINE 0xFFFFFC90
ATUF_SUBBLOCK17_t_timerF_subblock_CDRF DEFINE 0xFFFFFC94
ATUF_SUBBLOCK17_t_timerF_subblock_GRCF DEFINE 0xFFFFFC98
ATUF_SUBBLOCK17_t_timerF_subblock_GRDF DEFINE 0xFFFFFC9C
ATUF_SUBBLOCK18_t_timerF_subblock_TCRF_BYTE DEFINE 0xFFFFFCA0
ATUF_SUBBLOCK18_t_timerF_subblock_TCRF_BIT_EGSELF DEFINE 0
ATUF_SUBBLOCK18_t_timerF_subblock_TCRF_BIT_MDF DEFINE 2
ATUF_SUBBLOCK18_t_timerF_subblock_TCRF_BIT_CKSELF DEFINE 5
ATUF_SUBBLOCK18_t_timerF_subblock_TIERF_BYTE DEFINE 0xFFFFFCA1
ATUF_SUBBLOCK18_t_timerF_subblock_TIERF_BIT_ICEF DEFINE 0
ATUF_SUBBLOCK18_t_timerF_subblock_TIERF_BIT_OVEAF DEFINE 1
ATUF_SUBBLOCK18_t_timerF_subblock_TIERF_BIT_OVEBF DEFINE 2
ATUF_SUBBLOCK18_t_timerF_subblock_TIERF_BIT_OVECF DEFINE 3
ATUF_SUBBLOCK18_t_timerF_subblock_wk1 DEFINE 0xFFFFFCA2
ATUF_SUBBLOCK18_t_timerF_subblock_TSRF_BYTE DEFINE 0xFFFFFCA3
ATUF_SUBBLOCK18_t_timerF_subblock_TSRF_BIT_ICFF DEFINE 0
ATUF_SUBBLOCK18_t_timerF_subblock_TSRF_BIT_OVFAF DEFINE 1
ATUF_SUBBLOCK18_t_timerF_subblock_TSRF_BIT_OVFBF DEFINE 2
ATUF_SUBBLOCK18_t_timerF_subblock_TSRF_BIT_OVFCF DEFINE 3
ATUF_SUBBLOCK18_t_timerF_subblock_ECNTAF DEFINE 0xFFFFFCA4
ATUF_SUBBLOCK18_t_timerF_subblock_ECNTBF DEFINE 0xFFFFFCA8
ATUF_SUBBLOCK18_t_timerF_subblock_GRBF DEFINE 0xFFFFFCAA
ATUF_SUBBLOCK18_t_timerF_subblock_ECNTCF DEFINE 0xFFFFFCAC
ATUF_SUBBLOCK18_t_timerF_subblock_GRAF DEFINE 0xFFFFFCB0
ATUF_SUBBLOCK18_t_timerF_subblock_CDRF DEFINE 0xFFFFFCB4
ATUF_SUBBLOCK18_t_timerF_subblock_GRCF DEFINE 0xFFFFFCB8
ATUF_SUBBLOCK18_t_timerF_subblock_GRDF DEFINE 0xFFFFFCBC
ATUF_SUBBLOCK19_t_timerF_subblock_TCRF_BYTE DEFINE 0xFFFFFCC0
ATUF_SUBBLOCK19_t_timerF_subblock_TCRF_BIT_EGSELF DEFINE 0
ATUF_SUBBLOCK19_t_timerF_subblock_TCRF_BIT_MDF DEFINE 2
ATUF_SUBBLOCK19_t_timerF_subblock_TCRF_BIT_CKSELF DEFINE 5
ATUF_SUBBLOCK19_t_timerF_subblock_TIERF_BYTE DEFINE 0xFFFFFCC1
ATUF_SUBBLOCK19_t_timerF_subblock_TIERF_BIT_ICEF DEFINE 0
ATUF_SUBBLOCK19_t_timerF_subblock_TIERF_BIT_OVEAF DEFINE 1
ATUF_SUBBLOCK19_t_timerF_subblock_TIERF_BIT_OVEBF DEFINE 2
ATUF_SUBBLOCK19_t_timerF_subblock_TIERF_BIT_OVECF DEFINE 3
ATUF_SUBBLOCK19_t_timerF_subblock_wk1 DEFINE 0xFFFFFCC2
ATUF_SUBBLOCK19_t_timerF_subblock_TSRF_BYTE DEFINE 0xFFFFFCC3
ATUF_SUBBLOCK19_t_timerF_subblock_TSRF_BIT_ICFF DEFINE 0
ATUF_SUBBLOCK19_t_timerF_subblock_TSRF_BIT_OVFAF DEFINE 1
ATUF_SUBBLOCK19_t_timerF_subblock_TSRF_BIT_OVFBF DEFINE 2
ATUF_SUBBLOCK19_t_timerF_subblock_TSRF_BIT_OVFCF DEFINE 3
ATUF_SUBBLOCK19_t_timerF_subblock_ECNTAF DEFINE 0xFFFFFCC4
ATUF_SUBBLOCK19_t_timerF_subblock_ECNTBF DEFINE 0xFFFFFCC8
ATUF_SUBBLOCK19_t_timerF_subblock_GRBF DEFINE 0xFFFFFCCA
ATUF_SUBBLOCK19_t_timerF_subblock_ECNTCF DEFINE 0xFFFFFCCC
ATUF_SUBBLOCK19_t_timerF_subblock_GRAF DEFINE 0xFFFFFCD0
ATUF_SUBBLOCK19_t_timerF_subblock_CDRF DEFINE 0xFFFFFCD4
ATUF_SUBBLOCK19_t_timerF_subblock_GRCF DEFINE 0xFFFFFCD8
ATUF_SUBBLOCK19_t_timerF_subblock_GRDF DEFINE 0xFFFFFCDC
ATUF_SUBBLOCK20_t_timerF_subblock_TCRF_BYTE DEFINE 0xFFFFFCE0
ATUF_SUBBLOCK20_t_timerF_subblock_TCRF_BIT_EGSELF DEFINE 0
ATUF_SUBBLOCK20_t_timerF_subblock_TCRF_BIT_MDF DEFINE 2
ATUF_SUBBLOCK20_t_timerF_subblock_TCRF_BIT_CKSELF DEFINE 5
ATUF_SUBBLOCK20_t_timerF_subblock_TIERF_BYTE DEFINE 0xFFFFFCE1
ATUF_SUBBLOCK20_t_timerF_subblock_TIERF_BIT_ICEF DEFINE 0
ATUF_SUBBLOCK20_t_timerF_subblock_TIERF_BIT_OVEAF DEFINE 1
ATUF_SUBBLOCK20_t_timerF_subblock_TIERF_BIT_OVEBF DEFINE 2
ATUF_SUBBLOCK20_t_timerF_subblock_TIERF_BIT_OVECF DEFINE 3
ATUF_SUBBLOCK20_t_timerF_subblock_wk1 DEFINE 0xFFFFFCE2
ATUF_SUBBLOCK20_t_timerF_subblock_TSRF_BYTE DEFINE 0xFFFFFCE3
ATUF_SUBBLOCK20_t_timerF_subblock_TSRF_BIT_ICFF DEFINE 0
ATUF_SUBBLOCK20_t_timerF_subblock_TSRF_BIT_OVFAF DEFINE 1
ATUF_SUBBLOCK20_t_timerF_subblock_TSRF_BIT_OVFBF DEFINE 2
ATUF_SUBBLOCK20_t_timerF_subblock_TSRF_BIT_OVFCF DEFINE 3
ATUF_SUBBLOCK20_t_timerF_subblock_ECNTAF DEFINE 0xFFFFFCE4
ATUF_SUBBLOCK20_t_timerF_subblock_ECNTBF DEFINE 0xFFFFFCE8
ATUF_SUBBLOCK20_t_timerF_subblock_GRBF DEFINE 0xFFFFFCEA
ATUF_SUBBLOCK20_t_timerF_subblock_ECNTCF DEFINE 0xFFFFFCEC
ATUF_SUBBLOCK20_t_timerF_subblock_GRAF DEFINE 0xFFFFFCF0
ATUF_SUBBLOCK20_t_timerF_subblock_CDRF DEFINE 0xFFFFFCF4
ATUF_SUBBLOCK20_t_timerF_subblock_GRCF DEFINE 0xFFFFFCF8
ATUF_SUBBLOCK20_t_timerF_subblock_GRDF DEFINE 0xFFFFFCFC

/* ATU Timer G module                           */
ATUG_wk DEFINE 0xFFFFFE00
ATUG_TSTRG_BYTE DEFINE 0xFFFFFE01
ATUG_TSTRG_BIT_STRG0 DEFINE 0
ATUG_TSTRG_BIT_STRG1 DEFINE 1
ATUG_TSTRG_BIT_STRG2 DEFINE 2
ATUG_TSTRG_BIT_STRG3 DEFINE 3
ATUG_TSTRG_BIT_STRG4 DEFINE 4
ATUG_TSTRG_BIT_STRG5 DEFINE 5
ATUG_wk1 DEFINE 0xFFFFFE02
ATUG_SUBBLOCK1_t_timerG_subblock_TCRG_BYTE DEFINE 0xFFFFFE80
ATUG_SUBBLOCK1_t_timerG_subblock_TCRG_BIT_CMEG DEFINE 0
ATUG_SUBBLOCK1_t_timerG_subblock_TCRG_BIT_CMPOEG DEFINE 1
ATUG_SUBBLOCK1_t_timerG_subblock_TCRG_BIT_CKSELG DEFINE 4
ATUG_SUBBLOCK1_t_timerG_subblock_TSRG_BYTE DEFINE 0xFFFFFE81
ATUG_SUBBLOCK1_t_timerG_subblock_TSRG_BIT_CMFG DEFINE 0
ATUG_SUBBLOCK1_t_timerG_subblock_TSRG_BIT_OVFG DEFINE 1
ATUG_SUBBLOCK1_t_timerG_subblock_wk1 DEFINE 0xFFFFFE82
ATUG_SUBBLOCK1_t_timerG_subblock_TCNTG DEFINE 0xFFFFFE84
ATUG_SUBBLOCK1_t_timerG_subblock_OCRG DEFINE 0xFFFFFE86
ATUG_SUBBLOCK1_t_timerG_subblock_wk2 DEFINE 0xFFFFFE88
ATUG_SUBBLOCK2_t_timerG_subblock_TCRG_BYTE DEFINE 0xFFFFFE90
ATUG_SUBBLOCK2_t_timerG_subblock_TCRG_BIT_CMEG DEFINE 0
ATUG_SUBBLOCK2_t_timerG_subblock_TCRG_BIT_CMPOEG DEFINE 1
ATUG_SUBBLOCK2_t_timerG_subblock_TCRG_BIT_CKSELG DEFINE 4
ATUG_SUBBLOCK2_t_timerG_subblock_TSRG_BYTE DEFINE 0xFFFFFE91
ATUG_SUBBLOCK2_t_timerG_subblock_TSRG_BIT_CMFG DEFINE 0
ATUG_SUBBLOCK2_t_timerG_subblock_TSRG_BIT_OVFG DEFINE 1
ATUG_SUBBLOCK2_t_timerG_subblock_wk1 DEFINE 0xFFFFFE92
ATUG_SUBBLOCK2_t_timerG_subblock_TCNTG DEFINE 0xFFFFFE94
ATUG_SUBBLOCK2_t_timerG_subblock_OCRG DEFINE 0xFFFFFE96
ATUG_SUBBLOCK2_t_timerG_subblock_wk2 DEFINE 0xFFFFFE98
ATUG_SUBBLOCK3_t_timerG_subblock_TCRG_BYTE DEFINE 0xFFFFFEA0
ATUG_SUBBLOCK3_t_timerG_subblock_TCRG_BIT_CMEG DEFINE 0
ATUG_SUBBLOCK3_t_timerG_subblock_TCRG_BIT_CMPOEG DEFINE 1
ATUG_SUBBLOCK3_t_timerG_subblock_TCRG_BIT_CKSELG DEFINE 4
ATUG_SUBBLOCK3_t_timerG_subblock_TSRG_BYTE DEFINE 0xFFFFFEA1
ATUG_SUBBLOCK3_t_timerG_subblock_TSRG_BIT_CMFG DEFINE 0
ATUG_SUBBLOCK3_t_timerG_subblock_TSRG_BIT_OVFG DEFINE 1
ATUG_SUBBLOCK3_t_timerG_subblock_wk1 DEFINE 0xFFFFFEA2
ATUG_SUBBLOCK3_t_timerG_subblock_TCNTG DEFINE 0xFFFFFEA4
ATUG_SUBBLOCK3_t_timerG_subblock_OCRG DEFINE 0xFFFFFEA6
ATUG_SUBBLOCK3_t_timerG_subblock_wk2 DEFINE 0xFFFFFEA8
ATUG_SUBBLOCK4_t_timerG_subblock_TCRG_BYTE DEFINE 0xFFFFFEB0
ATUG_SUBBLOCK4_t_timerG_subblock_TCRG_BIT_CMEG DEFINE 0
ATUG_SUBBLOCK4_t_timerG_subblock_TCRG_BIT_CMPOEG DEFINE 1
ATUG_SUBBLOCK4_t_timerG_subblock_TCRG_BIT_CKSELG DEFINE 4
ATUG_SUBBLOCK4_t_timerG_subblock_TSRG_BYTE DEFINE 0xFFFFFEB1
ATUG_SUBBLOCK4_t_timerG_subblock_TSRG_BIT_CMFG DEFINE 0
ATUG_SUBBLOCK4_t_timerG_subblock_TSRG_BIT_OVFG DEFINE 1
ATUG_SUBBLOCK4_t_timerG_subblock_wk1 DEFINE 0xFFFFFEB2
ATUG_SUBBLOCK4_t_timerG_subblock_TCNTG DEFINE 0xFFFFFEB4
ATUG_SUBBLOCK4_t_timerG_subblock_OCRG DEFINE 0xFFFFFEB6
ATUG_SUBBLOCK4_t_timerG_subblock_wk2 DEFINE 0xFFFFFEB8
ATUG_SUBBLOCK5_t_timerG_subblock_TCRG_BYTE DEFINE 0xFFFFFEC0
ATUG_SUBBLOCK5_t_timerG_subblock_TCRG_BIT_CMEG DEFINE 0
ATUG_SUBBLOCK5_t_timerG_subblock_TCRG_BIT_CMPOEG DEFINE 1
ATUG_SUBBLOCK5_t_timerG_subblock_TCRG_BIT_CKSELG DEFINE 4
ATUG_SUBBLOCK5_t_timerG_subblock_TSRG_BYTE DEFINE 0xFFFFFEC1
ATUG_SUBBLOCK5_t_timerG_subblock_TSRG_BIT_CMFG DEFINE 0
ATUG_SUBBLOCK5_t_timerG_subblock_TSRG_BIT_OVFG DEFINE 1
ATUG_SUBBLOCK5_t_timerG_subblock_wk1 DEFINE 0xFFFFFEC2
ATUG_SUBBLOCK5_t_timerG_subblock_TCNTG DEFINE 0xFFFFFEC4
ATUG_SUBBLOCK5_t_timerG_subblock_OCRG DEFINE 0xFFFFFEC6
ATUG_SUBBLOCK5_t_timerG_subblock_wk2 DEFINE 0xFFFFFEC8
ATUG_SUBBLOCK6_t_timerG_subblock_TCRG_BYTE DEFINE 0xFFFFFED0
ATUG_SUBBLOCK6_t_timerG_subblock_TCRG_BIT_CMEG DEFINE 0
ATUG_SUBBLOCK6_t_timerG_subblock_TCRG_BIT_CMPOEG DEFINE 1
ATUG_SUBBLOCK6_t_timerG_subblock_TCRG_BIT_CKSELG DEFINE 4
ATUG_SUBBLOCK6_t_timerG_subblock_TSRG_BYTE DEFINE 0xFFFFFED1
ATUG_SUBBLOCK6_t_timerG_subblock_TSRG_BIT_CMFG DEFINE 0
ATUG_SUBBLOCK6_t_timerG_subblock_TSRG_BIT_OVFG DEFINE 1
ATUG_SUBBLOCK6_t_timerG_subblock_wk1 DEFINE 0xFFFFFED2
ATUG_SUBBLOCK6_t_timerG_subblock_TCNTG DEFINE 0xFFFFFED4
ATUG_SUBBLOCK6_t_timerG_subblock_OCRG DEFINE 0xFFFFFED6
ATUG_SUBBLOCK6_t_timerG_subblock_wk2 DEFINE 0xFFFFFED8

/* ATU Timer H module                           */
ATUH_wk DEFINE 0xFFFFFF00
ATUH_TCRH_BYTE DEFINE 0xFFFFFF40
ATUH_TCRH_BIT_CMEH DEFINE 0
ATUH_TCRH_BIT_CKSELH DEFINE 4
ATUH_TSRH_BYTE DEFINE 0xFFFFFF41
ATUH_TSRH_BIT_CMFH DEFINE 0
ATUH_TSRH_BIT_OVF1H DEFINE 1
ATUH_TSRH_BIT_OVF2H DEFINE 2
ATUH_wk1 DEFINE 0xFFFFFF42
ATUH_TCNT1H DEFINE 0xFFFFFF44
ATUH_OCR1H DEFINE 0xFFFFFF46
ATUH_TCNT2H DEFINE 0xFFFFFF48

/* ATU Timer J module                           */
ATUJ_TSTRJ_BYTE DEFINE 0xFFFFFF80
ATUJ_TSTRJ_BIT_STRJ0 DEFINE 0
ATUJ_TSTRJ_BIT_STRJ1 DEFINE 1
ATUJ_wk1 DEFINE 0xFFFFFF81
ATUJ_SUBBLOCK1_t_timerJ_subblock_TCRJ_BYTE DEFINE 0xFFFFFF90
ATUJ_SUBBLOCK1_t_timerJ_subblock_TCRJ_BIT_IOJ DEFINE 0
ATUJ_SUBBLOCK1_t_timerJ_subblock_TCRJ_BIT_NCEJ DEFINE 2
ATUJ_SUBBLOCK1_t_timerJ_subblock_TCRJ_BIT_CKSELJ DEFINE 4
ATUJ_SUBBLOCK1_t_timerJ_subblock_FCRJ_BYTE DEFINE 0xFFFFFF91
ATUJ_SUBBLOCK1_t_timerJ_subblock_FCRJ_BIT_FDFTRGJ DEFINE 0
ATUJ_SUBBLOCK1_t_timerJ_subblock_FCRJ_BIT_FRSTJ DEFINE 4
ATUJ_SUBBLOCK1_t_timerJ_subblock_FCRJ_BIT_FVCRENJ DEFINE 5
ATUJ_SUBBLOCK1_t_timerJ_subblock_FCRJ_BIT_FIFOENJ DEFINE 7
ATUJ_SUBBLOCK1_t_timerJ_subblock_TSRJ_BYTE DEFINE 0xFFFFFF92
ATUJ_SUBBLOCK1_t_timerJ_subblock_TSRJ_BIT_FDFFJ DEFINE 0
ATUJ_SUBBLOCK1_t_timerJ_subblock_TSRJ_BIT_FDOVFJ DEFINE 1
ATUJ_SUBBLOCK1_t_timerJ_subblock_TSRJ_BIT_OVFJ DEFINE 2
ATUJ_SUBBLOCK1_t_timerJ_subblock_TSRJ_BIT_CMFJ DEFINE 3
ATUJ_SUBBLOCK1_t_timerJ_subblock_TSRJ_BIT_FVLDFJ DEFINE 4
ATUJ_SUBBLOCK1_t_timerJ_subblock_wk1 DEFINE 0xFFFFFF93
ATUJ_SUBBLOCK1_t_timerJ_subblock_TIERJ_BYTE DEFINE 0xFFFFFF94
ATUJ_SUBBLOCK1_t_timerJ_subblock_TIERJ_BIT_FDFEJ DEFINE 0
ATUJ_SUBBLOCK1_t_timerJ_subblock_TIERJ_BIT_FDOVEJ DEFINE 1
ATUJ_SUBBLOCK1_t_timerJ_subblock_TIERJ_BIT_OVEJ DEFINE 2
ATUJ_SUBBLOCK1_t_timerJ_subblock_FDNRJ_BYTE DEFINE 0xFFFFFF95
ATUJ_SUBBLOCK1_t_timerJ_subblock_FDNRJ_BIT_FDNJ DEFINE 0
ATUJ_SUBBLOCK1_t_timerJ_subblock_NCNTJ DEFINE 0xFFFFFF96
ATUJ_SUBBLOCK1_t_timerJ_subblock_NCRJ DEFINE 0xFFFFFF97
ATUJ_SUBBLOCK1_t_timerJ_subblock_TCNTJ DEFINE 0xFFFFFF98
ATUJ_SUBBLOCK1_t_timerJ_subblock_OCRJ DEFINE 0xFFFFFF9A
ATUJ_SUBBLOCK1_t_timerJ_subblock_FIFOJ DEFINE 0xFFFFFF9C
ATUJ_SUBBLOCK1_t_timerJ_subblock_wk2 DEFINE 0xFFFFFF9E
ATUJ_SUBBLOCK2_t_timerJ_subblock_TCRJ_BYTE DEFINE 0xFFFFFFA0
ATUJ_SUBBLOCK2_t_timerJ_subblock_TCRJ_BIT_IOJ DEFINE 0
ATUJ_SUBBLOCK2_t_timerJ_subblock_TCRJ_BIT_NCEJ DEFINE 2
ATUJ_SUBBLOCK2_t_timerJ_subblock_TCRJ_BIT_CKSELJ DEFINE 4
ATUJ_SUBBLOCK2_t_timerJ_subblock_FCRJ_BYTE DEFINE 0xFFFFFFA1
ATUJ_SUBBLOCK2_t_timerJ_subblock_FCRJ_BIT_FDFTRGJ DEFINE 0
ATUJ_SUBBLOCK2_t_timerJ_subblock_FCRJ_BIT_FRSTJ DEFINE 4
ATUJ_SUBBLOCK2_t_timerJ_subblock_FCRJ_BIT_FVCRENJ DEFINE 5
ATUJ_SUBBLOCK2_t_timerJ_subblock_FCRJ_BIT_FIFOENJ DEFINE 7
ATUJ_SUBBLOCK2_t_timerJ_subblock_TSRJ_BYTE DEFINE 0xFFFFFFA2
ATUJ_SUBBLOCK2_t_timerJ_subblock_TSRJ_BIT_FDFFJ DEFINE 0
ATUJ_SUBBLOCK2_t_timerJ_subblock_TSRJ_BIT_FDOVFJ DEFINE 1
ATUJ_SUBBLOCK2_t_timerJ_subblock_TSRJ_BIT_OVFJ DEFINE 2
ATUJ_SUBBLOCK2_t_timerJ_subblock_TSRJ_BIT_CMFJ DEFINE 3
ATUJ_SUBBLOCK2_t_timerJ_subblock_TSRJ_BIT_FVLDFJ DEFINE 4
ATUJ_SUBBLOCK2_t_timerJ_subblock_wk1 DEFINE 0xFFFFFFA3
ATUJ_SUBBLOCK2_t_timerJ_subblock_TIERJ_BYTE DEFINE 0xFFFFFFA4
ATUJ_SUBBLOCK2_t_timerJ_subblock_TIERJ_BIT_FDFEJ DEFINE 0
ATUJ_SUBBLOCK2_t_timerJ_subblock_TIERJ_BIT_FDOVEJ DEFINE 1
ATUJ_SUBBLOCK2_t_timerJ_subblock_TIERJ_BIT_OVEJ DEFINE 2
ATUJ_SUBBLOCK2_t_timerJ_subblock_FDNRJ_BYTE DEFINE 0xFFFFFFA5
ATUJ_SUBBLOCK2_t_timerJ_subblock_FDNRJ_BIT_FDNJ DEFINE 0
ATUJ_SUBBLOCK2_t_timerJ_subblock_NCNTJ DEFINE 0xFFFFFFA6
ATUJ_SUBBLOCK2_t_timerJ_subblock_NCRJ DEFINE 0xFFFFFFA7
ATUJ_SUBBLOCK2_t_timerJ_subblock_TCNTJ DEFINE 0xFFFFFFA8
ATUJ_SUBBLOCK2_t_timerJ_subblock_OCRJ DEFINE 0xFFFFFFAA
ATUJ_SUBBLOCK2_t_timerJ_subblock_FIFOJ DEFINE 0xFFFFFFAC
ATUJ_SUBBLOCK2_t_timerJ_subblock_wk2 DEFINE 0xFFFFFFAE

/* Watchdog Timer                               */
WDT_WTCR_WORD DEFINE 0xFFFE0000
WDT_WTCR_BIT_TCRKEY DEFINE 0
WDT_WTCR_BIT_CKS DEFINE 0
WDT_WTCR_BIT_TME DEFINE 5
WDT_WTCR_BIT_WTIT DEFINE 6
WDT_WTCNT_WORD DEFINE 0xFFFE0002
WDT_WTCNT_BIT_TCNTKEY DEFINE 0
WDT_WTCNT_BIT_TCNT DEFINE 0
WDT_WTSR_WORD DEFINE 0xFFFE0004
WDT_WTSR_BIT_TSRKEY DEFINE 0
WDT_WTSR_BIT_IOVF DEFINE 3
WDT_WTSR_BIT_WOVF DEFINE 7
WDT_WRCR_WORD DEFINE 0xFFFE0006
WDT_WRCR_BIT_RCRKEY DEFINE 0
WDT_WRCR_BIT_RSTE DEFINE 7

/* Compare Match Timer                          */
CMT_CMSTR_WORD DEFINE 0xFFFEC000
CMT_CMSTR_BIT_STR0 DEFINE 0
CMT_CMSTR_BIT_STR1 DEFINE 1
CMT_wk1 DEFINE 0xFFFEC002
CMT_Channel1_t_CMT_Channel_CMCR_BYTE DEFINE 0xFFFEC010
CMT_Channel1_t_CMT_Channel_CMCR_BIT_CKS DEFINE 0
CMT_Channel1_t_CMT_Channel_CMCR_BIT_CMIE DEFINE 6
CMT_Channel1_t_CMT_Channel_CMSR_BYTE DEFINE 0xFFFEC011
CMT_Channel1_t_CMT_Channel_CMSR_BIT_CMF DEFINE 0
CMT_Channel1_t_CMT_Channel_CMCNT DEFINE 0xFFFEC012
CMT_Channel1_t_CMT_Channel_CMCOR DEFINE 0xFFFEC014
CMT_Channel1_t_CMT_Channel_wk DEFINE 0xFFFEC016
CMT_Channel2_t_CMT_Channel_CMCR_BYTE DEFINE 0xFFFEC020
CMT_Channel2_t_CMT_Channel_CMCR_BIT_CKS DEFINE 0
CMT_Channel2_t_CMT_Channel_CMCR_BIT_CMIE DEFINE 6
CMT_Channel2_t_CMT_Channel_CMSR_BYTE DEFINE 0xFFFEC021
CMT_Channel2_t_CMT_Channel_CMSR_BIT_CMF DEFINE 0
CMT_Channel2_t_CMT_Channel_CMCNT DEFINE 0xFFFEC022
CMT_Channel2_t_CMT_Channel_CMCOR DEFINE 0xFFFEC024
CMT_Channel2_t_CMT_Channel_wk DEFINE 0xFFFEC026

/* Serial Communication Interface Module A      */
SCIA_SCSMR1_BYTE DEFINE 0xFFFF8000
SCIA_SCSMR1_BIT_CKS DEFINE 0
SCIA_SCSMR1_BIT_STOP DEFINE 3
SCIA_SCSMR1_BIT_OE DEFINE 4
SCIA_SCSMR1_BIT_PE DEFINE 5
SCIA_SCSMR1_BIT_CHR DEFINE 6
SCIA_SCSMR1_BIT_CA DEFINE 7
SCIA_wk1 DEFINE 0xFFFF8001
SCIA_SCBRR1 DEFINE 0xFFFF8004
SCIA_wk2 DEFINE 0xFFFF8005
SCIA_SCSCR1_BYTE DEFINE 0xFFFF8008
SCIA_SCSCR1_BIT_CKE1 DEFINE 1
SCIA_SCSCR1_BIT_TEIE DEFINE 2
SCIA_SCSCR1_BIT_RE DEFINE 4
SCIA_SCSCR1_BIT_TE DEFINE 5
SCIA_SCSCR1_BIT_RIE DEFINE 6
SCIA_SCSCR1_BIT_TIE DEFINE 7
SCIA_wk3 DEFINE 0xFFFF8009
SCIA_SCTDR1 DEFINE 0xFFFF800C
SCIA_wk4 DEFINE 0xFFFF800D
SCIA_SCSSR1_BYTE DEFINE 0xFFFF8010
SCIA_SCSSR1_BIT_TEND DEFINE 2
SCIA_SCSSR1_BIT_PER DEFINE 3
SCIA_SCSSR1_BIT_FER DEFINE 4
SCIA_SCSSR1_BIT_ORER DEFINE 5
SCIA_SCSSR1_BIT_RDRF DEFINE 6
SCIA_SCSSR1_BIT_TDRE DEFINE 7
SCIA_wk5 DEFINE 0xFFFF8011
SCIA_SCRDR1 DEFINE 0xFFFF8014

/* Serial Communication Interface Module B      */
SCIB_SCSMR1_BYTE DEFINE 0xFFFF8800
SCIB_SCSMR1_BIT_CKS DEFINE 0
SCIB_SCSMR1_BIT_STOP DEFINE 3
SCIB_SCSMR1_BIT_OE DEFINE 4
SCIB_SCSMR1_BIT_PE DEFINE 5
SCIB_SCSMR1_BIT_CHR DEFINE 6
SCIB_SCSMR1_BIT_CA DEFINE 7
SCIB_wk1 DEFINE 0xFFFF8801
SCIB_SCBRR1 DEFINE 0xFFFF8804
SCIB_wk2 DEFINE 0xFFFF8805
SCIB_SCSCR1_BYTE DEFINE 0xFFFF8808
SCIB_SCSCR1_BIT_CKE1 DEFINE 1
SCIB_SCSCR1_BIT_TEIE DEFINE 2
SCIB_SCSCR1_BIT_RE DEFINE 4
SCIB_SCSCR1_BIT_TE DEFINE 5
SCIB_SCSCR1_BIT_RIE DEFINE 6
SCIB_SCSCR1_BIT_TIE DEFINE 7
SCIB_wk3 DEFINE 0xFFFF8809
SCIB_SCTDR1 DEFINE 0xFFFF880C
SCIB_wk4 DEFINE 0xFFFF880D
SCIB_SCSSR1_BYTE DEFINE 0xFFFF8810
SCIB_SCSSR1_BIT_TEND DEFINE 2
SCIB_SCSSR1_BIT_PER DEFINE 3
SCIB_SCSSR1_BIT_FER DEFINE 4
SCIB_SCSSR1_BIT_ORER DEFINE 5
SCIB_SCSSR1_BIT_RDRF DEFINE 6
SCIB_SCSSR1_BIT_TDRE DEFINE 7
SCIB_wk5 DEFINE 0xFFFF8811
SCIB_SCRDR1 DEFINE 0xFFFF8814

/* Serial Communication Interface Module C      */
SCIC_SCSMR1_BYTE DEFINE 0xFFFF9000
SCIC_SCSMR1_BIT_CKS DEFINE 0
SCIC_SCSMR1_BIT_STOP DEFINE 3
SCIC_SCSMR1_BIT_OE DEFINE 4
SCIC_SCSMR1_BIT_PE DEFINE 5
SCIC_SCSMR1_BIT_CHR DEFINE 6
SCIC_SCSMR1_BIT_CA DEFINE 7
SCIC_wk1 DEFINE 0xFFFF9001
SCIC_SCBRR1 DEFINE 0xFFFF9004
SCIC_wk2 DEFINE 0xFFFF9005
SCIC_SCSCR1_BYTE DEFINE 0xFFFF9008
SCIC_SCSCR1_BIT_CKE1 DEFINE 1
SCIC_SCSCR1_BIT_TEIE DEFINE 2
SCIC_SCSCR1_BIT_RE DEFINE 4
SCIC_SCSCR1_BIT_TE DEFINE 5
SCIC_SCSCR1_BIT_RIE DEFINE 6
SCIC_SCSCR1_BIT_TIE DEFINE 7
SCIC_wk3 DEFINE 0xFFFF9009
SCIC_SCTDR1 DEFINE 0xFFFF900C
SCIC_wk4 DEFINE 0xFFFF900D
SCIC_SCSSR1_BYTE DEFINE 0xFFFF9010
SCIC_SCSSR1_BIT_TEND DEFINE 2
SCIC_SCSSR1_BIT_PER DEFINE 3
SCIC_SCSSR1_BIT_FER DEFINE 4
SCIC_SCSSR1_BIT_ORER DEFINE 5
SCIC_SCSSR1_BIT_RDRF DEFINE 6
SCIC_SCSSR1_BIT_TDRE DEFINE 7
SCIC_wk5 DEFINE 0xFFFF9011
SCIC_SCRDR1 DEFINE 0xFFFF9014

/* Serial Communication Interface Module D      */
SCID_SCSMR1_BYTE DEFINE 0xFFFF9800
SCID_SCSMR1_BIT_CKS DEFINE 0
SCID_SCSMR1_BIT_STOP DEFINE 3
SCID_SCSMR1_BIT_OE DEFINE 4
SCID_SCSMR1_BIT_PE DEFINE 5
SCID_SCSMR1_BIT_CHR DEFINE 6
SCID_SCSMR1_BIT_CA DEFINE 7
SCID_wk1 DEFINE 0xFFFF9801
SCID_SCBRR1 DEFINE 0xFFFF9804
SCID_wk2 DEFINE 0xFFFF9805
SCID_SCSCR1_BYTE DEFINE 0xFFFF9808
SCID_SCSCR1_BIT_CKE1 DEFINE 1
SCID_SCSCR1_BIT_TEIE DEFINE 2
SCID_SCSCR1_BIT_RE DEFINE 4
SCID_SCSCR1_BIT_TE DEFINE 5
SCID_SCSCR1_BIT_RIE DEFINE 6
SCID_SCSCR1_BIT_TIE DEFINE 7
SCID_wk3 DEFINE 0xFFFF9809
SCID_SCTDR1 DEFINE 0xFFFF980C
SCID_wk4 DEFINE 0xFFFF980D
SCID_SCSSR1_BYTE DEFINE 0xFFFF9810
SCID_SCSSR1_BIT_TEND DEFINE 2
SCID_SCSSR1_BIT_PER DEFINE 3
SCID_SCSSR1_BIT_FER DEFINE 4
SCID_SCSSR1_BIT_ORER DEFINE 5
SCID_SCSSR1_BIT_RDRF DEFINE 6
SCID_SCSSR1_BIT_TDRE DEFINE 7
SCID_wk5 DEFINE 0xFFFF9811
SCID_SCRDR1 DEFINE 0xFFFF9814

/* Serial Communication Interface Module E      */
SCIE_SCSMR1_BYTE DEFINE 0xFFFFA000
SCIE_SCSMR1_BIT_CKS DEFINE 0
SCIE_SCSMR1_BIT_STOP DEFINE 3
SCIE_SCSMR1_BIT_OE DEFINE 4
SCIE_SCSMR1_BIT_PE DEFINE 5
SCIE_SCSMR1_BIT_CHR DEFINE 6
SCIE_SCSMR1_BIT_CA DEFINE 7
SCIE_wk1 DEFINE 0xFFFFA001
SCIE_SCBRR1 DEFINE 0xFFFFA004
SCIE_wk2 DEFINE 0xFFFFA005
SCIE_SCSCR1_BYTE DEFINE 0xFFFFA008
SCIE_SCSCR1_BIT_CKE1 DEFINE 1
SCIE_SCSCR1_BIT_TEIE DEFINE 2
SCIE_SCSCR1_BIT_RE DEFINE 4
SCIE_SCSCR1_BIT_TE DEFINE 5
SCIE_SCSCR1_BIT_RIE DEFINE 6
SCIE_SCSCR1_BIT_TIE DEFINE 7
SCIE_wk3 DEFINE 0xFFFFA009
SCIE_SCTDR1 DEFINE 0xFFFFA00C
SCIE_wk4 DEFINE 0xFFFFA00D
SCIE_SCSSR1_BYTE DEFINE 0xFFFFA010
SCIE_SCSSR1_BIT_TEND DEFINE 2
SCIE_SCSSR1_BIT_PER DEFINE 3
SCIE_SCSSR1_BIT_FER DEFINE 4
SCIE_SCSSR1_BIT_ORER DEFINE 5
SCIE_SCSSR1_BIT_RDRF DEFINE 6
SCIE_SCSSR1_BIT_TDRE DEFINE 7
SCIE_wk5 DEFINE 0xFFFFA011
SCIE_SCRDR1 DEFINE 0xFFFFA014

/* Renesas Serial Peripheral Interface Module A */
RSPIA_SPCR_BYTE DEFINE 0xFFFFB000
RSPIA_SPCR_BIT_MODFEN DEFINE 2
RSPIA_SPCR_BIT_MSTR DEFINE 3
RSPIA_SPCR_BIT_SPEIE DEFINE 4
RSPIA_SPCR_BIT_SPTIE DEFINE 5
RSPIA_SPCR_BIT_SPE DEFINE 6
RSPIA_SPCR_BIT_SPRIE DEFINE 7
RSPIA_SSLP_BYTE DEFINE 0xFFFFB001
RSPIA_SSLP_BIT_SSL0P DEFINE 0
RSPIA_SSLP_BIT_SSL1P DEFINE 1
RSPIA_SSLP_BIT_SSL2P DEFINE 2
RSPIA_SSLP_BIT_SSL3P DEFINE 3
RSPIA_SSLP_BIT_SSL4P DEFINE 4
RSPIA_SSLP_BIT_SSL5P DEFINE 5
RSPIA_SSLP_BIT_SSL6P DEFINE 6
RSPIA_SSLP_BIT_SSL7P DEFINE 7
RSPIA_SPPCR_BYTE DEFINE 0xFFFFB002
RSPIA_SPPCR_BIT_SPLP DEFINE 0
RSPIA_SPPCR_BIT_SPOM DEFINE 2
RSPIA_SPPCR_BIT_MOIFV DEFINE 4
RSPIA_SPPCR_BIT_MOIFE DEFINE 5
RSPIA_SPSR_BYTE DEFINE 0xFFFFB003
RSPIA_SPSR_BIT_OVRF DEFINE 0
RSPIA_SPSR_BIT_MODF DEFINE 2
RSPIA_SPSR_BIT_SPTEF DEFINE 5
RSPIA_SPSR_BIT_SPRF DEFINE 7
RSPIA_SPDR DEFINE 0xFFFFB004
RSPIA_wk1 DEFINE 0xFFFFB006
RSPIA_SPSCR_BYTE DEFINE 0xFFFFB008
RSPIA_SPSCR_BIT_SPSLN DEFINE 0
RSPIA_SPSSR_BYTE DEFINE 0xFFFFB009
RSPIA_SPSSR_BIT_SPCP DEFINE 0
RSPIA_SPSSR_BIT_SPECM DEFINE 4
RSPIA_SPBR DEFINE 0xFFFFB00A
RSPIA_wk2 DEFINE 0xFFFFB00B
RSPIA_SPCKD_BYTE DEFINE 0xFFFFB00C
RSPIA_SPCKD_BIT_SCKDL DEFINE 0
RSPIA_SSLND_BYTE DEFINE 0xFFFFB00D
RSPIA_SSLND_BIT_SLNDL DEFINE 0
RSPIA_SPND_BYTE DEFINE 0xFFFFB00E
RSPIA_SPND_BIT_SPNDL DEFINE 0
RSPIA_wk3 DEFINE 0xFFFFB00F
RSPIA_SPCMD0_WORD DEFINE 0xFFFFB010
RSPIA_SPCMD0_BIT_CPHA DEFINE 0
RSPIA_SPCMD0_BIT_CPOL DEFINE 1
RSPIA_SPCMD0_BIT_BRDV DEFINE 2
RSPIA_SPCMD0_BIT_SSLA DEFINE 4
RSPIA_SPCMD0_BIT_SSLKP DEFINE 7
RSPIA_SPCMD0_BIT_SPB DEFINE 8
RSPIA_SPCMD0_BIT_LSBF DEFINE 12
RSPIA_SPCMD0_BIT_SPNDEN DEFINE 13
RSPIA_SPCMD0_BIT_SLNDEN DEFINE 14
RSPIA_SPCMD0_BIT_SCKDEN DEFINE 15
RSPIA_SPCMD1_WORD DEFINE 0xFFFFB012
RSPIA_SPCMD1_BIT_CPHA DEFINE 0
RSPIA_SPCMD1_BIT_CPOL DEFINE 1
RSPIA_SPCMD1_BIT_BRDV DEFINE 2
RSPIA_SPCMD1_BIT_SSLA DEFINE 4
RSPIA_SPCMD1_BIT_SSLKP DEFINE 7
RSPIA_SPCMD1_BIT_SPB DEFINE 8
RSPIA_SPCMD1_BIT_LSBF DEFINE 12
RSPIA_SPCMD1_BIT_SPNDEN DEFINE 13
RSPIA_SPCMD1_BIT_SLNDEN DEFINE 14
RSPIA_SPCMD1_BIT_SCKDEN DEFINE 15
RSPIA_SPCMD2_WORD DEFINE 0xFFFFB014
RSPIA_SPCMD2_BIT_CPHA DEFINE 0
RSPIA_SPCMD2_BIT_CPOL DEFINE 1
RSPIA_SPCMD2_BIT_BRDV DEFINE 2
RSPIA_SPCMD2_BIT_SSLA DEFINE 4
RSPIA_SPCMD2_BIT_SSLKP DEFINE 7
RSPIA_SPCMD2_BIT_SPB DEFINE 8
RSPIA_SPCMD2_BIT_LSBF DEFINE 12
RSPIA_SPCMD2_BIT_SPNDEN DEFINE 13
RSPIA_SPCMD2_BIT_SLNDEN DEFINE 14
RSPIA_SPCMD2_BIT_SCKDEN DEFINE 15
RSPIA_SPCMD3_WORD DEFINE 0xFFFFB016
RSPIA_SPCMD3_BIT_CPHA DEFINE 0
RSPIA_SPCMD3_BIT_CPOL DEFINE 1
RSPIA_SPCMD3_BIT_BRDV DEFINE 2
RSPIA_SPCMD3_BIT_SSLA DEFINE 4
RSPIA_SPCMD3_BIT_SSLKP DEFINE 7
RSPIA_SPCMD3_BIT_SPB DEFINE 8
RSPIA_SPCMD3_BIT_LSBF DEFINE 12
RSPIA_SPCMD3_BIT_SPNDEN DEFINE 13
RSPIA_SPCMD3_BIT_SLNDEN DEFINE 14
RSPIA_SPCMD3_BIT_SCKDEN DEFINE 15
RSPIA_SPCMD4_WORD DEFINE 0xFFFFB018
RSPIA_SPCMD4_BIT_CPHA DEFINE 0
RSPIA_SPCMD4_BIT_CPOL DEFINE 1
RSPIA_SPCMD4_BIT_BRDV DEFINE 2
RSPIA_SPCMD4_BIT_SSLA DEFINE 4
RSPIA_SPCMD4_BIT_SSLKP DEFINE 7
RSPIA_SPCMD4_BIT_SPB DEFINE 8
RSPIA_SPCMD4_BIT_LSBF DEFINE 12
RSPIA_SPCMD4_BIT_SPNDEN DEFINE 13
RSPIA_SPCMD4_BIT_SLNDEN DEFINE 14
RSPIA_SPCMD4_BIT_SCKDEN DEFINE 15
RSPIA_SPCMD5_WORD DEFINE 0xFFFFB01A
RSPIA_SPCMD5_BIT_CPHA DEFINE 0
RSPIA_SPCMD5_BIT_CPOL DEFINE 1
RSPIA_SPCMD5_BIT_BRDV DEFINE 2
RSPIA_SPCMD5_BIT_SSLA DEFINE 4
RSPIA_SPCMD5_BIT_SSLKP DEFINE 7
RSPIA_SPCMD5_BIT_SPB DEFINE 8
RSPIA_SPCMD5_BIT_LSBF DEFINE 12
RSPIA_SPCMD5_BIT_SPNDEN DEFINE 13
RSPIA_SPCMD5_BIT_SLNDEN DEFINE 14
RSPIA_SPCMD5_BIT_SCKDEN DEFINE 15
RSPIA_SPCMD6_WORD DEFINE 0xFFFFB01C
RSPIA_SPCMD6_BIT_CPHA DEFINE 0
RSPIA_SPCMD6_BIT_CPOL DEFINE 1
RSPIA_SPCMD6_BIT_BRDV DEFINE 2
RSPIA_SPCMD6_BIT_SSLA DEFINE 4
RSPIA_SPCMD6_BIT_SSLKP DEFINE 7
RSPIA_SPCMD6_BIT_SPB DEFINE 8
RSPIA_SPCMD6_BIT_LSBF DEFINE 12
RSPIA_SPCMD6_BIT_SPNDEN DEFINE 13
RSPIA_SPCMD6_BIT_SLNDEN DEFINE 14
RSPIA_SPCMD6_BIT_SCKDEN DEFINE 15
RSPIA_SPCMD7_WORD DEFINE 0xFFFFB01E
RSPIA_SPCMD7_BIT_CPHA DEFINE 0
RSPIA_SPCMD7_BIT_CPOL DEFINE 1
RSPIA_SPCMD7_BIT_BRDV DEFINE 2
RSPIA_SPCMD7_BIT_SSLA DEFINE 4
RSPIA_SPCMD7_BIT_SSLKP DEFINE 7
RSPIA_SPCMD7_BIT_SPB DEFINE 8
RSPIA_SPCMD7_BIT_LSBF DEFINE 12
RSPIA_SPCMD7_BIT_SPNDEN DEFINE 13
RSPIA_SPCMD7_BIT_SLNDEN DEFINE 14
RSPIA_SPCMD7_BIT_SCKDEN DEFINE 15

/* Renesas Serial Peripheral Interface Module B */
RSPIB_SPCR_BYTE DEFINE 0xFFFFB800
RSPIB_SPCR_BIT_MODFEN DEFINE 2
RSPIB_SPCR_BIT_MSTR DEFINE 3
RSPIB_SPCR_BIT_SPEIE DEFINE 4
RSPIB_SPCR_BIT_SPTIE DEFINE 5
RSPIB_SPCR_BIT_SPE DEFINE 6
RSPIB_SPCR_BIT_SPRIE DEFINE 7
RSPIB_SSLP_BYTE DEFINE 0xFFFFB801
RSPIB_SSLP_BIT_SSL0P DEFINE 0
RSPIB_SSLP_BIT_SSL1P DEFINE 1
RSPIB_SSLP_BIT_SSL2P DEFINE 2
RSPIB_SSLP_BIT_SSL3P DEFINE 3
RSPIB_SSLP_BIT_SSL4P DEFINE 4
RSPIB_SSLP_BIT_SSL5P DEFINE 5
RSPIB_SSLP_BIT_SSL6P DEFINE 6
RSPIB_SSLP_BIT_SSL7P DEFINE 7
RSPIB_SPPCR_BYTE DEFINE 0xFFFFB802
RSPIB_SPPCR_BIT_SPLP DEFINE 0
RSPIB_SPPCR_BIT_SPOM DEFINE 2
RSPIB_SPPCR_BIT_MOIFV DEFINE 4
RSPIB_SPPCR_BIT_MOIFE DEFINE 5
RSPIB_SPSR_BYTE DEFINE 0xFFFFB803
RSPIB_SPSR_BIT_OVRF DEFINE 0
RSPIB_SPSR_BIT_MODF DEFINE 2
RSPIB_SPSR_BIT_SPTEF DEFINE 5
RSPIB_SPSR_BIT_SPRF DEFINE 7
RSPIB_SPDR DEFINE 0xFFFFB804
RSPIB_wk1 DEFINE 0xFFFFB806
RSPIB_SPSCR_BYTE DEFINE 0xFFFFB808
RSPIB_SPSCR_BIT_SPSLN DEFINE 0
RSPIB_SPSSR_BYTE DEFINE 0xFFFFB809
RSPIB_SPSSR_BIT_SPCP DEFINE 0
RSPIB_SPSSR_BIT_SPECM DEFINE 4
RSPIB_SPBR DEFINE 0xFFFFB80A
RSPIB_wk2 DEFINE 0xFFFFB80B
RSPIB_SPCKD_BYTE DEFINE 0xFFFFB80C
RSPIB_SPCKD_BIT_SCKDL DEFINE 0
RSPIB_SSLND_BYTE DEFINE 0xFFFFB80D
RSPIB_SSLND_BIT_SLNDL DEFINE 0
RSPIB_SPND_BYTE DEFINE 0xFFFFB80E
RSPIB_SPND_BIT_SPNDL DEFINE 0
RSPIB_wk3 DEFINE 0xFFFFB80F
RSPIB_SPCMD0_WORD DEFINE 0xFFFFB810
RSPIB_SPCMD0_BIT_CPHA DEFINE 0
RSPIB_SPCMD0_BIT_CPOL DEFINE 1
RSPIB_SPCMD0_BIT_BRDV DEFINE 2
RSPIB_SPCMD0_BIT_SSLA DEFINE 4
RSPIB_SPCMD0_BIT_SSLKP DEFINE 7
RSPIB_SPCMD0_BIT_SPB DEFINE 8
RSPIB_SPCMD0_BIT_LSBF DEFINE 12
RSPIB_SPCMD0_BIT_SPNDEN DEFINE 13
RSPIB_SPCMD0_BIT_SLNDEN DEFINE 14
RSPIB_SPCMD0_BIT_SCKDEN DEFINE 15
RSPIB_SPCMD1_WORD DEFINE 0xFFFFB812
RSPIB_SPCMD1_BIT_CPHA DEFINE 0
RSPIB_SPCMD1_BIT_CPOL DEFINE 1
RSPIB_SPCMD1_BIT_BRDV DEFINE 2
RSPIB_SPCMD1_BIT_SSLA DEFINE 4
RSPIB_SPCMD1_BIT_SSLKP DEFINE 7
RSPIB_SPCMD1_BIT_SPB DEFINE 8
RSPIB_SPCMD1_BIT_LSBF DEFINE 12
RSPIB_SPCMD1_BIT_SPNDEN DEFINE 13
RSPIB_SPCMD1_BIT_SLNDEN DEFINE 14
RSPIB_SPCMD1_BIT_SCKDEN DEFINE 15
RSPIB_SPCMD2_WORD DEFINE 0xFFFFB814
RSPIB_SPCMD2_BIT_CPHA DEFINE 0
RSPIB_SPCMD2_BIT_CPOL DEFINE 1
RSPIB_SPCMD2_BIT_BRDV DEFINE 2
RSPIB_SPCMD2_BIT_SSLA DEFINE 4
RSPIB_SPCMD2_BIT_SSLKP DEFINE 7
RSPIB_SPCMD2_BIT_SPB DEFINE 8
RSPIB_SPCMD2_BIT_LSBF DEFINE 12
RSPIB_SPCMD2_BIT_SPNDEN DEFINE 13
RSPIB_SPCMD2_BIT_SLNDEN DEFINE 14
RSPIB_SPCMD2_BIT_SCKDEN DEFINE 15
RSPIB_SPCMD3_WORD DEFINE 0xFFFFB816
RSPIB_SPCMD3_BIT_CPHA DEFINE 0
RSPIB_SPCMD3_BIT_CPOL DEFINE 1
RSPIB_SPCMD3_BIT_BRDV DEFINE 2
RSPIB_SPCMD3_BIT_SSLA DEFINE 4
RSPIB_SPCMD3_BIT_SSLKP DEFINE 7
RSPIB_SPCMD3_BIT_SPB DEFINE 8
RSPIB_SPCMD3_BIT_LSBF DEFINE 12
RSPIB_SPCMD3_BIT_SPNDEN DEFINE 13
RSPIB_SPCMD3_BIT_SLNDEN DEFINE 14
RSPIB_SPCMD3_BIT_SCKDEN DEFINE 15
RSPIB_SPCMD4_WORD DEFINE 0xFFFFB818
RSPIB_SPCMD4_BIT_CPHA DEFINE 0
RSPIB_SPCMD4_BIT_CPOL DEFINE 1
RSPIB_SPCMD4_BIT_BRDV DEFINE 2
RSPIB_SPCMD4_BIT_SSLA DEFINE 4
RSPIB_SPCMD4_BIT_SSLKP DEFINE 7
RSPIB_SPCMD4_BIT_SPB DEFINE 8
RSPIB_SPCMD4_BIT_LSBF DEFINE 12
RSPIB_SPCMD4_BIT_SPNDEN DEFINE 13
RSPIB_SPCMD4_BIT_SLNDEN DEFINE 14
RSPIB_SPCMD4_BIT_SCKDEN DEFINE 15
RSPIB_SPCMD5_WORD DEFINE 0xFFFFB81A
RSPIB_SPCMD5_BIT_CPHA DEFINE 0
RSPIB_SPCMD5_BIT_CPOL DEFINE 1
RSPIB_SPCMD5_BIT_BRDV DEFINE 2
RSPIB_SPCMD5_BIT_SSLA DEFINE 4
RSPIB_SPCMD5_BIT_SSLKP DEFINE 7
RSPIB_SPCMD5_BIT_SPB DEFINE 8
RSPIB_SPCMD5_BIT_LSBF DEFINE 12
RSPIB_SPCMD5_BIT_SPNDEN DEFINE 13
RSPIB_SPCMD5_BIT_SLNDEN DEFINE 14
RSPIB_SPCMD5_BIT_SCKDEN DEFINE 15
RSPIB_SPCMD6_WORD DEFINE 0xFFFFB81C
RSPIB_SPCMD6_BIT_CPHA DEFINE 0
RSPIB_SPCMD6_BIT_CPOL DEFINE 1
RSPIB_SPCMD6_BIT_BRDV DEFINE 2
RSPIB_SPCMD6_BIT_SSLA DEFINE 4
RSPIB_SPCMD6_BIT_SSLKP DEFINE 7
RSPIB_SPCMD6_BIT_SPB DEFINE 8
RSPIB_SPCMD6_BIT_LSBF DEFINE 12
RSPIB_SPCMD6_BIT_SPNDEN DEFINE 13
RSPIB_SPCMD6_BIT_SLNDEN DEFINE 14
RSPIB_SPCMD6_BIT_SCKDEN DEFINE 15
RSPIB_SPCMD7_WORD DEFINE 0xFFFFB81E
RSPIB_SPCMD7_BIT_CPHA DEFINE 0
RSPIB_SPCMD7_BIT_CPOL DEFINE 1
RSPIB_SPCMD7_BIT_BRDV DEFINE 2
RSPIB_SPCMD7_BIT_SSLA DEFINE 4
RSPIB_SPCMD7_BIT_SSLKP DEFINE 7
RSPIB_SPCMD7_BIT_SPB DEFINE 8
RSPIB_SPCMD7_BIT_LSBF DEFINE 12
RSPIB_SPCMD7_BIT_SPNDEN DEFINE 13
RSPIB_SPCMD7_BIT_SLNDEN DEFINE 14
RSPIB_SPCMD7_BIT_SCKDEN DEFINE 15

/* Renesas Serial Peripheral Interface Module C */
RSPIC_SPCR_BYTE DEFINE 0xFFFFC000
RSPIC_SPCR_BIT_MODFEN DEFINE 2
RSPIC_SPCR_BIT_MSTR DEFINE 3
RSPIC_SPCR_BIT_SPEIE DEFINE 4
RSPIC_SPCR_BIT_SPTIE DEFINE 5
RSPIC_SPCR_BIT_SPE DEFINE 6
RSPIC_SPCR_BIT_SPRIE DEFINE 7
RSPIC_SSLP_BYTE DEFINE 0xFFFFC001
RSPIC_SSLP_BIT_SSL0P DEFINE 0
RSPIC_SSLP_BIT_SSL1P DEFINE 1
RSPIC_SSLP_BIT_SSL2P DEFINE 2
RSPIC_SSLP_BIT_SSL3P DEFINE 3
RSPIC_SSLP_BIT_SSL4P DEFINE 4
RSPIC_SSLP_BIT_SSL5P DEFINE 5
RSPIC_SSLP_BIT_SSL6P DEFINE 6
RSPIC_SSLP_BIT_SSL7P DEFINE 7
RSPIC_SPPCR_BYTE DEFINE 0xFFFFC002
RSPIC_SPPCR_BIT_SPLP DEFINE 0
RSPIC_SPPCR_BIT_SPOM DEFINE 2
RSPIC_SPPCR_BIT_MOIFV DEFINE 4
RSPIC_SPPCR_BIT_MOIFE DEFINE 5
RSPIC_SPSR_BYTE DEFINE 0xFFFFC003
RSPIC_SPSR_BIT_OVRF DEFINE 0
RSPIC_SPSR_BIT_MODF DEFINE 2
RSPIC_SPSR_BIT_SPTEF DEFINE 5
RSPIC_SPSR_BIT_SPRF DEFINE 7
RSPIC_SPDR DEFINE 0xFFFFC004
RSPIC_wk1 DEFINE 0xFFFFC006
RSPIC_SPSCR_BYTE DEFINE 0xFFFFC008
RSPIC_SPSCR_BIT_SPSLN DEFINE 0
RSPIC_SPSSR_BYTE DEFINE 0xFFFFC009
RSPIC_SPSSR_BIT_SPCP DEFINE 0
RSPIC_SPSSR_BIT_SPECM DEFINE 4
RSPIC_SPBR DEFINE 0xFFFFC00A
RSPIC_wk2 DEFINE 0xFFFFC00B
RSPIC_SPCKD_BYTE DEFINE 0xFFFFC00C
RSPIC_SPCKD_BIT_SCKDL DEFINE 0
RSPIC_SSLND_BYTE DEFINE 0xFFFFC00D
RSPIC_SSLND_BIT_SLNDL DEFINE 0
RSPIC_SPND_BYTE DEFINE 0xFFFFC00E
RSPIC_SPND_BIT_SPNDL DEFINE 0
RSPIC_wk3 DEFINE 0xFFFFC00F
RSPIC_SPCMD0_WORD DEFINE 0xFFFFC010
RSPIC_SPCMD0_BIT_CPHA DEFINE 0
RSPIC_SPCMD0_BIT_CPOL DEFINE 1
RSPIC_SPCMD0_BIT_BRDV DEFINE 2
RSPIC_SPCMD0_BIT_SSLA DEFINE 4
RSPIC_SPCMD0_BIT_SSLKP DEFINE 7
RSPIC_SPCMD0_BIT_SPB DEFINE 8
RSPIC_SPCMD0_BIT_LSBF DEFINE 12
RSPIC_SPCMD0_BIT_SPNDEN DEFINE 13
RSPIC_SPCMD0_BIT_SLNDEN DEFINE 14
RSPIC_SPCMD0_BIT_SCKDEN DEFINE 15
RSPIC_SPCMD1_WORD DEFINE 0xFFFFC012
RSPIC_SPCMD1_BIT_CPHA DEFINE 0
RSPIC_SPCMD1_BIT_CPOL DEFINE 1
RSPIC_SPCMD1_BIT_BRDV DEFINE 2
RSPIC_SPCMD1_BIT_SSLA DEFINE 4
RSPIC_SPCMD1_BIT_SSLKP DEFINE 7
RSPIC_SPCMD1_BIT_SPB DEFINE 8
RSPIC_SPCMD1_BIT_LSBF DEFINE 12
RSPIC_SPCMD1_BIT_SPNDEN DEFINE 13
RSPIC_SPCMD1_BIT_SLNDEN DEFINE 14
RSPIC_SPCMD1_BIT_SCKDEN DEFINE 15
RSPIC_SPCMD2_WORD DEFINE 0xFFFFC014
RSPIC_SPCMD2_BIT_CPHA DEFINE 0
RSPIC_SPCMD2_BIT_CPOL DEFINE 1
RSPIC_SPCMD2_BIT_BRDV DEFINE 2
RSPIC_SPCMD2_BIT_SSLA DEFINE 4
RSPIC_SPCMD2_BIT_SSLKP DEFINE 7
RSPIC_SPCMD2_BIT_SPB DEFINE 8
RSPIC_SPCMD2_BIT_LSBF DEFINE 12
RSPIC_SPCMD2_BIT_SPNDEN DEFINE 13
RSPIC_SPCMD2_BIT_SLNDEN DEFINE 14
RSPIC_SPCMD2_BIT_SCKDEN DEFINE 15
RSPIC_SPCMD3_WORD DEFINE 0xFFFFC016
RSPIC_SPCMD3_BIT_CPHA DEFINE 0
RSPIC_SPCMD3_BIT_CPOL DEFINE 1
RSPIC_SPCMD3_BIT_BRDV DEFINE 2
RSPIC_SPCMD3_BIT_SSLA DEFINE 4
RSPIC_SPCMD3_BIT_SSLKP DEFINE 7
RSPIC_SPCMD3_BIT_SPB DEFINE 8
RSPIC_SPCMD3_BIT_LSBF DEFINE 12
RSPIC_SPCMD3_BIT_SPNDEN DEFINE 13
RSPIC_SPCMD3_BIT_SLNDEN DEFINE 14
RSPIC_SPCMD3_BIT_SCKDEN DEFINE 15
RSPIC_SPCMD4_WORD DEFINE 0xFFFFC018
RSPIC_SPCMD4_BIT_CPHA DEFINE 0
RSPIC_SPCMD4_BIT_CPOL DEFINE 1
RSPIC_SPCMD4_BIT_BRDV DEFINE 2
RSPIC_SPCMD4_BIT_SSLA DEFINE 4
RSPIC_SPCMD4_BIT_SSLKP DEFINE 7
RSPIC_SPCMD4_BIT_SPB DEFINE 8
RSPIC_SPCMD4_BIT_LSBF DEFINE 12
RSPIC_SPCMD4_BIT_SPNDEN DEFINE 13
RSPIC_SPCMD4_BIT_SLNDEN DEFINE 14
RSPIC_SPCMD4_BIT_SCKDEN DEFINE 15
RSPIC_SPCMD5_WORD DEFINE 0xFFFFC01A
RSPIC_SPCMD5_BIT_CPHA DEFINE 0
RSPIC_SPCMD5_BIT_CPOL DEFINE 1
RSPIC_SPCMD5_BIT_BRDV DEFINE 2
RSPIC_SPCMD5_BIT_SSLA DEFINE 4
RSPIC_SPCMD5_BIT_SSLKP DEFINE 7
RSPIC_SPCMD5_BIT_SPB DEFINE 8
RSPIC_SPCMD5_BIT_LSBF DEFINE 12
RSPIC_SPCMD5_BIT_SPNDEN DEFINE 13
RSPIC_SPCMD5_BIT_SLNDEN DEFINE 14
RSPIC_SPCMD5_BIT_SCKDEN DEFINE 15
RSPIC_SPCMD6_WORD DEFINE 0xFFFFC01C
RSPIC_SPCMD6_BIT_CPHA DEFINE 0
RSPIC_SPCMD6_BIT_CPOL DEFINE 1
RSPIC_SPCMD6_BIT_BRDV DEFINE 2
RSPIC_SPCMD6_BIT_SSLA DEFINE 4
RSPIC_SPCMD6_BIT_SSLKP DEFINE 7
RSPIC_SPCMD6_BIT_SPB DEFINE 8
RSPIC_SPCMD6_BIT_LSBF DEFINE 12
RSPIC_SPCMD6_BIT_SPNDEN DEFINE 13
RSPIC_SPCMD6_BIT_SLNDEN DEFINE 14
RSPIC_SPCMD6_BIT_SCKDEN DEFINE 15
RSPIC_SPCMD7_WORD DEFINE 0xFFFFC01E
RSPIC_SPCMD7_BIT_CPHA DEFINE 0
RSPIC_SPCMD7_BIT_CPOL DEFINE 1
RSPIC_SPCMD7_BIT_BRDV DEFINE 2
RSPIC_SPCMD7_BIT_SSLA DEFINE 4
RSPIC_SPCMD7_BIT_SSLKP DEFINE 7
RSPIC_SPCMD7_BIT_SPB DEFINE 8
RSPIC_SPCMD7_BIT_LSBF DEFINE 12
RSPIC_SPCMD7_BIT_SPNDEN DEFINE 13
RSPIC_SPCMD7_BIT_SLNDEN DEFINE 14
RSPIC_SPCMD7_BIT_SCKDEN DEFINE 15

/* Renesas Controller Area Network Module A     */
RCANA_MCR_WORD DEFINE 0xFFFFD000
RCANA_MCR_BIT_MCR0 DEFINE 0
RCANA_MCR_BIT_MCR1 DEFINE 1
RCANA_MCR_BIT_MCR2 DEFINE 2
RCANA_MCR_BIT_MCR5 DEFINE 5
RCANA_MCR_BIT_MCR6 DEFINE 6
RCANA_MCR_BIT_MCR7 DEFINE 7
RCANA_MCR_BIT_TST DEFINE 8
RCANA_MCR_BIT_MCR14 DEFINE 14
RCANA_MCR_BIT_MCR15 DEFINE 15
RCANA_GSR_WORD DEFINE 0xFFFFD002
RCANA_GSR_BIT_GSR0 DEFINE 0
RCANA_GSR_BIT_GSR1 DEFINE 1
RCANA_GSR_BIT_GSR2 DEFINE 2
RCANA_GSR_BIT_GSR3 DEFINE 3
RCANA_GSR_BIT_GSR4 DEFINE 4
RCANA_GSR_BIT_GSR5 DEFINE 5
RCANA_BCR1_WORD DEFINE 0xFFFFD004
RCANA_BCR1_BIT_BSP DEFINE 0
RCANA_BCR1_BIT_SJW DEFINE 4
RCANA_BCR1_BIT_TSG2 DEFINE 8
RCANA_BCR1_BIT_TSG1 DEFINE 12
RCANA_BCR0_WORD DEFINE 0xFFFFD006
RCANA_BCR0_BIT_BRP DEFINE 0
RCANA_IRR_WORD DEFINE 0xFFFFD008
RCANA_IRR_BIT_IRR0 DEFINE 0
RCANA_IRR_BIT_IRR1 DEFINE 1
RCANA_IRR_BIT_IRR2 DEFINE 2
RCANA_IRR_BIT_IRR3 DEFINE 3
RCANA_IRR_BIT_IRR4 DEFINE 4
RCANA_IRR_BIT_IRR5 DEFINE 5
RCANA_IRR_BIT_IRR6 DEFINE 6
RCANA_IRR_BIT_IRR7 DEFINE 7
RCANA_IRR_BIT_IRR8 DEFINE 8
RCANA_IRR_BIT_IRR9 DEFINE 9
RCANA_IRR_BIT_IRR10 DEFINE 10
RCANA_IRR_BIT_IRR11 DEFINE 11
RCANA_IRR_BIT_IRR12 DEFINE 12
RCANA_IRR_BIT_IRR13 DEFINE 13
RCANA_IRR_BIT_IRR14 DEFINE 14
RCANA_IRR_BIT_IRR15 DEFINE 15
RCANA_IMR_WORD DEFINE 0xFFFFD00A
RCANA_IMR_BIT_IMR0 DEFINE 0
RCANA_IMR_BIT_IMR1 DEFINE 1
RCANA_IMR_BIT_IMR2 DEFINE 2
RCANA_IMR_BIT_IMR3 DEFINE 3
RCANA_IMR_BIT_IMR4 DEFINE 4
RCANA_IMR_BIT_IMR5 DEFINE 5
RCANA_IMR_BIT_IMR6 DEFINE 6
RCANA_IMR_BIT_IMR7 DEFINE 7
RCANA_IMR_BIT_IMR8 DEFINE 8
RCANA_IMR_BIT_IMR9 DEFINE 9
RCANA_IMR_BIT_IMR10 DEFINE 10
RCANA_IMR_BIT_IMR11 DEFINE 11
RCANA_IMR_BIT_IMR12 DEFINE 12
RCANA_IMR_BIT_IMR13 DEFINE 13
RCANA_IMR_BIT_IMR14 DEFINE 14
RCANA_IMR_BIT_IMR15 DEFINE 15
RCANA_TEC_REC_WORD DEFINE 0xFFFFD00C
RCANA_TEC_REC_BIT_TEC0 DEFINE 0
RCANA_TEC_REC_BIT_TEC1 DEFINE 1
RCANA_TEC_REC_BIT_TEC2 DEFINE 2
RCANA_TEC_REC_BIT_TEC3 DEFINE 3
RCANA_TEC_REC_BIT_TEC4 DEFINE 4
RCANA_TEC_REC_BIT_TEC5 DEFINE 5
RCANA_TEC_REC_BIT_TEC6 DEFINE 6
RCANA_TEC_REC_BIT_TEC7 DEFINE 7
RCANA_TEC_REC_BIT_REC0 DEFINE 0
RCANA_TEC_REC_BIT_REC1 DEFINE 1
RCANA_TEC_REC_BIT_REC2 DEFINE 2
RCANA_TEC_REC_BIT_REC3 DEFINE 3
RCANA_TEC_REC_BIT_REC4 DEFINE 4
RCANA_TEC_REC_BIT_REC5 DEFINE 5
RCANA_TEC_REC_BIT_REC6 DEFINE 6
RCANA_TEC_REC_BIT_REC7 DEFINE 7
RCANA_wk1 DEFINE 0xFFFFD00E
RCANA_TXPR_LONG DEFINE 0xFFFFD020
RCANA_TXPR_BIT_TXPR0_1 DEFINE 1
RCANA_TXPR_BIT_TXPR0_2 DEFINE 2
RCANA_TXPR_BIT_TXPR0_3 DEFINE 3
RCANA_TXPR_BIT_TXPR0_4 DEFINE 4
RCANA_TXPR_BIT_TXPR0_5 DEFINE 5
RCANA_TXPR_BIT_TXPR0_6 DEFINE 6
RCANA_TXPR_BIT_TXPR0_7 DEFINE 7
RCANA_TXPR_BIT_TXPR0_8 DEFINE 8
RCANA_TXPR_BIT_TXPR0_9 DEFINE 9
RCANA_TXPR_BIT_TXPR0_10 DEFINE 10
RCANA_TXPR_BIT_TXPR0_11 DEFINE 11
RCANA_TXPR_BIT_TXPR0_12 DEFINE 12
RCANA_TXPR_BIT_TXPR0_13 DEFINE 13
RCANA_TXPR_BIT_TXPR0_14 DEFINE 14
RCANA_TXPR_BIT_TXPR0_15 DEFINE 15
RCANA_TXPR_BIT_TXPR1_0 DEFINE 16
RCANA_TXPR_BIT_TXPR1_1 DEFINE 17
RCANA_TXPR_BIT_TXPR1_2 DEFINE 18
RCANA_TXPR_BIT_TXPR1_3 DEFINE 19
RCANA_TXPR_BIT_TXPR1_4 DEFINE 20
RCANA_TXPR_BIT_TXPR1_5 DEFINE 21
RCANA_TXPR_BIT_TXPR1_6 DEFINE 22
RCANA_TXPR_BIT_TXPR1_7 DEFINE 23
RCANA_TXPR_BIT_TXPR1_8 DEFINE 24
RCANA_TXPR_BIT_TXPR1_9 DEFINE 25
RCANA_TXPR_BIT_TXPR1_10 DEFINE 26
RCANA_TXPR_BIT_TXPR1_11 DEFINE 27
RCANA_TXPR_BIT_TXPR1_12 DEFINE 28
RCANA_TXPR_BIT_TXPR1_13 DEFINE 29
RCANA_TXPR_BIT_TXPR1_14 DEFINE 30
RCANA_TXPR_BIT_TXPR1_15 DEFINE 31
RCANA_wk2 DEFINE 0xFFFFD024
RCANA_TXCR_LONG DEFINE 0xFFFFD028
RCANA_TXCR_BIT_TXCR0_1 DEFINE 1
RCANA_TXCR_BIT_TXCR0_2 DEFINE 2
RCANA_TXCR_BIT_TXCR0_3 DEFINE 3
RCANA_TXCR_BIT_TXCR0_4 DEFINE 4
RCANA_TXCR_BIT_TXCR0_5 DEFINE 5
RCANA_TXCR_BIT_TXCR0_6 DEFINE 6
RCANA_TXCR_BIT_TXCR0_7 DEFINE 7
RCANA_TXCR_BIT_TXCR0_8 DEFINE 8
RCANA_TXCR_BIT_TXCR0_9 DEFINE 9
RCANA_TXCR_BIT_TXCR0_10 DEFINE 10
RCANA_TXCR_BIT_TXCR0_11 DEFINE 11
RCANA_TXCR_BIT_TXCR0_12 DEFINE 12
RCANA_TXCR_BIT_TXCR0_13 DEFINE 13
RCANA_TXCR_BIT_TXCR0_14 DEFINE 14
RCANA_TXCR_BIT_TXCR0_15 DEFINE 15
RCANA_TXCR_BIT_TXCR1_0 DEFINE 16
RCANA_TXCR_BIT_TXCR1_1 DEFINE 17
RCANA_TXCR_BIT_TXCR1_2 DEFINE 18
RCANA_TXCR_BIT_TXCR1_3 DEFINE 19
RCANA_TXCR_BIT_TXCR1_4 DEFINE 20
RCANA_TXCR_BIT_TXCR1_5 DEFINE 21
RCANA_TXCR_BIT_TXCR1_6 DEFINE 22
RCANA_TXCR_BIT_TXCR1_7 DEFINE 23
RCANA_TXCR_BIT_TXCR1_8 DEFINE 24
RCANA_TXCR_BIT_TXCR1_9 DEFINE 25
RCANA_TXCR_BIT_TXCR1_10 DEFINE 26
RCANA_TXCR_BIT_TXCR1_11 DEFINE 27
RCANA_TXCR_BIT_TXCR1_12 DEFINE 28
RCANA_TXCR_BIT_TXCR1_13 DEFINE 29
RCANA_TXCR_BIT_TXCR1_14 DEFINE 30
RCANA_TXCR_BIT_TXCR1_15 DEFINE 31
RCANA_TXCR_WORD_TXCR1 DEFINE 0xFFFFD028
RCANA_TXCR_WORD_TXCR0 DEFINE 0xFFFFD02A
RCANA_wk3 DEFINE 0xFFFFD02C
RCANA_TXACK_LONG DEFINE 0xFFFFD030
RCANA_TXACK_BIT_TXACK0_1 DEFINE 1
RCANA_TXACK_BIT_TXACK0_2 DEFINE 2
RCANA_TXACK_BIT_TXACK0_3 DEFINE 3
RCANA_TXACK_BIT_TXACK0_4 DEFINE 4
RCANA_TXACK_BIT_TXACK0_5 DEFINE 5
RCANA_TXACK_BIT_TXACK0_6 DEFINE 6
RCANA_TXACK_BIT_TXACK0_7 DEFINE 7
RCANA_TXACK_BIT_TXACK0_8 DEFINE 8
RCANA_TXACK_BIT_TXACK0_9 DEFINE 9
RCANA_TXACK_BIT_TXACK0_10 DEFINE 10
RCANA_TXACK_BIT_TXACK0_11 DEFINE 11
RCANA_TXACK_BIT_TXACK0_12 DEFINE 12
RCANA_TXACK_BIT_TXACK0_13 DEFINE 13
RCANA_TXACK_BIT_TXACK0_14 DEFINE 14
RCANA_TXACK_BIT_TXACK0_15 DEFINE 15
RCANA_TXACK_BIT_TXACK1_0 DEFINE 16
RCANA_TXACK_BIT_TXACK1_1 DEFINE 17
RCANA_TXACK_BIT_TXACK1_2 DEFINE 18
RCANA_TXACK_BIT_TXACK1_3 DEFINE 19
RCANA_TXACK_BIT_TXACK1_4 DEFINE 20
RCANA_TXACK_BIT_TXACK1_5 DEFINE 21
RCANA_TXACK_BIT_TXACK1_6 DEFINE 22
RCANA_TXACK_BIT_TXACK1_7 DEFINE 23
RCANA_TXACK_BIT_TXACK1_8 DEFINE 24
RCANA_TXACK_BIT_TXACK1_9 DEFINE 25
RCANA_TXACK_BIT_TXACK1_10 DEFINE 26
RCANA_TXACK_BIT_TXACK1_11 DEFINE 27
RCANA_TXACK_BIT_TXACK1_12 DEFINE 28
RCANA_TXACK_BIT_TXACK1_13 DEFINE 29
RCANA_TXACK_BIT_TXACK1_14 DEFINE 30
RCANA_TXACK_BIT_TXACK1_15 DEFINE 31
RCANA_TXACK_WORD_TXACK1 DEFINE 0xFFFFD030
RCANA_TXACK_WORD_TXACK0 DEFINE 0xFFFFD032
RCANA_wk4 DEFINE 0xFFFFD034
RCANA_ABACK_LONG DEFINE 0xFFFFD038
RCANA_ABACK_BIT_ABACK0_1 DEFINE 1
RCANA_ABACK_BIT_ABACK0_2 DEFINE 2
RCANA_ABACK_BIT_ABACK0_3 DEFINE 3
RCANA_ABACK_BIT_ABACK0_4 DEFINE 4
RCANA_ABACK_BIT_ABACK0_5 DEFINE 5
RCANA_ABACK_BIT_ABACK0_6 DEFINE 6
RCANA_ABACK_BIT_ABACK0_7 DEFINE 7
RCANA_ABACK_BIT_ABACK0_8 DEFINE 8
RCANA_ABACK_BIT_ABACK0_9 DEFINE 9
RCANA_ABACK_BIT_ABACK0_10 DEFINE 10
RCANA_ABACK_BIT_ABACK0_11 DEFINE 11
RCANA_ABACK_BIT_ABACK0_12 DEFINE 12
RCANA_ABACK_BIT_ABACK0_13 DEFINE 13
RCANA_ABACK_BIT_ABACK0_14 DEFINE 14
RCANA_ABACK_BIT_ABACK0_15 DEFINE 15
RCANA_ABACK_BIT_ABACK1_0 DEFINE 16
RCANA_ABACK_BIT_ABACK1_1 DEFINE 17
RCANA_ABACK_BIT_ABACK1_2 DEFINE 18
RCANA_ABACK_BIT_ABACK1_3 DEFINE 19
RCANA_ABACK_BIT_ABACK1_4 DEFINE 20
RCANA_ABACK_BIT_ABACK1_5 DEFINE 21
RCANA_ABACK_BIT_ABACK1_6 DEFINE 22
RCANA_ABACK_BIT_ABACK1_7 DEFINE 23
RCANA_ABACK_BIT_ABACK1_8 DEFINE 24
RCANA_ABACK_BIT_ABACK1_9 DEFINE 25
RCANA_ABACK_BIT_ABACK1_10 DEFINE 26
RCANA_ABACK_BIT_ABACK1_11 DEFINE 27
RCANA_ABACK_BIT_ABACK1_12 DEFINE 28
RCANA_ABACK_BIT_ABACK1_13 DEFINE 29
RCANA_ABACK_BIT_ABACK1_14 DEFINE 30
RCANA_ABACK_BIT_ABACK1_15 DEFINE 31
RCANA_ABACK_WORD_ABACK1 DEFINE 0xFFFFD038
RCANA_ABACK_WORD_ABACK0 DEFINE 0xFFFFD03A
RCANA_wk5 DEFINE 0xFFFFD03C
RCANA_RXPR_LONG DEFINE 0xFFFFD040
RCANA_RXPR_BIT_RXPR0_0 DEFINE 0
RCANA_RXPR_BIT_RXPR0_1 DEFINE 1
RCANA_RXPR_BIT_RXPR0_2 DEFINE 2
RCANA_RXPR_BIT_RXPR0_3 DEFINE 3
RCANA_RXPR_BIT_RXPR0_4 DEFINE 4
RCANA_RXPR_BIT_RXPR0_5 DEFINE 5
RCANA_RXPR_BIT_RXPR0_6 DEFINE 6
RCANA_RXPR_BIT_RXPR0_7 DEFINE 7
RCANA_RXPR_BIT_RXPR0_8 DEFINE 8
RCANA_RXPR_BIT_RXPR0_9 DEFINE 9
RCANA_RXPR_BIT_RXPR0_10 DEFINE 10
RCANA_RXPR_BIT_RXPR0_11 DEFINE 11
RCANA_RXPR_BIT_RXPR0_12 DEFINE 12
RCANA_RXPR_BIT_RXPR0_13 DEFINE 13
RCANA_RXPR_BIT_RXPR0_14 DEFINE 14
RCANA_RXPR_BIT_RXPR0_15 DEFINE 15
RCANA_RXPR_BIT_RXPR1_0 DEFINE 16
RCANA_RXPR_BIT_RXPR1_1 DEFINE 17
RCANA_RXPR_BIT_RXPR1_2 DEFINE 18
RCANA_RXPR_BIT_RXPR1_3 DEFINE 19
RCANA_RXPR_BIT_RXPR1_4 DEFINE 20
RCANA_RXPR_BIT_RXPR1_5 DEFINE 21
RCANA_RXPR_BIT_RXPR1_6 DEFINE 22
RCANA_RXPR_BIT_RXPR1_7 DEFINE 23
RCANA_RXPR_BIT_RXPR1_8 DEFINE 24
RCANA_RXPR_BIT_RXPR1_9 DEFINE 25
RCANA_RXPR_BIT_RXPR1_10 DEFINE 26
RCANA_RXPR_BIT_RXPR1_11 DEFINE 27
RCANA_RXPR_BIT_RXPR1_12 DEFINE 28
RCANA_RXPR_BIT_RXPR1_13 DEFINE 29
RCANA_RXPR_BIT_RXPR1_14 DEFINE 30
RCANA_RXPR_BIT_RXPR1_15 DEFINE 31
RCANA_RXPR_WORD_RXPR1 DEFINE 0xFFFFD040
RCANA_RXPR_WORD_RXPR0 DEFINE 0xFFFFD042
RCANA_wk6 DEFINE 0xFFFFD044
RCANA_RFPR_LONG DEFINE 0xFFFFD048
RCANA_RFPR_BIT_RFPR0_0 DEFINE 0
RCANA_RFPR_BIT_RFPR0_1 DEFINE 1
RCANA_RFPR_BIT_RFPR0_2 DEFINE 2
RCANA_RFPR_BIT_RFPR0_3 DEFINE 3
RCANA_RFPR_BIT_RFPR0_4 DEFINE 4
RCANA_RFPR_BIT_RFPR0_5 DEFINE 5
RCANA_RFPR_BIT_RFPR0_6 DEFINE 6
RCANA_RFPR_BIT_RFPR0_7 DEFINE 7
RCANA_RFPR_BIT_RFPR0_8 DEFINE 8
RCANA_RFPR_BIT_RFPR0_9 DEFINE 9
RCANA_RFPR_BIT_RFPR0_10 DEFINE 10
RCANA_RFPR_BIT_RFPR0_11 DEFINE 11
RCANA_RFPR_BIT_RFPR0_12 DEFINE 12
RCANA_RFPR_BIT_RFPR0_13 DEFINE 13
RCANA_RFPR_BIT_RFPR0_14 DEFINE 14
RCANA_RFPR_BIT_RFPR0_15 DEFINE 15
RCANA_RFPR_BIT_RFPR1_0 DEFINE 16
RCANA_RFPR_BIT_RFPR1_1 DEFINE 17
RCANA_RFPR_BIT_RFPR1_2 DEFINE 18
RCANA_RFPR_BIT_RFPR1_3 DEFINE 19
RCANA_RFPR_BIT_RFPR1_4 DEFINE 20
RCANA_RFPR_BIT_RFPR1_5 DEFINE 21
RCANA_RFPR_BIT_RFPR1_6 DEFINE 22
RCANA_RFPR_BIT_RFPR1_7 DEFINE 23
RCANA_RFPR_BIT_RFPR1_8 DEFINE 24
RCANA_RFPR_BIT_RFPR1_9 DEFINE 25
RCANA_RFPR_BIT_RFPR1_10 DEFINE 26
RCANA_RFPR_BIT_RFPR1_11 DEFINE 27
RCANA_RFPR_BIT_RFPR1_12 DEFINE 28
RCANA_RFPR_BIT_RFPR1_13 DEFINE 29
RCANA_RFPR_BIT_RFPR1_14 DEFINE 30
RCANA_RFPR_BIT_RFPR1_15 DEFINE 31
RCANA_RFPR_WORD_RFPR1 DEFINE 0xFFFFD048
RCANA_RFPR_WORD_RFPR0 DEFINE 0xFFFFD04A
RCANA_wk7 DEFINE 0xFFFFD04C
RCANA_MBIMR_LONG DEFINE 0xFFFFD050
RCANA_MBIMR_BIT_MBIMR0_0 DEFINE 0
RCANA_MBIMR_BIT_MBIMR0_1 DEFINE 1
RCANA_MBIMR_BIT_MBIMR0_2 DEFINE 2
RCANA_MBIMR_BIT_MBIMR0_3 DEFINE 3
RCANA_MBIMR_BIT_MBIMR0_4 DEFINE 4
RCANA_MBIMR_BIT_MBIMR0_5 DEFINE 5
RCANA_MBIMR_BIT_MBIMR0_6 DEFINE 6
RCANA_MBIMR_BIT_MBIMR0_7 DEFINE 7
RCANA_MBIMR_BIT_MBIMR0_8 DEFINE 8
RCANA_MBIMR_BIT_MBIMR0_9 DEFINE 9
RCANA_MBIMR_BIT_MBIMR0_10 DEFINE 10
RCANA_MBIMR_BIT_MBIMR0_11 DEFINE 11
RCANA_MBIMR_BIT_MBIMR0_12 DEFINE 12
RCANA_MBIMR_BIT_MBIMR0_13 DEFINE 13
RCANA_MBIMR_BIT_MBIMR0_14 DEFINE 14
RCANA_MBIMR_BIT_MBIMR0_15 DEFINE 15
RCANA_MBIMR_BIT_MBIMR1_0 DEFINE 16
RCANA_MBIMR_BIT_MBIMR1_1 DEFINE 17
RCANA_MBIMR_BIT_MBIMR1_2 DEFINE 18
RCANA_MBIMR_BIT_MBIMR1_3 DEFINE 19
RCANA_MBIMR_BIT_MBIMR1_4 DEFINE 20
RCANA_MBIMR_BIT_MBIMR1_5 DEFINE 21
RCANA_MBIMR_BIT_MBIMR1_6 DEFINE 22
RCANA_MBIMR_BIT_MBIMR1_7 DEFINE 23
RCANA_MBIMR_BIT_MBIMR1_8 DEFINE 24
RCANA_MBIMR_BIT_MBIMR1_9 DEFINE 25
RCANA_MBIMR_BIT_MBIMR1_10 DEFINE 26
RCANA_MBIMR_BIT_MBIMR1_11 DEFINE 27
RCANA_MBIMR_BIT_MBIMR1_12 DEFINE 28
RCANA_MBIMR_BIT_MBIMR1_13 DEFINE 29
RCANA_MBIMR_BIT_MBIMR1_14 DEFINE 30
RCANA_MBIMR_BIT_MBIMR1_15 DEFINE 31
RCANA_MBIMR_WORD_MBIMR1 DEFINE 0xFFFFD050
RCANA_MBIMR_WORD_MBIMR0 DEFINE 0xFFFFD052
RCANA_wk8 DEFINE 0xFFFFD054
RCANA_UMSR_LONG DEFINE 0xFFFFD058
RCANA_UMSR_BIT_UMSR0_0 DEFINE 0
RCANA_UMSR_BIT_UMSR0_1 DEFINE 1
RCANA_UMSR_BIT_UMSR0_2 DEFINE 2
RCANA_UMSR_BIT_UMSR0_3 DEFINE 3
RCANA_UMSR_BIT_UMSR0_4 DEFINE 4
RCANA_UMSR_BIT_UMSR0_5 DEFINE 5
RCANA_UMSR_BIT_UMSR0_6 DEFINE 6
RCANA_UMSR_BIT_UMSR0_7 DEFINE 7
RCANA_UMSR_BIT_UMSR0_8 DEFINE 8
RCANA_UMSR_BIT_UMSR0_9 DEFINE 9
RCANA_UMSR_BIT_UMSR0_10 DEFINE 10
RCANA_UMSR_BIT_UMSR0_11 DEFINE 11
RCANA_UMSR_BIT_UMSR0_12 DEFINE 12
RCANA_UMSR_BIT_UMSR0_13 DEFINE 13
RCANA_UMSR_BIT_UMSR0_14 DEFINE 14
RCANA_UMSR_BIT_UMSR0_15 DEFINE 15
RCANA_UMSR_BIT_UMSR1_0 DEFINE 16
RCANA_UMSR_BIT_UMSR1_1 DEFINE 17
RCANA_UMSR_BIT_UMSR1_2 DEFINE 18
RCANA_UMSR_BIT_UMSR1_3 DEFINE 19
RCANA_UMSR_BIT_UMSR1_4 DEFINE 20
RCANA_UMSR_BIT_UMSR1_5 DEFINE 21
RCANA_UMSR_BIT_UMSR1_6 DEFINE 22
RCANA_UMSR_BIT_UMSR1_7 DEFINE 23
RCANA_UMSR_BIT_UMSR1_8 DEFINE 24
RCANA_UMSR_BIT_UMSR1_9 DEFINE 25
RCANA_UMSR_BIT_UMSR1_10 DEFINE 26
RCANA_UMSR_BIT_UMSR1_11 DEFINE 27
RCANA_UMSR_BIT_UMSR1_12 DEFINE 28
RCANA_UMSR_BIT_UMSR1_13 DEFINE 29
RCANA_UMSR_BIT_UMSR1_14 DEFINE 30
RCANA_UMSR_BIT_UMSR1_15 DEFINE 31
RCANA_UMSR_WORD_UMSR1 DEFINE 0xFFFFD058
RCANA_UMSR_WORD_UMSR0 DEFINE 0xFFFFD05A
RCANA_wk9 DEFINE 0xFFFFD05C
RCANA_TTCR0_WORD DEFINE 0xFFFFD080
RCANA_TTCR0_BIT_TPSC0 DEFINE 0
RCANA_TTCR0_BIT_TPSC1 DEFINE 1
RCANA_TTCR0_BIT_TPSC2 DEFINE 2
RCANA_TTCR0_BIT_TPSC3 DEFINE 3
RCANA_TTCR0_BIT_TPSC4 DEFINE 4
RCANA_TTCR0_BIT_TPSC5 DEFINE 5
RCANA_TTCR0_BIT_TCR6 DEFINE 6
RCANA_TTCR0_BIT_TCR10 DEFINE 10
RCANA_TTCR0_BIT_TCR11 DEFINE 11
RCANA_TTCR0_BIT_TCR12 DEFINE 12
RCANA_TTCR0_BIT_TCR13 DEFINE 13
RCANA_TTCR0_BIT_TCR14 DEFINE 14
RCANA_TTCR0_BIT_TCR15 DEFINE 15
RCANA_wk10 DEFINE 0xFFFFD082
RCANA_CMAX_TEW_WORD DEFINE 0xFFFFD084
RCANA_CMAX_TEW_BIT_TEW DEFINE 0
RCANA_CMAX_TEW_BIT_CMAX DEFINE 8
RCANA_RFTROFF_WORD DEFINE 0xFFFFD086
RCANA_RFTROFF_BIT_RFTROFF DEFINE 8
RCANA_TSR_WORD DEFINE 0xFFFFD088
RCANA_TSR_BIT_TSR0 DEFINE 0
RCANA_TSR_BIT_TSR1 DEFINE 1
RCANA_TSR_BIT_TSR2 DEFINE 2
RCANA_TSR_BIT_TSR3 DEFINE 3
RCANA_TSR_BIT_TSR4 DEFINE 4
RCANA_CCR_WORD DEFINE 0xFFFFD08A
RCANA_CCR_BIT_CCR DEFINE 0
RCANA_TCNTR DEFINE 0xFFFFD08C
RCANA_wk11 DEFINE 0xFFFFD08E
RCANA_CYCTR DEFINE 0xFFFFD090
RCANA_wk12 DEFINE 0xFFFFD092
RCANA_RFMK DEFINE 0xFFFFD094
RCANA_wk13 DEFINE 0xFFFFD096
RCANA_TCMR0 DEFINE 0xFFFFD098
RCANA_wk14 DEFINE 0xFFFFD09A
RCANA_TCMR1 DEFINE 0xFFFFD09C
RCANA_wk15 DEFINE 0xFFFFD09E
RCANA_TCMR2 DEFINE 0xFFFFD0A0
RCANA_wk16 DEFINE 0xFFFFD0A2
RCANA_TTTSEL_WORD DEFINE 0xFFFFD0A4
RCANA_TTTSEL_BIT_TTTSEL8 DEFINE 8
RCANA_TTTSEL_BIT_TTTSEL9 DEFINE 9
RCANA_TTTSEL_BIT_TTTSEL10 DEFINE 10
RCANA_TTTSEL_BIT_TTTSEL11 DEFINE 11
RCANA_TTTSEL_BIT_TTTSEL12 DEFINE 12
RCANA_TTTSEL_BIT_TTTSEL13 DEFINE 13
RCANA_TTTSEL_BIT_TTTSEL14 DEFINE 14
RCANA_wk17 DEFINE 0xFFFFD0A6
RCANA_MSG1_t_CAN_message_buffer_CONTROL0_LONG DEFINE 0xFFFFD100
RCANA_MSG1_t_CAN_message_buffer_CONTROL0_BIT_EXTID DEFINE 0
RCANA_MSG1_t_CAN_message_buffer_CONTROL0_BIT_STDID DEFINE 18
RCANA_MSG1_t_CAN_message_buffer_CONTROL0_BIT_RTR DEFINE 30
RCANA_MSG1_t_CAN_message_buffer_CONTROL0_BIT_IDE DEFINE 31
RCANA_MSG1_t_CAN_message_buffer_LAFM_LONG DEFINE 0xFFFFD104
RCANA_MSG1_t_CAN_message_buffer_LAFM_BIT_EXTID_LAFM DEFINE 0
RCANA_MSG1_t_CAN_message_buffer_LAFM_BIT_STDID_LAFM DEFINE 18
RCANA_MSG1_t_CAN_message_buffer_LAFM_BIT_IDE_LAFM DEFINE 31
RCANA_MSG1_t_CAN_message_buffer_DATA_LONG DEFINE 0xFFFFD108
RCANA_MSG1_t_CAN_message_buffer_DATA_WORD DEFINE 0xFFFFD108
RCANA_MSG1_t_CAN_message_buffer_DATA_BYTE DEFINE 0xFFFFD108
RCANA_MSG1_t_CAN_message_buffer_CONTROL1_WORD DEFINE 0xFFFFD110
RCANA_MSG1_t_CAN_message_buffer_CONTROL1_BIT_MBC DEFINE 0
RCANA_MSG1_t_CAN_message_buffer_CONTROL1_BIT_DART DEFINE 3
RCANA_MSG1_t_CAN_message_buffer_CONTROL1_BIT_ATX DEFINE 4
RCANA_MSG1_t_CAN_message_buffer_CONTROL1_BIT_NMC DEFINE 5
RCANA_MSG1_t_CAN_message_buffer_CONTROL1_BIT_DLC DEFINE 0
RCANA_MSG1_t_CAN_message_buffer_Timestamp DEFINE 0xFFFFD112
RCANA_MSG1_t_CAN_message_buffer_TTT DEFINE 0xFFFFD114
RCANA_MSG1_t_CAN_message_buffer_TTW_WORD DEFINE 0xFFFFD116
RCANA_MSG1_t_CAN_message_buffer_TTW_BIT_rep_factor DEFINE 0
RCANA_MSG1_t_CAN_message_buffer_TTW_BIT_Offset DEFINE 8
RCANA_MSG1_t_CAN_message_buffer_TTW_BIT_TTW DEFINE 14
RCANA_MSG1_t_CAN_message_buffer_wk DEFINE 0xFFFFD118
RCANA_MSG2_t_CAN_message_buffer_CONTROL0_LONG DEFINE 0xFFFFD120
RCANA_MSG2_t_CAN_message_buffer_CONTROL0_BIT_EXTID DEFINE 0
RCANA_MSG2_t_CAN_message_buffer_CONTROL0_BIT_STDID DEFINE 18
RCANA_MSG2_t_CAN_message_buffer_CONTROL0_BIT_RTR DEFINE 30
RCANA_MSG2_t_CAN_message_buffer_CONTROL0_BIT_IDE DEFINE 31
RCANA_MSG2_t_CAN_message_buffer_LAFM_LONG DEFINE 0xFFFFD124
RCANA_MSG2_t_CAN_message_buffer_LAFM_BIT_EXTID_LAFM DEFINE 0
RCANA_MSG2_t_CAN_message_buffer_LAFM_BIT_STDID_LAFM DEFINE 18
RCANA_MSG2_t_CAN_message_buffer_LAFM_BIT_IDE_LAFM DEFINE 31
RCANA_MSG2_t_CAN_message_buffer_DATA_LONG DEFINE 0xFFFFD128
RCANA_MSG2_t_CAN_message_buffer_DATA_WORD DEFINE 0xFFFFD128
RCANA_MSG2_t_CAN_message_buffer_DATA_BYTE DEFINE 0xFFFFD128
RCANA_MSG2_t_CAN_message_buffer_CONTROL1_WORD DEFINE 0xFFFFD130
RCANA_MSG2_t_CAN_message_buffer_CONTROL1_BIT_MBC DEFINE 0
RCANA_MSG2_t_CAN_message_buffer_CONTROL1_BIT_DART DEFINE 3
RCANA_MSG2_t_CAN_message_buffer_CONTROL1_BIT_ATX DEFINE 4
RCANA_MSG2_t_CAN_message_buffer_CONTROL1_BIT_NMC DEFINE 5
RCANA_MSG2_t_CAN_message_buffer_CONTROL1_BIT_DLC DEFINE 0
RCANA_MSG2_t_CAN_message_buffer_Timestamp DEFINE 0xFFFFD132
RCANA_MSG2_t_CAN_message_buffer_TTT DEFINE 0xFFFFD134
RCANA_MSG2_t_CAN_message_buffer_TTW_WORD DEFINE 0xFFFFD136
RCANA_MSG2_t_CAN_message_buffer_TTW_BIT_rep_factor DEFINE 0
RCANA_MSG2_t_CAN_message_buffer_TTW_BIT_Offset DEFINE 8
RCANA_MSG2_t_CAN_message_buffer_TTW_BIT_TTW DEFINE 14
RCANA_MSG2_t_CAN_message_buffer_wk DEFINE 0xFFFFD138
RCANA_MSG3_t_CAN_message_buffer_CONTROL0_LONG DEFINE 0xFFFFD140
RCANA_MSG3_t_CAN_message_buffer_CONTROL0_BIT_EXTID DEFINE 0
RCANA_MSG3_t_CAN_message_buffer_CONTROL0_BIT_STDID DEFINE 18
RCANA_MSG3_t_CAN_message_buffer_CONTROL0_BIT_RTR DEFINE 30
RCANA_MSG3_t_CAN_message_buffer_CONTROL0_BIT_IDE DEFINE 31
RCANA_MSG3_t_CAN_message_buffer_LAFM_LONG DEFINE 0xFFFFD144
RCANA_MSG3_t_CAN_message_buffer_LAFM_BIT_EXTID_LAFM DEFINE 0
RCANA_MSG3_t_CAN_message_buffer_LAFM_BIT_STDID_LAFM DEFINE 18
RCANA_MSG3_t_CAN_message_buffer_LAFM_BIT_IDE_LAFM DEFINE 31
RCANA_MSG3_t_CAN_message_buffer_DATA_LONG DEFINE 0xFFFFD148
RCANA_MSG3_t_CAN_message_buffer_DATA_WORD DEFINE 0xFFFFD148
RCANA_MSG3_t_CAN_message_buffer_DATA_BYTE DEFINE 0xFFFFD148
RCANA_MSG3_t_CAN_message_buffer_CONTROL1_WORD DEFINE 0xFFFFD150
RCANA_MSG3_t_CAN_message_buffer_CONTROL1_BIT_MBC DEFINE 0
RCANA_MSG3_t_CAN_message_buffer_CONTROL1_BIT_DART DEFINE 3
RCANA_MSG3_t_CAN_message_buffer_CONTROL1_BIT_ATX DEFINE 4
RCANA_MSG3_t_CAN_message_buffer_CONTROL1_BIT_NMC DEFINE 5
RCANA_MSG3_t_CAN_message_buffer_CONTROL1_BIT_DLC DEFINE 0
RCANA_MSG3_t_CAN_message_buffer_Timestamp DEFINE 0xFFFFD152
RCANA_MSG3_t_CAN_message_buffer_TTT DEFINE 0xFFFFD154
RCANA_MSG3_t_CAN_message_buffer_TTW_WORD DEFINE 0xFFFFD156
RCANA_MSG3_t_CAN_message_buffer_TTW_BIT_rep_factor DEFINE 0
RCANA_MSG3_t_CAN_message_buffer_TTW_BIT_Offset DEFINE 8
RCANA_MSG3_t_CAN_message_buffer_TTW_BIT_TTW DEFINE 14
RCANA_MSG3_t_CAN_message_buffer_wk DEFINE 0xFFFFD158
RCANA_MSG4_t_CAN_message_buffer_CONTROL0_LONG DEFINE 0xFFFFD160
RCANA_MSG4_t_CAN_message_buffer_CONTROL0_BIT_EXTID DEFINE 0
RCANA_MSG4_t_CAN_message_buffer_CONTROL0_BIT_STDID DEFINE 18
RCANA_MSG4_t_CAN_message_buffer_CONTROL0_BIT_RTR DEFINE 30
RCANA_MSG4_t_CAN_message_buffer_CONTROL0_BIT_IDE DEFINE 31
RCANA_MSG4_t_CAN_message_buffer_LAFM_LONG DEFINE 0xFFFFD164
RCANA_MSG4_t_CAN_message_buffer_LAFM_BIT_EXTID_LAFM DEFINE 0
RCANA_MSG4_t_CAN_message_buffer_LAFM_BIT_STDID_LAFM DEFINE 18
RCANA_MSG4_t_CAN_message_buffer_LAFM_BIT_IDE_LAFM DEFINE 31
RCANA_MSG4_t_CAN_message_buffer_DATA_LONG DEFINE 0xFFFFD168
RCANA_MSG4_t_CAN_message_buffer_DATA_WORD DEFINE 0xFFFFD168
RCANA_MSG4_t_CAN_message_buffer_DATA_BYTE DEFINE 0xFFFFD168
RCANA_MSG4_t_CAN_message_buffer_CONTROL1_WORD DEFINE 0xFFFFD170
RCANA_MSG4_t_CAN_message_buffer_CONTROL1_BIT_MBC DEFINE 0
RCANA_MSG4_t_CAN_message_buffer_CONTROL1_BIT_DART DEFINE 3
RCANA_MSG4_t_CAN_message_buffer_CONTROL1_BIT_ATX DEFINE 4
RCANA_MSG4_t_CAN_message_buffer_CONTROL1_BIT_NMC DEFINE 5
RCANA_MSG4_t_CAN_message_buffer_CONTROL1_BIT_DLC DEFINE 0
RCANA_MSG4_t_CAN_message_buffer_Timestamp DEFINE 0xFFFFD172
RCANA_MSG4_t_CAN_message_buffer_TTT DEFINE 0xFFFFD174
RCANA_MSG4_t_CAN_message_buffer_TTW_WORD DEFINE 0xFFFFD176
RCANA_MSG4_t_CAN_message_buffer_TTW_BIT_rep_factor DEFINE 0
RCANA_MSG4_t_CAN_message_buffer_TTW_BIT_Offset DEFINE 8
RCANA_MSG4_t_CAN_message_buffer_TTW_BIT_TTW DEFINE 14
RCANA_MSG4_t_CAN_message_buffer_wk DEFINE 0xFFFFD178
RCANA_MSG5_t_CAN_message_buffer_CONTROL0_LONG DEFINE 0xFFFFD180
RCANA_MSG5_t_CAN_message_buffer_CONTROL0_BIT_EXTID DEFINE 0
RCANA_MSG5_t_CAN_message_buffer_CONTROL0_BIT_STDID DEFINE 18
RCANA_MSG5_t_CAN_message_buffer_CONTROL0_BIT_RTR DEFINE 30
RCANA_MSG5_t_CAN_message_buffer_CONTROL0_BIT_IDE DEFINE 31
RCANA_MSG5_t_CAN_message_buffer_LAFM_LONG DEFINE 0xFFFFD184
RCANA_MSG5_t_CAN_message_buffer_LAFM_BIT_EXTID_LAFM DEFINE 0
RCANA_MSG5_t_CAN_message_buffer_LAFM_BIT_STDID_LAFM DEFINE 18
RCANA_MSG5_t_CAN_message_buffer_LAFM_BIT_IDE_LAFM DEFINE 31
RCANA_MSG5_t_CAN_message_buffer_DATA_LONG DEFINE 0xFFFFD188
RCANA_MSG5_t_CAN_message_buffer_DATA_WORD DEFINE 0xFFFFD188
RCANA_MSG5_t_CAN_message_buffer_DATA_BYTE DEFINE 0xFFFFD188
RCANA_MSG5_t_CAN_message_buffer_CONTROL1_WORD DEFINE 0xFFFFD190
RCANA_MSG5_t_CAN_message_buffer_CONTROL1_BIT_MBC DEFINE 0
RCANA_MSG5_t_CAN_message_buffer_CONTROL1_BIT_DART DEFINE 3
RCANA_MSG5_t_CAN_message_buffer_CONTROL1_BIT_ATX DEFINE 4
RCANA_MSG5_t_CAN_message_buffer_CONTROL1_BIT_NMC DEFINE 5
RCANA_MSG5_t_CAN_message_buffer_CONTROL1_BIT_DLC DEFINE 0
RCANA_MSG5_t_CAN_message_buffer_Timestamp DEFINE 0xFFFFD192
RCANA_MSG5_t_CAN_message_buffer_TTT DEFINE 0xFFFFD194
RCANA_MSG5_t_CAN_message_buffer_TTW_WORD DEFINE 0xFFFFD196
RCANA_MSG5_t_CAN_message_buffer_TTW_BIT_rep_factor DEFINE 0
RCANA_MSG5_t_CAN_message_buffer_TTW_BIT_Offset DEFINE 8
RCANA_MSG5_t_CAN_message_buffer_TTW_BIT_TTW DEFINE 14
RCANA_MSG5_t_CAN_message_buffer_wk DEFINE 0xFFFFD198
RCANA_MSG6_t_CAN_message_buffer_CONTROL0_LONG DEFINE 0xFFFFD1A0
RCANA_MSG6_t_CAN_message_buffer_CONTROL0_BIT_EXTID DEFINE 0
RCANA_MSG6_t_CAN_message_buffer_CONTROL0_BIT_STDID DEFINE 18
RCANA_MSG6_t_CAN_message_buffer_CONTROL0_BIT_RTR DEFINE 30
RCANA_MSG6_t_CAN_message_buffer_CONTROL0_BIT_IDE DEFINE 31
RCANA_MSG6_t_CAN_message_buffer_LAFM_LONG DEFINE 0xFFFFD1A4
RCANA_MSG6_t_CAN_message_buffer_LAFM_BIT_EXTID_LAFM DEFINE 0
RCANA_MSG6_t_CAN_message_buffer_LAFM_BIT_STDID_LAFM DEFINE 18
RCANA_MSG6_t_CAN_message_buffer_LAFM_BIT_IDE_LAFM DEFINE 31
RCANA_MSG6_t_CAN_message_buffer_DATA_LONG DEFINE 0xFFFFD1A8
RCANA_MSG6_t_CAN_message_buffer_DATA_WORD DEFINE 0xFFFFD1A8
RCANA_MSG6_t_CAN_message_buffer_DATA_BYTE DEFINE 0xFFFFD1A8
RCANA_MSG6_t_CAN_message_buffer_CONTROL1_WORD DEFINE 0xFFFFD1B0
RCANA_MSG6_t_CAN_message_buffer_CONTROL1_BIT_MBC DEFINE 0
RCANA_MSG6_t_CAN_message_buffer_CONTROL1_BIT_DART DEFINE 3
RCANA_MSG6_t_CAN_message_buffer_CONTROL1_BIT_ATX DEFINE 4
RCANA_MSG6_t_CAN_message_buffer_CONTROL1_BIT_NMC DEFINE 5
RCANA_MSG6_t_CAN_message_buffer_CONTROL1_BIT_DLC DEFINE 0
RCANA_MSG6_t_CAN_message_buffer_Timestamp DEFINE 0xFFFFD1B2
RCANA_MSG6_t_CAN_message_buffer_TTT DEFINE 0xFFFFD1B4
RCANA_MSG6_t_CAN_message_buffer_TTW_WORD DEFINE 0xFFFFD1B6
RCANA_MSG6_t_CAN_message_buffer_TTW_BIT_rep_factor DEFINE 0
RCANA_MSG6_t_CAN_message_buffer_TTW_BIT_Offset DEFINE 8
RCANA_MSG6_t_CAN_message_buffer_TTW_BIT_TTW DEFINE 14
RCANA_MSG6_t_CAN_message_buffer_wk DEFINE 0xFFFFD1B8
RCANA_MSG7_t_CAN_message_buffer_CONTROL0_LONG DEFINE 0xFFFFD1C0
RCANA_MSG7_t_CAN_message_buffer_CONTROL0_BIT_EXTID DEFINE 0
RCANA_MSG7_t_CAN_message_buffer_CONTROL0_BIT_STDID DEFINE 18
RCANA_MSG7_t_CAN_message_buffer_CONTROL0_BIT_RTR DEFINE 30
RCANA_MSG7_t_CAN_message_buffer_CONTROL0_BIT_IDE DEFINE 31
RCANA_MSG7_t_CAN_message_buffer_LAFM_LONG DEFINE 0xFFFFD1C4
RCANA_MSG7_t_CAN_message_buffer_LAFM_BIT_EXTID_LAFM DEFINE 0
RCANA_MSG7_t_CAN_message_buffer_LAFM_BIT_STDID_LAFM DEFINE 18
RCANA_MSG7_t_CAN_message_buffer_LAFM_BIT_IDE_LAFM DEFINE 31
RCANA_MSG7_t_CAN_message_buffer_DATA_LONG DEFINE 0xFFFFD1C8
RCANA_MSG7_t_CAN_message_buffer_DATA_WORD DEFINE 0xFFFFD1C8
RCANA_MSG7_t_CAN_message_buffer_DATA_BYTE DEFINE 0xFFFFD1C8
RCANA_MSG7_t_CAN_message_buffer_CONTROL1_WORD DEFINE 0xFFFFD1D0
RCANA_MSG7_t_CAN_message_buffer_CONTROL1_BIT_MBC DEFINE 0
RCANA_MSG7_t_CAN_message_buffer_CONTROL1_BIT_DART DEFINE 3
RCANA_MSG7_t_CAN_message_buffer_CONTROL1_BIT_ATX DEFINE 4
RCANA_MSG7_t_CAN_message_buffer_CONTROL1_BIT_NMC DEFINE 5
RCANA_MSG7_t_CAN_message_buffer_CONTROL1_BIT_DLC DEFINE 0
RCANA_MSG7_t_CAN_message_buffer_Timestamp DEFINE 0xFFFFD1D2
RCANA_MSG7_t_CAN_message_buffer_TTT DEFINE 0xFFFFD1D4
RCANA_MSG7_t_CAN_message_buffer_TTW_WORD DEFINE 0xFFFFD1D6
RCANA_MSG7_t_CAN_message_buffer_TTW_BIT_rep_factor DEFINE 0
RCANA_MSG7_t_CAN_message_buffer_TTW_BIT_Offset DEFINE 8
RCANA_MSG7_t_CAN_message_buffer_TTW_BIT_TTW DEFINE 14
RCANA_MSG7_t_CAN_message_buffer_wk DEFINE 0xFFFFD1D8
RCANA_MSG8_t_CAN_message_buffer_CONTROL0_LONG DEFINE 0xFFFFD1E0
RCANA_MSG8_t_CAN_message_buffer_CONTROL0_BIT_EXTID DEFINE 0
RCANA_MSG8_t_CAN_message_buffer_CONTROL0_BIT_STDID DEFINE 18
RCANA_MSG8_t_CAN_message_buffer_CONTROL0_BIT_RTR DEFINE 30
RCANA_MSG8_t_CAN_message_buffer_CONTROL0_BIT_IDE DEFINE 31
RCANA_MSG8_t_CAN_message_buffer_LAFM_LONG DEFINE 0xFFFFD1E4
RCANA_MSG8_t_CAN_message_buffer_LAFM_BIT_EXTID_LAFM DEFINE 0
RCANA_MSG8_t_CAN_message_buffer_LAFM_BIT_STDID_LAFM DEFINE 18
RCANA_MSG8_t_CAN_message_buffer_LAFM_BIT_IDE_LAFM DEFINE 31
RCANA_MSG8_t_CAN_message_buffer_DATA_LONG DEFINE 0xFFFFD1E8
RCANA_MSG8_t_CAN_message_buffer_DATA_WORD DEFINE 0xFFFFD1E8
RCANA_MSG8_t_CAN_message_buffer_DATA_BYTE DEFINE 0xFFFFD1E8
RCANA_MSG8_t_CAN_message_buffer_CONTROL1_WORD DEFINE 0xFFFFD1F0
RCANA_MSG8_t_CAN_message_buffer_CONTROL1_BIT_MBC DEFINE 0
RCANA_MSG8_t_CAN_message_buffer_CONTROL1_BIT_DART DEFINE 3
RCANA_MSG8_t_CAN_message_buffer_CONTROL1_BIT_ATX DEFINE 4
RCANA_MSG8_t_CAN_message_buffer_CONTROL1_BIT_NMC DEFINE 5
RCANA_MSG8_t_CAN_message_buffer_CONTROL1_BIT_DLC DEFINE 0
RCANA_MSG8_t_CAN_message_buffer_Timestamp DEFINE 0xFFFFD1F2
RCANA_MSG8_t_CAN_message_buffer_TTT DEFINE 0xFFFFD1F4
RCANA_MSG8_t_CAN_message_buffer_TTW_WORD DEFINE 0xFFFFD1F6
RCANA_MSG8_t_CAN_message_buffer_TTW_BIT_rep_factor DEFINE 0
RCANA_MSG8_t_CAN_message_buffer_TTW_BIT_Offset DEFINE 8
RCANA_MSG8_t_CAN_message_buffer_TTW_BIT_TTW DEFINE 14
RCANA_MSG8_t_CAN_message_buffer_wk DEFINE 0xFFFFD1F8
RCANA_MSG9_t_CAN_message_buffer_CONTROL0_LONG DEFINE 0xFFFFD200
RCANA_MSG9_t_CAN_message_buffer_CONTROL0_BIT_EXTID DEFINE 0
RCANA_MSG9_t_CAN_message_buffer_CONTROL0_BIT_STDID DEFINE 18
RCANA_MSG9_t_CAN_message_buffer_CONTROL0_BIT_RTR DEFINE 30
RCANA_MSG9_t_CAN_message_buffer_CONTROL0_BIT_IDE DEFINE 31
RCANA_MSG9_t_CAN_message_buffer_LAFM_LONG DEFINE 0xFFFFD204
RCANA_MSG9_t_CAN_message_buffer_LAFM_BIT_EXTID_LAFM DEFINE 0
RCANA_MSG9_t_CAN_message_buffer_LAFM_BIT_STDID_LAFM DEFINE 18
RCANA_MSG9_t_CAN_message_buffer_LAFM_BIT_IDE_LAFM DEFINE 31
RCANA_MSG9_t_CAN_message_buffer_DATA_LONG DEFINE 0xFFFFD208
RCANA_MSG9_t_CAN_message_buffer_DATA_WORD DEFINE 0xFFFFD208
RCANA_MSG9_t_CAN_message_buffer_DATA_BYTE DEFINE 0xFFFFD208
RCANA_MSG9_t_CAN_message_buffer_CONTROL1_WORD DEFINE 0xFFFFD210
RCANA_MSG9_t_CAN_message_buffer_CONTROL1_BIT_MBC DEFINE 0
RCANA_MSG9_t_CAN_message_buffer_CONTROL1_BIT_DART DEFINE 3
RCANA_MSG9_t_CAN_message_buffer_CONTROL1_BIT_ATX DEFINE 4
RCANA_MSG9_t_CAN_message_buffer_CONTROL1_BIT_NMC DEFINE 5
RCANA_MSG9_t_CAN_message_buffer_CONTROL1_BIT_DLC DEFINE 0
RCANA_MSG9_t_CAN_message_buffer_Timestamp DEFINE 0xFFFFD212
RCANA_MSG9_t_CAN_message_buffer_TTT DEFINE 0xFFFFD214
RCANA_MSG9_t_CAN_message_buffer_TTW_WORD DEFINE 0xFFFFD216
RCANA_MSG9_t_CAN_message_buffer_TTW_BIT_rep_factor DEFINE 0
RCANA_MSG9_t_CAN_message_buffer_TTW_BIT_Offset DEFINE 8
RCANA_MSG9_t_CAN_message_buffer_TTW_BIT_TTW DEFINE 14
RCANA_MSG9_t_CAN_message_buffer_wk DEFINE 0xFFFFD218
RCANA_MSG10_t_CAN_message_buffer_CONTROL0_LONG DEFINE 0xFFFFD220
RCANA_MSG10_t_CAN_message_buffer_CONTROL0_BIT_EXTID DEFINE 0
RCANA_MSG10_t_CAN_message_buffer_CONTROL0_BIT_STDID DEFINE 18
RCANA_MSG10_t_CAN_message_buffer_CONTROL0_BIT_RTR DEFINE 30
RCANA_MSG10_t_CAN_message_buffer_CONTROL0_BIT_IDE DEFINE 31
RCANA_MSG10_t_CAN_message_buffer_LAFM_LONG DEFINE 0xFFFFD224
RCANA_MSG10_t_CAN_message_buffer_LAFM_BIT_EXTID_LAFM DEFINE 0
RCANA_MSG10_t_CAN_message_buffer_LAFM_BIT_STDID_LAFM DEFINE 18
RCANA_MSG10_t_CAN_message_buffer_LAFM_BIT_IDE_LAFM DEFINE 31
RCANA_MSG10_t_CAN_message_buffer_DATA_LONG DEFINE 0xFFFFD228
RCANA_MSG10_t_CAN_message_buffer_DATA_WORD DEFINE 0xFFFFD228
RCANA_MSG10_t_CAN_message_buffer_DATA_BYTE DEFINE 0xFFFFD228
RCANA_MSG10_t_CAN_message_buffer_CONTROL1_WORD DEFINE 0xFFFFD230
RCANA_MSG10_t_CAN_message_buffer_CONTROL1_BIT_MBC DEFINE 0
RCANA_MSG10_t_CAN_message_buffer_CONTROL1_BIT_DART DEFINE 3
RCANA_MSG10_t_CAN_message_buffer_CONTROL1_BIT_ATX DEFINE 4
RCANA_MSG10_t_CAN_message_buffer_CONTROL1_BIT_NMC DEFINE 5
RCANA_MSG10_t_CAN_message_buffer_CONTROL1_BIT_DLC DEFINE 0
RCANA_MSG10_t_CAN_message_buffer_Timestamp DEFINE 0xFFFFD232
RCANA_MSG10_t_CAN_message_buffer_TTT DEFINE 0xFFFFD234
RCANA_MSG10_t_CAN_message_buffer_TTW_WORD DEFINE 0xFFFFD236
RCANA_MSG10_t_CAN_message_buffer_TTW_BIT_rep_factor DEFINE 0
RCANA_MSG10_t_CAN_message_buffer_TTW_BIT_Offset DEFINE 8
RCANA_MSG10_t_CAN_message_buffer_TTW_BIT_TTW DEFINE 14
RCANA_MSG10_t_CAN_message_buffer_wk DEFINE 0xFFFFD238
RCANA_MSG11_t_CAN_message_buffer_CONTROL0_LONG DEFINE 0xFFFFD240
RCANA_MSG11_t_CAN_message_buffer_CONTROL0_BIT_EXTID DEFINE 0
RCANA_MSG11_t_CAN_message_buffer_CONTROL0_BIT_STDID DEFINE 18
RCANA_MSG11_t_CAN_message_buffer_CONTROL0_BIT_RTR DEFINE 30
RCANA_MSG11_t_CAN_message_buffer_CONTROL0_BIT_IDE DEFINE 31
RCANA_MSG11_t_CAN_message_buffer_LAFM_LONG DEFINE 0xFFFFD244
RCANA_MSG11_t_CAN_message_buffer_LAFM_BIT_EXTID_LAFM DEFINE 0
RCANA_MSG11_t_CAN_message_buffer_LAFM_BIT_STDID_LAFM DEFINE 18
RCANA_MSG11_t_CAN_message_buffer_LAFM_BIT_IDE_LAFM DEFINE 31
RCANA_MSG11_t_CAN_message_buffer_DATA_LONG DEFINE 0xFFFFD248
RCANA_MSG11_t_CAN_message_buffer_DATA_WORD DEFINE 0xFFFFD248
RCANA_MSG11_t_CAN_message_buffer_DATA_BYTE DEFINE 0xFFFFD248
RCANA_MSG11_t_CAN_message_buffer_CONTROL1_WORD DEFINE 0xFFFFD250
RCANA_MSG11_t_CAN_message_buffer_CONTROL1_BIT_MBC DEFINE 0
RCANA_MSG11_t_CAN_message_buffer_CONTROL1_BIT_DART DEFINE 3
RCANA_MSG11_t_CAN_message_buffer_CONTROL1_BIT_ATX DEFINE 4
RCANA_MSG11_t_CAN_message_buffer_CONTROL1_BIT_NMC DEFINE 5
RCANA_MSG11_t_CAN_message_buffer_CONTROL1_BIT_DLC DEFINE 0
RCANA_MSG11_t_CAN_message_buffer_Timestamp DEFINE 0xFFFFD252
RCANA_MSG11_t_CAN_message_buffer_TTT DEFINE 0xFFFFD254
RCANA_MSG11_t_CAN_message_buffer_TTW_WORD DEFINE 0xFFFFD256
RCANA_MSG11_t_CAN_message_buffer_TTW_BIT_rep_factor DEFINE 0
RCANA_MSG11_t_CAN_message_buffer_TTW_BIT_Offset DEFINE 8
RCANA_MSG11_t_CAN_message_buffer_TTW_BIT_TTW DEFINE 14
RCANA_MSG11_t_CAN_message_buffer_wk DEFINE 0xFFFFD258
RCANA_MSG12_t_CAN_message_buffer_CONTROL0_LONG DEFINE 0xFFFFD260
RCANA_MSG12_t_CAN_message_buffer_CONTROL0_BIT_EXTID DEFINE 0
RCANA_MSG12_t_CAN_message_buffer_CONTROL0_BIT_STDID DEFINE 18
RCANA_MSG12_t_CAN_message_buffer_CONTROL0_BIT_RTR DEFINE 30
RCANA_MSG12_t_CAN_message_buffer_CONTROL0_BIT_IDE DEFINE 31
RCANA_MSG12_t_CAN_message_buffer_LAFM_LONG DEFINE 0xFFFFD264
RCANA_MSG12_t_CAN_message_buffer_LAFM_BIT_EXTID_LAFM DEFINE 0
RCANA_MSG12_t_CAN_message_buffer_LAFM_BIT_STDID_LAFM DEFINE 18
RCANA_MSG12_t_CAN_message_buffer_LAFM_BIT_IDE_LAFM DEFINE 31
RCANA_MSG12_t_CAN_message_buffer_DATA_LONG DEFINE 0xFFFFD268
RCANA_MSG12_t_CAN_message_buffer_DATA_WORD DEFINE 0xFFFFD268
RCANA_MSG12_t_CAN_message_buffer_DATA_BYTE DEFINE 0xFFFFD268
RCANA_MSG12_t_CAN_message_buffer_CONTROL1_WORD DEFINE 0xFFFFD270
RCANA_MSG12_t_CAN_message_buffer_CONTROL1_BIT_MBC DEFINE 0
RCANA_MSG12_t_CAN_message_buffer_CONTROL1_BIT_DART DEFINE 3
RCANA_MSG12_t_CAN_message_buffer_CONTROL1_BIT_ATX DEFINE 4
RCANA_MSG12_t_CAN_message_buffer_CONTROL1_BIT_NMC DEFINE 5
RCANA_MSG12_t_CAN_message_buffer_CONTROL1_BIT_DLC DEFINE 0
RCANA_MSG12_t_CAN_message_buffer_Timestamp DEFINE 0xFFFFD272
RCANA_MSG12_t_CAN_message_buffer_TTT DEFINE 0xFFFFD274
RCANA_MSG12_t_CAN_message_buffer_TTW_WORD DEFINE 0xFFFFD276
RCANA_MSG12_t_CAN_message_buffer_TTW_BIT_rep_factor DEFINE 0
RCANA_MSG12_t_CAN_message_buffer_TTW_BIT_Offset DEFINE 8
RCANA_MSG12_t_CAN_message_buffer_TTW_BIT_TTW DEFINE 14
RCANA_MSG12_t_CAN_message_buffer_wk DEFINE 0xFFFFD278
RCANA_MSG13_t_CAN_message_buffer_CONTROL0_LONG DEFINE 0xFFFFD280
RCANA_MSG13_t_CAN_message_buffer_CONTROL0_BIT_EXTID DEFINE 0
RCANA_MSG13_t_CAN_message_buffer_CONTROL0_BIT_STDID DEFINE 18
RCANA_MSG13_t_CAN_message_buffer_CONTROL0_BIT_RTR DEFINE 30
RCANA_MSG13_t_CAN_message_buffer_CONTROL0_BIT_IDE DEFINE 31
RCANA_MSG13_t_CAN_message_buffer_LAFM_LONG DEFINE 0xFFFFD284
RCANA_MSG13_t_CAN_message_buffer_LAFM_BIT_EXTID_LAFM DEFINE 0
RCANA_MSG13_t_CAN_message_buffer_LAFM_BIT_STDID_LAFM DEFINE 18
RCANA_MSG13_t_CAN_message_buffer_LAFM_BIT_IDE_LAFM DEFINE 31
RCANA_MSG13_t_CAN_message_buffer_DATA_LONG DEFINE 0xFFFFD288
RCANA_MSG13_t_CAN_message_buffer_DATA_WORD DEFINE 0xFFFFD288
RCANA_MSG13_t_CAN_message_buffer_DATA_BYTE DEFINE 0xFFFFD288
RCANA_MSG13_t_CAN_message_buffer_CONTROL1_WORD DEFINE 0xFFFFD290
RCANA_MSG13_t_CAN_message_buffer_CONTROL1_BIT_MBC DEFINE 0
RCANA_MSG13_t_CAN_message_buffer_CONTROL1_BIT_DART DEFINE 3
RCANA_MSG13_t_CAN_message_buffer_CONTROL1_BIT_ATX DEFINE 4
RCANA_MSG13_t_CAN_message_buffer_CONTROL1_BIT_NMC DEFINE 5
RCANA_MSG13_t_CAN_message_buffer_CONTROL1_BIT_DLC DEFINE 0
RCANA_MSG13_t_CAN_message_buffer_Timestamp DEFINE 0xFFFFD292
RCANA_MSG13_t_CAN_message_buffer_TTT DEFINE 0xFFFFD294
RCANA_MSG13_t_CAN_message_buffer_TTW_WORD DEFINE 0xFFFFD296
RCANA_MSG13_t_CAN_message_buffer_TTW_BIT_rep_factor DEFINE 0
RCANA_MSG13_t_CAN_message_buffer_TTW_BIT_Offset DEFINE 8
RCANA_MSG13_t_CAN_message_buffer_TTW_BIT_TTW DEFINE 14
RCANA_MSG13_t_CAN_message_buffer_wk DEFINE 0xFFFFD298
RCANA_MSG14_t_CAN_message_buffer_CONTROL0_LONG DEFINE 0xFFFFD2A0
RCANA_MSG14_t_CAN_message_buffer_CONTROL0_BIT_EXTID DEFINE 0
RCANA_MSG14_t_CAN_message_buffer_CONTROL0_BIT_STDID DEFINE 18
RCANA_MSG14_t_CAN_message_buffer_CONTROL0_BIT_RTR DEFINE 30
RCANA_MSG14_t_CAN_message_buffer_CONTROL0_BIT_IDE DEFINE 31
RCANA_MSG14_t_CAN_message_buffer_LAFM_LONG DEFINE 0xFFFFD2A4
RCANA_MSG14_t_CAN_message_buffer_LAFM_BIT_EXTID_LAFM DEFINE 0
RCANA_MSG14_t_CAN_message_buffer_LAFM_BIT_STDID_LAFM DEFINE 18
RCANA_MSG14_t_CAN_message_buffer_LAFM_BIT_IDE_LAFM DEFINE 31
RCANA_MSG14_t_CAN_message_buffer_DATA_LONG DEFINE 0xFFFFD2A8
RCANA_MSG14_t_CAN_message_buffer_DATA_WORD DEFINE 0xFFFFD2A8
RCANA_MSG14_t_CAN_message_buffer_DATA_BYTE DEFINE 0xFFFFD2A8
RCANA_MSG14_t_CAN_message_buffer_CONTROL1_WORD DEFINE 0xFFFFD2B0
RCANA_MSG14_t_CAN_message_buffer_CONTROL1_BIT_MBC DEFINE 0
RCANA_MSG14_t_CAN_message_buffer_CONTROL1_BIT_DART DEFINE 3
RCANA_MSG14_t_CAN_message_buffer_CONTROL1_BIT_ATX DEFINE 4
RCANA_MSG14_t_CAN_message_buffer_CONTROL1_BIT_NMC DEFINE 5
RCANA_MSG14_t_CAN_message_buffer_CONTROL1_BIT_DLC DEFINE 0
RCANA_MSG14_t_CAN_message_buffer_Timestamp DEFINE 0xFFFFD2B2
RCANA_MSG14_t_CAN_message_buffer_TTT DEFINE 0xFFFFD2B4
RCANA_MSG14_t_CAN_message_buffer_TTW_WORD DEFINE 0xFFFFD2B6
RCANA_MSG14_t_CAN_message_buffer_TTW_BIT_rep_factor DEFINE 0
RCANA_MSG14_t_CAN_message_buffer_TTW_BIT_Offset DEFINE 8
RCANA_MSG14_t_CAN_message_buffer_TTW_BIT_TTW DEFINE 14
RCANA_MSG14_t_CAN_message_buffer_wk DEFINE 0xFFFFD2B8
RCANA_MSG15_t_CAN_message_buffer_CONTROL0_LONG DEFINE 0xFFFFD2C0
RCANA_MSG15_t_CAN_message_buffer_CONTROL0_BIT_EXTID DEFINE 0
RCANA_MSG15_t_CAN_message_buffer_CONTROL0_BIT_STDID DEFINE 18
RCANA_MSG15_t_CAN_message_buffer_CONTROL0_BIT_RTR DEFINE 30
RCANA_MSG15_t_CAN_message_buffer_CONTROL0_BIT_IDE DEFINE 31
RCANA_MSG15_t_CAN_message_buffer_LAFM_LONG DEFINE 0xFFFFD2C4
RCANA_MSG15_t_CAN_message_buffer_LAFM_BIT_EXTID_LAFM DEFINE 0
RCANA_MSG15_t_CAN_message_buffer_LAFM_BIT_STDID_LAFM DEFINE 18
RCANA_MSG15_t_CAN_message_buffer_LAFM_BIT_IDE_LAFM DEFINE 31
RCANA_MSG15_t_CAN_message_buffer_DATA_LONG DEFINE 0xFFFFD2C8
RCANA_MSG15_t_CAN_message_buffer_DATA_WORD DEFINE 0xFFFFD2C8
RCANA_MSG15_t_CAN_message_buffer_DATA_BYTE DEFINE 0xFFFFD2C8
RCANA_MSG15_t_CAN_message_buffer_CONTROL1_WORD DEFINE 0xFFFFD2D0
RCANA_MSG15_t_CAN_message_buffer_CONTROL1_BIT_MBC DEFINE 0
RCANA_MSG15_t_CAN_message_buffer_CONTROL1_BIT_DART DEFINE 3
RCANA_MSG15_t_CAN_message_buffer_CONTROL1_BIT_ATX DEFINE 4
RCANA_MSG15_t_CAN_message_buffer_CONTROL1_BIT_NMC DEFINE 5
RCANA_MSG15_t_CAN_message_buffer_CONTROL1_BIT_DLC DEFINE 0
RCANA_MSG15_t_CAN_message_buffer_Timestamp DEFINE 0xFFFFD2D2
RCANA_MSG15_t_CAN_message_buffer_TTT DEFINE 0xFFFFD2D4
RCANA_MSG15_t_CAN_message_buffer_TTW_WORD DEFINE 0xFFFFD2D6
RCANA_MSG15_t_CAN_message_buffer_TTW_BIT_rep_factor DEFINE 0
RCANA_MSG15_t_CAN_message_buffer_TTW_BIT_Offset DEFINE 8
RCANA_MSG15_t_CAN_message_buffer_TTW_BIT_TTW DEFINE 14
RCANA_MSG15_t_CAN_message_buffer_wk DEFINE 0xFFFFD2D8
RCANA_MSG16_t_CAN_message_buffer_CONTROL0_LONG DEFINE 0xFFFFD2E0
RCANA_MSG16_t_CAN_message_buffer_CONTROL0_BIT_EXTID DEFINE 0
RCANA_MSG16_t_CAN_message_buffer_CONTROL0_BIT_STDID DEFINE 18
RCANA_MSG16_t_CAN_message_buffer_CONTROL0_BIT_RTR DEFINE 30
RCANA_MSG16_t_CAN_message_buffer_CONTROL0_BIT_IDE DEFINE 31
RCANA_MSG16_t_CAN_message_buffer_LAFM_LONG DEFINE 0xFFFFD2E4
RCANA_MSG16_t_CAN_message_buffer_LAFM_BIT_EXTID_LAFM DEFINE 0
RCANA_MSG16_t_CAN_message_buffer_LAFM_BIT_STDID_LAFM DEFINE 18
RCANA_MSG16_t_CAN_message_buffer_LAFM_BIT_IDE_LAFM DEFINE 31
RCANA_MSG16_t_CAN_message_buffer_DATA_LONG DEFINE 0xFFFFD2E8
RCANA_MSG16_t_CAN_message_buffer_DATA_WORD DEFINE 0xFFFFD2E8
RCANA_MSG16_t_CAN_message_buffer_DATA_BYTE DEFINE 0xFFFFD2E8
RCANA_MSG16_t_CAN_message_buffer_CONTROL1_WORD DEFINE 0xFFFFD2F0
RCANA_MSG16_t_CAN_message_buffer_CONTROL1_BIT_MBC DEFINE 0
RCANA_MSG16_t_CAN_message_buffer_CONTROL1_BIT_DART DEFINE 3
RCANA_MSG16_t_CAN_message_buffer_CONTROL1_BIT_ATX DEFINE 4
RCANA_MSG16_t_CAN_message_buffer_CONTROL1_BIT_NMC DEFINE 5
RCANA_MSG16_t_CAN_message_buffer_CONTROL1_BIT_DLC DEFINE 0
RCANA_MSG16_t_CAN_message_buffer_Timestamp DEFINE 0xFFFFD2F2
RCANA_MSG16_t_CAN_message_buffer_TTT DEFINE 0xFFFFD2F4
RCANA_MSG16_t_CAN_message_buffer_TTW_WORD DEFINE 0xFFFFD2F6
RCANA_MSG16_t_CAN_message_buffer_TTW_BIT_rep_factor DEFINE 0
RCANA_MSG16_t_CAN_message_buffer_TTW_BIT_Offset DEFINE 8
RCANA_MSG16_t_CAN_message_buffer_TTW_BIT_TTW DEFINE 14
RCANA_MSG16_t_CAN_message_buffer_wk DEFINE 0xFFFFD2F8
RCANA_MSG17_t_CAN_message_buffer_CONTROL0_LONG DEFINE 0xFFFFD300
RCANA_MSG17_t_CAN_message_buffer_CONTROL0_BIT_EXTID DEFINE 0
RCANA_MSG17_t_CAN_message_buffer_CONTROL0_BIT_STDID DEFINE 18
RCANA_MSG17_t_CAN_message_buffer_CONTROL0_BIT_RTR DEFINE 30
RCANA_MSG17_t_CAN_message_buffer_CONTROL0_BIT_IDE DEFINE 31
RCANA_MSG17_t_CAN_message_buffer_LAFM_LONG DEFINE 0xFFFFD304
RCANA_MSG17_t_CAN_message_buffer_LAFM_BIT_EXTID_LAFM DEFINE 0
RCANA_MSG17_t_CAN_message_buffer_LAFM_BIT_STDID_LAFM DEFINE 18
RCANA_MSG17_t_CAN_message_buffer_LAFM_BIT_IDE_LAFM DEFINE 31
RCANA_MSG17_t_CAN_message_buffer_DATA_LONG DEFINE 0xFFFFD308
RCANA_MSG17_t_CAN_message_buffer_DATA_WORD DEFINE 0xFFFFD308
RCANA_MSG17_t_CAN_message_buffer_DATA_BYTE DEFINE 0xFFFFD308
RCANA_MSG17_t_CAN_message_buffer_CONTROL1_WORD DEFINE 0xFFFFD310
RCANA_MSG17_t_CAN_message_buffer_CONTROL1_BIT_MBC DEFINE 0
RCANA_MSG17_t_CAN_message_buffer_CONTROL1_BIT_DART DEFINE 3
RCANA_MSG17_t_CAN_message_buffer_CONTROL1_BIT_ATX DEFINE 4
RCANA_MSG17_t_CAN_message_buffer_CONTROL1_BIT_NMC DEFINE 5
RCANA_MSG17_t_CAN_message_buffer_CONTROL1_BIT_DLC DEFINE 0
RCANA_MSG17_t_CAN_message_buffer_Timestamp DEFINE 0xFFFFD312
RCANA_MSG17_t_CAN_message_buffer_TTT DEFINE 0xFFFFD314
RCANA_MSG17_t_CAN_message_buffer_TTW_WORD DEFINE 0xFFFFD316
RCANA_MSG17_t_CAN_message_buffer_TTW_BIT_rep_factor DEFINE 0
RCANA_MSG17_t_CAN_message_buffer_TTW_BIT_Offset DEFINE 8
RCANA_MSG17_t_CAN_message_buffer_TTW_BIT_TTW DEFINE 14
RCANA_MSG17_t_CAN_message_buffer_wk DEFINE 0xFFFFD318
RCANA_MSG18_t_CAN_message_buffer_CONTROL0_LONG DEFINE 0xFFFFD320
RCANA_MSG18_t_CAN_message_buffer_CONTROL0_BIT_EXTID DEFINE 0
RCANA_MSG18_t_CAN_message_buffer_CONTROL0_BIT_STDID DEFINE 18
RCANA_MSG18_t_CAN_message_buffer_CONTROL0_BIT_RTR DEFINE 30
RCANA_MSG18_t_CAN_message_buffer_CONTROL0_BIT_IDE DEFINE 31
RCANA_MSG18_t_CAN_message_buffer_LAFM_LONG DEFINE 0xFFFFD324
RCANA_MSG18_t_CAN_message_buffer_LAFM_BIT_EXTID_LAFM DEFINE 0
RCANA_MSG18_t_CAN_message_buffer_LAFM_BIT_STDID_LAFM DEFINE 18
RCANA_MSG18_t_CAN_message_buffer_LAFM_BIT_IDE_LAFM DEFINE 31
RCANA_MSG18_t_CAN_message_buffer_DATA_LONG DEFINE 0xFFFFD328
RCANA_MSG18_t_CAN_message_buffer_DATA_WORD DEFINE 0xFFFFD328
RCANA_MSG18_t_CAN_message_buffer_DATA_BYTE DEFINE 0xFFFFD328
RCANA_MSG18_t_CAN_message_buffer_CONTROL1_WORD DEFINE 0xFFFFD330
RCANA_MSG18_t_CAN_message_buffer_CONTROL1_BIT_MBC DEFINE 0
RCANA_MSG18_t_CAN_message_buffer_CONTROL1_BIT_DART DEFINE 3
RCANA_MSG18_t_CAN_message_buffer_CONTROL1_BIT_ATX DEFINE 4
RCANA_MSG18_t_CAN_message_buffer_CONTROL1_BIT_NMC DEFINE 5
RCANA_MSG18_t_CAN_message_buffer_CONTROL1_BIT_DLC DEFINE 0
RCANA_MSG18_t_CAN_message_buffer_Timestamp DEFINE 0xFFFFD332
RCANA_MSG18_t_CAN_message_buffer_TTT DEFINE 0xFFFFD334
RCANA_MSG18_t_CAN_message_buffer_TTW_WORD DEFINE 0xFFFFD336
RCANA_MSG18_t_CAN_message_buffer_TTW_BIT_rep_factor DEFINE 0
RCANA_MSG18_t_CAN_message_buffer_TTW_BIT_Offset DEFINE 8
RCANA_MSG18_t_CAN_message_buffer_TTW_BIT_TTW DEFINE 14
RCANA_MSG18_t_CAN_message_buffer_wk DEFINE 0xFFFFD338
RCANA_MSG19_t_CAN_message_buffer_CONTROL0_LONG DEFINE 0xFFFFD340
RCANA_MSG19_t_CAN_message_buffer_CONTROL0_BIT_EXTID DEFINE 0
RCANA_MSG19_t_CAN_message_buffer_CONTROL0_BIT_STDID DEFINE 18
RCANA_MSG19_t_CAN_message_buffer_CONTROL0_BIT_RTR DEFINE 30
RCANA_MSG19_t_CAN_message_buffer_CONTROL0_BIT_IDE DEFINE 31
RCANA_MSG19_t_CAN_message_buffer_LAFM_LONG DEFINE 0xFFFFD344
RCANA_MSG19_t_CAN_message_buffer_LAFM_BIT_EXTID_LAFM DEFINE 0
RCANA_MSG19_t_CAN_message_buffer_LAFM_BIT_STDID_LAFM DEFINE 18
RCANA_MSG19_t_CAN_message_buffer_LAFM_BIT_IDE_LAFM DEFINE 31
RCANA_MSG19_t_CAN_message_buffer_DATA_LONG DEFINE 0xFFFFD348
RCANA_MSG19_t_CAN_message_buffer_DATA_WORD DEFINE 0xFFFFD348
RCANA_MSG19_t_CAN_message_buffer_DATA_BYTE DEFINE 0xFFFFD348
RCANA_MSG19_t_CAN_message_buffer_CONTROL1_WORD DEFINE 0xFFFFD350
RCANA_MSG19_t_CAN_message_buffer_CONTROL1_BIT_MBC DEFINE 0
RCANA_MSG19_t_CAN_message_buffer_CONTROL1_BIT_DART DEFINE 3
RCANA_MSG19_t_CAN_message_buffer_CONTROL1_BIT_ATX DEFINE 4
RCANA_MSG19_t_CAN_message_buffer_CONTROL1_BIT_NMC DEFINE 5
RCANA_MSG19_t_CAN_message_buffer_CONTROL1_BIT_DLC DEFINE 0
RCANA_MSG19_t_CAN_message_buffer_Timestamp DEFINE 0xFFFFD352
RCANA_MSG19_t_CAN_message_buffer_TTT DEFINE 0xFFFFD354
RCANA_MSG19_t_CAN_message_buffer_TTW_WORD DEFINE 0xFFFFD356
RCANA_MSG19_t_CAN_message_buffer_TTW_BIT_rep_factor DEFINE 0
RCANA_MSG19_t_CAN_message_buffer_TTW_BIT_Offset DEFINE 8
RCANA_MSG19_t_CAN_message_buffer_TTW_BIT_TTW DEFINE 14
RCANA_MSG19_t_CAN_message_buffer_wk DEFINE 0xFFFFD358
RCANA_MSG20_t_CAN_message_buffer_CONTROL0_LONG DEFINE 0xFFFFD360
RCANA_MSG20_t_CAN_message_buffer_CONTROL0_BIT_EXTID DEFINE 0
RCANA_MSG20_t_CAN_message_buffer_CONTROL0_BIT_STDID DEFINE 18
RCANA_MSG20_t_CAN_message_buffer_CONTROL0_BIT_RTR DEFINE 30
RCANA_MSG20_t_CAN_message_buffer_CONTROL0_BIT_IDE DEFINE 31
RCANA_MSG20_t_CAN_message_buffer_LAFM_LONG DEFINE 0xFFFFD364
RCANA_MSG20_t_CAN_message_buffer_LAFM_BIT_EXTID_LAFM DEFINE 0
RCANA_MSG20_t_CAN_message_buffer_LAFM_BIT_STDID_LAFM DEFINE 18
RCANA_MSG20_t_CAN_message_buffer_LAFM_BIT_IDE_LAFM DEFINE 31
RCANA_MSG20_t_CAN_message_buffer_DATA_LONG DEFINE 0xFFFFD368
RCANA_MSG20_t_CAN_message_buffer_DATA_WORD DEFINE 0xFFFFD368
RCANA_MSG20_t_CAN_message_buffer_DATA_BYTE DEFINE 0xFFFFD368
RCANA_MSG20_t_CAN_message_buffer_CONTROL1_WORD DEFINE 0xFFFFD370
RCANA_MSG20_t_CAN_message_buffer_CONTROL1_BIT_MBC DEFINE 0
RCANA_MSG20_t_CAN_message_buffer_CONTROL1_BIT_DART DEFINE 3
RCANA_MSG20_t_CAN_message_buffer_CONTROL1_BIT_ATX DEFINE 4
RCANA_MSG20_t_CAN_message_buffer_CONTROL1_BIT_NMC DEFINE 5
RCANA_MSG20_t_CAN_message_buffer_CONTROL1_BIT_DLC DEFINE 0
RCANA_MSG20_t_CAN_message_buffer_Timestamp DEFINE 0xFFFFD372
RCANA_MSG20_t_CAN_message_buffer_TTT DEFINE 0xFFFFD374
RCANA_MSG20_t_CAN_message_buffer_TTW_WORD DEFINE 0xFFFFD376
RCANA_MSG20_t_CAN_message_buffer_TTW_BIT_rep_factor DEFINE 0
RCANA_MSG20_t_CAN_message_buffer_TTW_BIT_Offset DEFINE 8
RCANA_MSG20_t_CAN_message_buffer_TTW_BIT_TTW DEFINE 14
RCANA_MSG20_t_CAN_message_buffer_wk DEFINE 0xFFFFD378
RCANA_MSG21_t_CAN_message_buffer_CONTROL0_LONG DEFINE 0xFFFFD380
RCANA_MSG21_t_CAN_message_buffer_CONTROL0_BIT_EXTID DEFINE 0
RCANA_MSG21_t_CAN_message_buffer_CONTROL0_BIT_STDID DEFINE 18
RCANA_MSG21_t_CAN_message_buffer_CONTROL0_BIT_RTR DEFINE 30
RCANA_MSG21_t_CAN_message_buffer_CONTROL0_BIT_IDE DEFINE 31
RCANA_MSG21_t_CAN_message_buffer_LAFM_LONG DEFINE 0xFFFFD384
RCANA_MSG21_t_CAN_message_buffer_LAFM_BIT_EXTID_LAFM DEFINE 0
RCANA_MSG21_t_CAN_message_buffer_LAFM_BIT_STDID_LAFM DEFINE 18
RCANA_MSG21_t_CAN_message_buffer_LAFM_BIT_IDE_LAFM DEFINE 31
RCANA_MSG21_t_CAN_message_buffer_DATA_LONG DEFINE 0xFFFFD388
RCANA_MSG21_t_CAN_message_buffer_DATA_WORD DEFINE 0xFFFFD388
RCANA_MSG21_t_CAN_message_buffer_DATA_BYTE DEFINE 0xFFFFD388
RCANA_MSG21_t_CAN_message_buffer_CONTROL1_WORD DEFINE 0xFFFFD390
RCANA_MSG21_t_CAN_message_buffer_CONTROL1_BIT_MBC DEFINE 0
RCANA_MSG21_t_CAN_message_buffer_CONTROL1_BIT_DART DEFINE 3
RCANA_MSG21_t_CAN_message_buffer_CONTROL1_BIT_ATX DEFINE 4
RCANA_MSG21_t_CAN_message_buffer_CONTROL1_BIT_NMC DEFINE 5
RCANA_MSG21_t_CAN_message_buffer_CONTROL1_BIT_DLC DEFINE 0
RCANA_MSG21_t_CAN_message_buffer_Timestamp DEFINE 0xFFFFD392
RCANA_MSG21_t_CAN_message_buffer_TTT DEFINE 0xFFFFD394
RCANA_MSG21_t_CAN_message_buffer_TTW_WORD DEFINE 0xFFFFD396
RCANA_MSG21_t_CAN_message_buffer_TTW_BIT_rep_factor DEFINE 0
RCANA_MSG21_t_CAN_message_buffer_TTW_BIT_Offset DEFINE 8
RCANA_MSG21_t_CAN_message_buffer_TTW_BIT_TTW DEFINE 14
RCANA_MSG21_t_CAN_message_buffer_wk DEFINE 0xFFFFD398
RCANA_MSG22_t_CAN_message_buffer_CONTROL0_LONG DEFINE 0xFFFFD3A0
RCANA_MSG22_t_CAN_message_buffer_CONTROL0_BIT_EXTID DEFINE 0
RCANA_MSG22_t_CAN_message_buffer_CONTROL0_BIT_STDID DEFINE 18
RCANA_MSG22_t_CAN_message_buffer_CONTROL0_BIT_RTR DEFINE 30
RCANA_MSG22_t_CAN_message_buffer_CONTROL0_BIT_IDE DEFINE 31
RCANA_MSG22_t_CAN_message_buffer_LAFM_LONG DEFINE 0xFFFFD3A4
RCANA_MSG22_t_CAN_message_buffer_LAFM_BIT_EXTID_LAFM DEFINE 0
RCANA_MSG22_t_CAN_message_buffer_LAFM_BIT_STDID_LAFM DEFINE 18
RCANA_MSG22_t_CAN_message_buffer_LAFM_BIT_IDE_LAFM DEFINE 31
RCANA_MSG22_t_CAN_message_buffer_DATA_LONG DEFINE 0xFFFFD3A8
RCANA_MSG22_t_CAN_message_buffer_DATA_WORD DEFINE 0xFFFFD3A8
RCANA_MSG22_t_CAN_message_buffer_DATA_BYTE DEFINE 0xFFFFD3A8
RCANA_MSG22_t_CAN_message_buffer_CONTROL1_WORD DEFINE 0xFFFFD3B0
RCANA_MSG22_t_CAN_message_buffer_CONTROL1_BIT_MBC DEFINE 0
RCANA_MSG22_t_CAN_message_buffer_CONTROL1_BIT_DART DEFINE 3
RCANA_MSG22_t_CAN_message_buffer_CONTROL1_BIT_ATX DEFINE 4
RCANA_MSG22_t_CAN_message_buffer_CONTROL1_BIT_NMC DEFINE 5
RCANA_MSG22_t_CAN_message_buffer_CONTROL1_BIT_DLC DEFINE 0
RCANA_MSG22_t_CAN_message_buffer_Timestamp DEFINE 0xFFFFD3B2
RCANA_MSG22_t_CAN_message_buffer_TTT DEFINE 0xFFFFD3B4
RCANA_MSG22_t_CAN_message_buffer_TTW_WORD DEFINE 0xFFFFD3B6
RCANA_MSG22_t_CAN_message_buffer_TTW_BIT_rep_factor DEFINE 0
RCANA_MSG22_t_CAN_message_buffer_TTW_BIT_Offset DEFINE 8
RCANA_MSG22_t_CAN_message_buffer_TTW_BIT_TTW DEFINE 14
RCANA_MSG22_t_CAN_message_buffer_wk DEFINE 0xFFFFD3B8
RCANA_MSG23_t_CAN_message_buffer_CONTROL0_LONG DEFINE 0xFFFFD3C0
RCANA_MSG23_t_CAN_message_buffer_CONTROL0_BIT_EXTID DEFINE 0
RCANA_MSG23_t_CAN_message_buffer_CONTROL0_BIT_STDID DEFINE 18
RCANA_MSG23_t_CAN_message_buffer_CONTROL0_BIT_RTR DEFINE 30
RCANA_MSG23_t_CAN_message_buffer_CONTROL0_BIT_IDE DEFINE 31
RCANA_MSG23_t_CAN_message_buffer_LAFM_LONG DEFINE 0xFFFFD3C4
RCANA_MSG23_t_CAN_message_buffer_LAFM_BIT_EXTID_LAFM DEFINE 0
RCANA_MSG23_t_CAN_message_buffer_LAFM_BIT_STDID_LAFM DEFINE 18
RCANA_MSG23_t_CAN_message_buffer_LAFM_BIT_IDE_LAFM DEFINE 31
RCANA_MSG23_t_CAN_message_buffer_DATA_LONG DEFINE 0xFFFFD3C8
RCANA_MSG23_t_CAN_message_buffer_DATA_WORD DEFINE 0xFFFFD3C8
RCANA_MSG23_t_CAN_message_buffer_DATA_BYTE DEFINE 0xFFFFD3C8
RCANA_MSG23_t_CAN_message_buffer_CONTROL1_WORD DEFINE 0xFFFFD3D0
RCANA_MSG23_t_CAN_message_buffer_CONTROL1_BIT_MBC DEFINE 0
RCANA_MSG23_t_CAN_message_buffer_CONTROL1_BIT_DART DEFINE 3
RCANA_MSG23_t_CAN_message_buffer_CONTROL1_BIT_ATX DEFINE 4
RCANA_MSG23_t_CAN_message_buffer_CONTROL1_BIT_NMC DEFINE 5
RCANA_MSG23_t_CAN_message_buffer_CONTROL1_BIT_DLC DEFINE 0
RCANA_MSG23_t_CAN_message_buffer_Timestamp DEFINE 0xFFFFD3D2
RCANA_MSG23_t_CAN_message_buffer_TTT DEFINE 0xFFFFD3D4
RCANA_MSG23_t_CAN_message_buffer_TTW_WORD DEFINE 0xFFFFD3D6
RCANA_MSG23_t_CAN_message_buffer_TTW_BIT_rep_factor DEFINE 0
RCANA_MSG23_t_CAN_message_buffer_TTW_BIT_Offset DEFINE 8
RCANA_MSG23_t_CAN_message_buffer_TTW_BIT_TTW DEFINE 14
RCANA_MSG23_t_CAN_message_buffer_wk DEFINE 0xFFFFD3D8
RCANA_MSG24_t_CAN_message_buffer_CONTROL0_LONG DEFINE 0xFFFFD3E0
RCANA_MSG24_t_CAN_message_buffer_CONTROL0_BIT_EXTID DEFINE 0
RCANA_MSG24_t_CAN_message_buffer_CONTROL0_BIT_STDID DEFINE 18
RCANA_MSG24_t_CAN_message_buffer_CONTROL0_BIT_RTR DEFINE 30
RCANA_MSG24_t_CAN_message_buffer_CONTROL0_BIT_IDE DEFINE 31
RCANA_MSG24_t_CAN_message_buffer_LAFM_LONG DEFINE 0xFFFFD3E4
RCANA_MSG24_t_CAN_message_buffer_LAFM_BIT_EXTID_LAFM DEFINE 0
RCANA_MSG24_t_CAN_message_buffer_LAFM_BIT_STDID_LAFM DEFINE 18
RCANA_MSG24_t_CAN_message_buffer_LAFM_BIT_IDE_LAFM DEFINE 31
RCANA_MSG24_t_CAN_message_buffer_DATA_LONG DEFINE 0xFFFFD3E8
RCANA_MSG24_t_CAN_message_buffer_DATA_WORD DEFINE 0xFFFFD3E8
RCANA_MSG24_t_CAN_message_buffer_DATA_BYTE DEFINE 0xFFFFD3E8
RCANA_MSG24_t_CAN_message_buffer_CONTROL1_WORD DEFINE 0xFFFFD3F0
RCANA_MSG24_t_CAN_message_buffer_CONTROL1_BIT_MBC DEFINE 0
RCANA_MSG24_t_CAN_message_buffer_CONTROL1_BIT_DART DEFINE 3
RCANA_MSG24_t_CAN_message_buffer_CONTROL1_BIT_ATX DEFINE 4
RCANA_MSG24_t_CAN_message_buffer_CONTROL1_BIT_NMC DEFINE 5
RCANA_MSG24_t_CAN_message_buffer_CONTROL1_BIT_DLC DEFINE 0
RCANA_MSG24_t_CAN_message_buffer_Timestamp DEFINE 0xFFFFD3F2
RCANA_MSG24_t_CAN_message_buffer_TTT DEFINE 0xFFFFD3F4
RCANA_MSG24_t_CAN_message_buffer_TTW_WORD DEFINE 0xFFFFD3F6
RCANA_MSG24_t_CAN_message_buffer_TTW_BIT_rep_factor DEFINE 0
RCANA_MSG24_t_CAN_message_buffer_TTW_BIT_Offset DEFINE 8
RCANA_MSG24_t_CAN_message_buffer_TTW_BIT_TTW DEFINE 14
RCANA_MSG24_t_CAN_message_buffer_wk DEFINE 0xFFFFD3F8
RCANA_MSG25_t_CAN_message_buffer_CONTROL0_LONG DEFINE 0xFFFFD400
RCANA_MSG25_t_CAN_message_buffer_CONTROL0_BIT_EXTID DEFINE 0
RCANA_MSG25_t_CAN_message_buffer_CONTROL0_BIT_STDID DEFINE 18
RCANA_MSG25_t_CAN_message_buffer_CONTROL0_BIT_RTR DEFINE 30
RCANA_MSG25_t_CAN_message_buffer_CONTROL0_BIT_IDE DEFINE 31
RCANA_MSG25_t_CAN_message_buffer_LAFM_LONG DEFINE 0xFFFFD404
RCANA_MSG25_t_CAN_message_buffer_LAFM_BIT_EXTID_LAFM DEFINE 0
RCANA_MSG25_t_CAN_message_buffer_LAFM_BIT_STDID_LAFM DEFINE 18
RCANA_MSG25_t_CAN_message_buffer_LAFM_BIT_IDE_LAFM DEFINE 31
RCANA_MSG25_t_CAN_message_buffer_DATA_LONG DEFINE 0xFFFFD408
RCANA_MSG25_t_CAN_message_buffer_DATA_WORD DEFINE 0xFFFFD408
RCANA_MSG25_t_CAN_message_buffer_DATA_BYTE DEFINE 0xFFFFD408
RCANA_MSG25_t_CAN_message_buffer_CONTROL1_WORD DEFINE 0xFFFFD410
RCANA_MSG25_t_CAN_message_buffer_CONTROL1_BIT_MBC DEFINE 0
RCANA_MSG25_t_CAN_message_buffer_CONTROL1_BIT_DART DEFINE 3
RCANA_MSG25_t_CAN_message_buffer_CONTROL1_BIT_ATX DEFINE 4
RCANA_MSG25_t_CAN_message_buffer_CONTROL1_BIT_NMC DEFINE 5
RCANA_MSG25_t_CAN_message_buffer_CONTROL1_BIT_DLC DEFINE 0
RCANA_MSG25_t_CAN_message_buffer_Timestamp DEFINE 0xFFFFD412
RCANA_MSG25_t_CAN_message_buffer_TTT DEFINE 0xFFFFD414
RCANA_MSG25_t_CAN_message_buffer_TTW_WORD DEFINE 0xFFFFD416
RCANA_MSG25_t_CAN_message_buffer_TTW_BIT_rep_factor DEFINE 0
RCANA_MSG25_t_CAN_message_buffer_TTW_BIT_Offset DEFINE 8
RCANA_MSG25_t_CAN_message_buffer_TTW_BIT_TTW DEFINE 14
RCANA_MSG25_t_CAN_message_buffer_wk DEFINE 0xFFFFD418
RCANA_MSG26_t_CAN_message_buffer_CONTROL0_LONG DEFINE 0xFFFFD420
RCANA_MSG26_t_CAN_message_buffer_CONTROL0_BIT_EXTID DEFINE 0
RCANA_MSG26_t_CAN_message_buffer_CONTROL0_BIT_STDID DEFINE 18
RCANA_MSG26_t_CAN_message_buffer_CONTROL0_BIT_RTR DEFINE 30
RCANA_MSG26_t_CAN_message_buffer_CONTROL0_BIT_IDE DEFINE 31
RCANA_MSG26_t_CAN_message_buffer_LAFM_LONG DEFINE 0xFFFFD424
RCANA_MSG26_t_CAN_message_buffer_LAFM_BIT_EXTID_LAFM DEFINE 0
RCANA_MSG26_t_CAN_message_buffer_LAFM_BIT_STDID_LAFM DEFINE 18
RCANA_MSG26_t_CAN_message_buffer_LAFM_BIT_IDE_LAFM DEFINE 31
RCANA_MSG26_t_CAN_message_buffer_DATA_LONG DEFINE 0xFFFFD428
RCANA_MSG26_t_CAN_message_buffer_DATA_WORD DEFINE 0xFFFFD428
RCANA_MSG26_t_CAN_message_buffer_DATA_BYTE DEFINE 0xFFFFD428
RCANA_MSG26_t_CAN_message_buffer_CONTROL1_WORD DEFINE 0xFFFFD430
RCANA_MSG26_t_CAN_message_buffer_CONTROL1_BIT_MBC DEFINE 0
RCANA_MSG26_t_CAN_message_buffer_CONTROL1_BIT_DART DEFINE 3
RCANA_MSG26_t_CAN_message_buffer_CONTROL1_BIT_ATX DEFINE 4
RCANA_MSG26_t_CAN_message_buffer_CONTROL1_BIT_NMC DEFINE 5
RCANA_MSG26_t_CAN_message_buffer_CONTROL1_BIT_DLC DEFINE 0
RCANA_MSG26_t_CAN_message_buffer_Timestamp DEFINE 0xFFFFD432
RCANA_MSG26_t_CAN_message_buffer_TTT DEFINE 0xFFFFD434
RCANA_MSG26_t_CAN_message_buffer_TTW_WORD DEFINE 0xFFFFD436
RCANA_MSG26_t_CAN_message_buffer_TTW_BIT_rep_factor DEFINE 0
RCANA_MSG26_t_CAN_message_buffer_TTW_BIT_Offset DEFINE 8
RCANA_MSG26_t_CAN_message_buffer_TTW_BIT_TTW DEFINE 14
RCANA_MSG26_t_CAN_message_buffer_wk DEFINE 0xFFFFD438
RCANA_MSG27_t_CAN_message_buffer_CONTROL0_LONG DEFINE 0xFFFFD440
RCANA_MSG27_t_CAN_message_buffer_CONTROL0_BIT_EXTID DEFINE 0
RCANA_MSG27_t_CAN_message_buffer_CONTROL0_BIT_STDID DEFINE 18
RCANA_MSG27_t_CAN_message_buffer_CONTROL0_BIT_RTR DEFINE 30
RCANA_MSG27_t_CAN_message_buffer_CONTROL0_BIT_IDE DEFINE 31
RCANA_MSG27_t_CAN_message_buffer_LAFM_LONG DEFINE 0xFFFFD444
RCANA_MSG27_t_CAN_message_buffer_LAFM_BIT_EXTID_LAFM DEFINE 0
RCANA_MSG27_t_CAN_message_buffer_LAFM_BIT_STDID_LAFM DEFINE 18
RCANA_MSG27_t_CAN_message_buffer_LAFM_BIT_IDE_LAFM DEFINE 31
RCANA_MSG27_t_CAN_message_buffer_DATA_LONG DEFINE 0xFFFFD448
RCANA_MSG27_t_CAN_message_buffer_DATA_WORD DEFINE 0xFFFFD448
RCANA_MSG27_t_CAN_message_buffer_DATA_BYTE DEFINE 0xFFFFD448
RCANA_MSG27_t_CAN_message_buffer_CONTROL1_WORD DEFINE 0xFFFFD450
RCANA_MSG27_t_CAN_message_buffer_CONTROL1_BIT_MBC DEFINE 0
RCANA_MSG27_t_CAN_message_buffer_CONTROL1_BIT_DART DEFINE 3
RCANA_MSG27_t_CAN_message_buffer_CONTROL1_BIT_ATX DEFINE 4
RCANA_MSG27_t_CAN_message_buffer_CONTROL1_BIT_NMC DEFINE 5
RCANA_MSG27_t_CAN_message_buffer_CONTROL1_BIT_DLC DEFINE 0
RCANA_MSG27_t_CAN_message_buffer_Timestamp DEFINE 0xFFFFD452
RCANA_MSG27_t_CAN_message_buffer_TTT DEFINE 0xFFFFD454
RCANA_MSG27_t_CAN_message_buffer_TTW_WORD DEFINE 0xFFFFD456
RCANA_MSG27_t_CAN_message_buffer_TTW_BIT_rep_factor DEFINE 0
RCANA_MSG27_t_CAN_message_buffer_TTW_BIT_Offset DEFINE 8
RCANA_MSG27_t_CAN_message_buffer_TTW_BIT_TTW DEFINE 14
RCANA_MSG27_t_CAN_message_buffer_wk DEFINE 0xFFFFD458
RCANA_MSG28_t_CAN_message_buffer_CONTROL0_LONG DEFINE 0xFFFFD460
RCANA_MSG28_t_CAN_message_buffer_CONTROL0_BIT_EXTID DEFINE 0
RCANA_MSG28_t_CAN_message_buffer_CONTROL0_BIT_STDID DEFINE 18
RCANA_MSG28_t_CAN_message_buffer_CONTROL0_BIT_RTR DEFINE 30
RCANA_MSG28_t_CAN_message_buffer_CONTROL0_BIT_IDE DEFINE 31
RCANA_MSG28_t_CAN_message_buffer_LAFM_LONG DEFINE 0xFFFFD464
RCANA_MSG28_t_CAN_message_buffer_LAFM_BIT_EXTID_LAFM DEFINE 0
RCANA_MSG28_t_CAN_message_buffer_LAFM_BIT_STDID_LAFM DEFINE 18
RCANA_MSG28_t_CAN_message_buffer_LAFM_BIT_IDE_LAFM DEFINE 31
RCANA_MSG28_t_CAN_message_buffer_DATA_LONG DEFINE 0xFFFFD468
RCANA_MSG28_t_CAN_message_buffer_DATA_WORD DEFINE 0xFFFFD468
RCANA_MSG28_t_CAN_message_buffer_DATA_BYTE DEFINE 0xFFFFD468
RCANA_MSG28_t_CAN_message_buffer_CONTROL1_WORD DEFINE 0xFFFFD470
RCANA_MSG28_t_CAN_message_buffer_CONTROL1_BIT_MBC DEFINE 0
RCANA_MSG28_t_CAN_message_buffer_CONTROL1_BIT_DART DEFINE 3
RCANA_MSG28_t_CAN_message_buffer_CONTROL1_BIT_ATX DEFINE 4
RCANA_MSG28_t_CAN_message_buffer_CONTROL1_BIT_NMC DEFINE 5
RCANA_MSG28_t_CAN_message_buffer_CONTROL1_BIT_DLC DEFINE 0
RCANA_MSG28_t_CAN_message_buffer_Timestamp DEFINE 0xFFFFD472
RCANA_MSG28_t_CAN_message_buffer_TTT DEFINE 0xFFFFD474
RCANA_MSG28_t_CAN_message_buffer_TTW_WORD DEFINE 0xFFFFD476
RCANA_MSG28_t_CAN_message_buffer_TTW_BIT_rep_factor DEFINE 0
RCANA_MSG28_t_CAN_message_buffer_TTW_BIT_Offset DEFINE 8
RCANA_MSG28_t_CAN_message_buffer_TTW_BIT_TTW DEFINE 14
RCANA_MSG28_t_CAN_message_buffer_wk DEFINE 0xFFFFD478
RCANA_MSG29_t_CAN_message_buffer_CONTROL0_LONG DEFINE 0xFFFFD480
RCANA_MSG29_t_CAN_message_buffer_CONTROL0_BIT_EXTID DEFINE 0
RCANA_MSG29_t_CAN_message_buffer_CONTROL0_BIT_STDID DEFINE 18
RCANA_MSG29_t_CAN_message_buffer_CONTROL0_BIT_RTR DEFINE 30
RCANA_MSG29_t_CAN_message_buffer_CONTROL0_BIT_IDE DEFINE 31
RCANA_MSG29_t_CAN_message_buffer_LAFM_LONG DEFINE 0xFFFFD484
RCANA_MSG29_t_CAN_message_buffer_LAFM_BIT_EXTID_LAFM DEFINE 0
RCANA_MSG29_t_CAN_message_buffer_LAFM_BIT_STDID_LAFM DEFINE 18
RCANA_MSG29_t_CAN_message_buffer_LAFM_BIT_IDE_LAFM DEFINE 31
RCANA_MSG29_t_CAN_message_buffer_DATA_LONG DEFINE 0xFFFFD488
RCANA_MSG29_t_CAN_message_buffer_DATA_WORD DEFINE 0xFFFFD488
RCANA_MSG29_t_CAN_message_buffer_DATA_BYTE DEFINE 0xFFFFD488
RCANA_MSG29_t_CAN_message_buffer_CONTROL1_WORD DEFINE 0xFFFFD490
RCANA_MSG29_t_CAN_message_buffer_CONTROL1_BIT_MBC DEFINE 0
RCANA_MSG29_t_CAN_message_buffer_CONTROL1_BIT_DART DEFINE 3
RCANA_MSG29_t_CAN_message_buffer_CONTROL1_BIT_ATX DEFINE 4
RCANA_MSG29_t_CAN_message_buffer_CONTROL1_BIT_NMC DEFINE 5
RCANA_MSG29_t_CAN_message_buffer_CONTROL1_BIT_DLC DEFINE 0
RCANA_MSG29_t_CAN_message_buffer_Timestamp DEFINE 0xFFFFD492
RCANA_MSG29_t_CAN_message_buffer_TTT DEFINE 0xFFFFD494
RCANA_MSG29_t_CAN_message_buffer_TTW_WORD DEFINE 0xFFFFD496
RCANA_MSG29_t_CAN_message_buffer_TTW_BIT_rep_factor DEFINE 0
RCANA_MSG29_t_CAN_message_buffer_TTW_BIT_Offset DEFINE 8
RCANA_MSG29_t_CAN_message_buffer_TTW_BIT_TTW DEFINE 14
RCANA_MSG29_t_CAN_message_buffer_wk DEFINE 0xFFFFD498
RCANA_MSG30_t_CAN_message_buffer_CONTROL0_LONG DEFINE 0xFFFFD4A0
RCANA_MSG30_t_CAN_message_buffer_CONTROL0_BIT_EXTID DEFINE 0
RCANA_MSG30_t_CAN_message_buffer_CONTROL0_BIT_STDID DEFINE 18
RCANA_MSG30_t_CAN_message_buffer_CONTROL0_BIT_RTR DEFINE 30
RCANA_MSG30_t_CAN_message_buffer_CONTROL0_BIT_IDE DEFINE 31
RCANA_MSG30_t_CAN_message_buffer_LAFM_LONG DEFINE 0xFFFFD4A4
RCANA_MSG30_t_CAN_message_buffer_LAFM_BIT_EXTID_LAFM DEFINE 0
RCANA_MSG30_t_CAN_message_buffer_LAFM_BIT_STDID_LAFM DEFINE 18
RCANA_MSG30_t_CAN_message_buffer_LAFM_BIT_IDE_LAFM DEFINE 31
RCANA_MSG30_t_CAN_message_buffer_DATA_LONG DEFINE 0xFFFFD4A8
RCANA_MSG30_t_CAN_message_buffer_DATA_WORD DEFINE 0xFFFFD4A8
RCANA_MSG30_t_CAN_message_buffer_DATA_BYTE DEFINE 0xFFFFD4A8
RCANA_MSG30_t_CAN_message_buffer_CONTROL1_WORD DEFINE 0xFFFFD4B0
RCANA_MSG30_t_CAN_message_buffer_CONTROL1_BIT_MBC DEFINE 0
RCANA_MSG30_t_CAN_message_buffer_CONTROL1_BIT_DART DEFINE 3
RCANA_MSG30_t_CAN_message_buffer_CONTROL1_BIT_ATX DEFINE 4
RCANA_MSG30_t_CAN_message_buffer_CONTROL1_BIT_NMC DEFINE 5
RCANA_MSG30_t_CAN_message_buffer_CONTROL1_BIT_DLC DEFINE 0
RCANA_MSG30_t_CAN_message_buffer_Timestamp DEFINE 0xFFFFD4B2
RCANA_MSG30_t_CAN_message_buffer_TTT DEFINE 0xFFFFD4B4
RCANA_MSG30_t_CAN_message_buffer_TTW_WORD DEFINE 0xFFFFD4B6
RCANA_MSG30_t_CAN_message_buffer_TTW_BIT_rep_factor DEFINE 0
RCANA_MSG30_t_CAN_message_buffer_TTW_BIT_Offset DEFINE 8
RCANA_MSG30_t_CAN_message_buffer_TTW_BIT_TTW DEFINE 14
RCANA_MSG30_t_CAN_message_buffer_wk DEFINE 0xFFFFD4B8
RCANA_MSG31_t_CAN_message_buffer_CONTROL0_LONG DEFINE 0xFFFFD4C0
RCANA_MSG31_t_CAN_message_buffer_CONTROL0_BIT_EXTID DEFINE 0
RCANA_MSG31_t_CAN_message_buffer_CONTROL0_BIT_STDID DEFINE 18
RCANA_MSG31_t_CAN_message_buffer_CONTROL0_BIT_RTR DEFINE 30
RCANA_MSG31_t_CAN_message_buffer_CONTROL0_BIT_IDE DEFINE 31
RCANA_MSG31_t_CAN_message_buffer_LAFM_LONG DEFINE 0xFFFFD4C4
RCANA_MSG31_t_CAN_message_buffer_LAFM_BIT_EXTID_LAFM DEFINE 0
RCANA_MSG31_t_CAN_message_buffer_LAFM_BIT_STDID_LAFM DEFINE 18
RCANA_MSG31_t_CAN_message_buffer_LAFM_BIT_IDE_LAFM DEFINE 31
RCANA_MSG31_t_CAN_message_buffer_DATA_LONG DEFINE 0xFFFFD4C8
RCANA_MSG31_t_CAN_message_buffer_DATA_WORD DEFINE 0xFFFFD4C8
RCANA_MSG31_t_CAN_message_buffer_DATA_BYTE DEFINE 0xFFFFD4C8
RCANA_MSG31_t_CAN_message_buffer_CONTROL1_WORD DEFINE 0xFFFFD4D0
RCANA_MSG31_t_CAN_message_buffer_CONTROL1_BIT_MBC DEFINE 0
RCANA_MSG31_t_CAN_message_buffer_CONTROL1_BIT_DART DEFINE 3
RCANA_MSG31_t_CAN_message_buffer_CONTROL1_BIT_ATX DEFINE 4
RCANA_MSG31_t_CAN_message_buffer_CONTROL1_BIT_NMC DEFINE 5
RCANA_MSG31_t_CAN_message_buffer_CONTROL1_BIT_DLC DEFINE 0
RCANA_MSG31_t_CAN_message_buffer_Timestamp DEFINE 0xFFFFD4D2
RCANA_MSG31_t_CAN_message_buffer_TTT DEFINE 0xFFFFD4D4
RCANA_MSG31_t_CAN_message_buffer_TTW_WORD DEFINE 0xFFFFD4D6
RCANA_MSG31_t_CAN_message_buffer_TTW_BIT_rep_factor DEFINE 0
RCANA_MSG31_t_CAN_message_buffer_TTW_BIT_Offset DEFINE 8
RCANA_MSG31_t_CAN_message_buffer_TTW_BIT_TTW DEFINE 14
RCANA_MSG31_t_CAN_message_buffer_wk DEFINE 0xFFFFD4D8
RCANA_MSG32_t_CAN_message_buffer_CONTROL0_LONG DEFINE 0xFFFFD4E0
RCANA_MSG32_t_CAN_message_buffer_CONTROL0_BIT_EXTID DEFINE 0
RCANA_MSG32_t_CAN_message_buffer_CONTROL0_BIT_STDID DEFINE 18
RCANA_MSG32_t_CAN_message_buffer_CONTROL0_BIT_RTR DEFINE 30
RCANA_MSG32_t_CAN_message_buffer_CONTROL0_BIT_IDE DEFINE 31
RCANA_MSG32_t_CAN_message_buffer_LAFM_LONG DEFINE 0xFFFFD4E4
RCANA_MSG32_t_CAN_message_buffer_LAFM_BIT_EXTID_LAFM DEFINE 0
RCANA_MSG32_t_CAN_message_buffer_LAFM_BIT_STDID_LAFM DEFINE 18
RCANA_MSG32_t_CAN_message_buffer_LAFM_BIT_IDE_LAFM DEFINE 31
RCANA_MSG32_t_CAN_message_buffer_DATA_LONG DEFINE 0xFFFFD4E8
RCANA_MSG32_t_CAN_message_buffer_DATA_WORD DEFINE 0xFFFFD4E8
RCANA_MSG32_t_CAN_message_buffer_DATA_BYTE DEFINE 0xFFFFD4E8
RCANA_MSG32_t_CAN_message_buffer_CONTROL1_WORD DEFINE 0xFFFFD4F0
RCANA_MSG32_t_CAN_message_buffer_CONTROL1_BIT_MBC DEFINE 0
RCANA_MSG32_t_CAN_message_buffer_CONTROL1_BIT_DART DEFINE 3
RCANA_MSG32_t_CAN_message_buffer_CONTROL1_BIT_ATX DEFINE 4
RCANA_MSG32_t_CAN_message_buffer_CONTROL1_BIT_NMC DEFINE 5
RCANA_MSG32_t_CAN_message_buffer_CONTROL1_BIT_DLC DEFINE 0
RCANA_MSG32_t_CAN_message_buffer_Timestamp DEFINE 0xFFFFD4F2
RCANA_MSG32_t_CAN_message_buffer_TTT DEFINE 0xFFFFD4F4
RCANA_MSG32_t_CAN_message_buffer_TTW_WORD DEFINE 0xFFFFD4F6
RCANA_MSG32_t_CAN_message_buffer_TTW_BIT_rep_factor DEFINE 0
RCANA_MSG32_t_CAN_message_buffer_TTW_BIT_Offset DEFINE 8
RCANA_MSG32_t_CAN_message_buffer_TTW_BIT_TTW DEFINE 14
RCANA_MSG32_t_CAN_message_buffer_wk DEFINE 0xFFFFD4F8
RCANA_wk18 DEFINE 0xFFFFD500
RCANA_MBESR_WORD DEFINE 0xFFFFD600
RCANA_MBESR_BIT_MBEF DEFINE 0
RCANA_MBECR_WORD DEFINE 0xFFFFD602
RCANA_MBECR_BIT_MBIM DEFINE 0

/* Renesas Controller Area Network Module B     */
RCANB_MCR_WORD DEFINE 0xFFFFD800
RCANB_MCR_BIT_MCR0 DEFINE 0
RCANB_MCR_BIT_MCR1 DEFINE 1
RCANB_MCR_BIT_MCR2 DEFINE 2
RCANB_MCR_BIT_MCR5 DEFINE 5
RCANB_MCR_BIT_MCR6 DEFINE 6
RCANB_MCR_BIT_MCR7 DEFINE 7
RCANB_MCR_BIT_TST DEFINE 8
RCANB_MCR_BIT_MCR14 DEFINE 14
RCANB_MCR_BIT_MCR15 DEFINE 15
RCANB_GSR_WORD DEFINE 0xFFFFD802
RCANB_GSR_BIT_GSR0 DEFINE 0
RCANB_GSR_BIT_GSR1 DEFINE 1
RCANB_GSR_BIT_GSR2 DEFINE 2
RCANB_GSR_BIT_GSR3 DEFINE 3
RCANB_GSR_BIT_GSR4 DEFINE 4
RCANB_GSR_BIT_GSR5 DEFINE 5
RCANB_BCR1_WORD DEFINE 0xFFFFD804
RCANB_BCR1_BIT_BSP DEFINE 0
RCANB_BCR1_BIT_SJW DEFINE 4
RCANB_BCR1_BIT_TSG2 DEFINE 8
RCANB_BCR1_BIT_TSG1 DEFINE 12
RCANB_BCR0_WORD DEFINE 0xFFFFD806
RCANB_BCR0_BIT_BRP DEFINE 0
RCANB_IRR_WORD DEFINE 0xFFFFD808
RCANB_IRR_BIT_IRR0 DEFINE 0
RCANB_IRR_BIT_IRR1 DEFINE 1
RCANB_IRR_BIT_IRR2 DEFINE 2
RCANB_IRR_BIT_IRR3 DEFINE 3
RCANB_IRR_BIT_IRR4 DEFINE 4
RCANB_IRR_BIT_IRR5 DEFINE 5
RCANB_IRR_BIT_IRR6 DEFINE 6
RCANB_IRR_BIT_IRR7 DEFINE 7
RCANB_IRR_BIT_IRR8 DEFINE 8
RCANB_IRR_BIT_IRR9 DEFINE 9
RCANB_IRR_BIT_IRR10 DEFINE 10
RCANB_IRR_BIT_IRR11 DEFINE 11
RCANB_IRR_BIT_IRR12 DEFINE 12
RCANB_IRR_BIT_IRR13 DEFINE 13
RCANB_IRR_BIT_IRR14 DEFINE 14
RCANB_IRR_BIT_IRR15 DEFINE 15
RCANB_IMR_WORD DEFINE 0xFFFFD80A
RCANB_IMR_BIT_IMR0 DEFINE 0
RCANB_IMR_BIT_IMR1 DEFINE 1
RCANB_IMR_BIT_IMR2 DEFINE 2
RCANB_IMR_BIT_IMR3 DEFINE 3
RCANB_IMR_BIT_IMR4 DEFINE 4
RCANB_IMR_BIT_IMR5 DEFINE 5
RCANB_IMR_BIT_IMR6 DEFINE 6
RCANB_IMR_BIT_IMR7 DEFINE 7
RCANB_IMR_BIT_IMR8 DEFINE 8
RCANB_IMR_BIT_IMR9 DEFINE 9
RCANB_IMR_BIT_IMR10 DEFINE 10
RCANB_IMR_BIT_IMR11 DEFINE 11
RCANB_IMR_BIT_IMR12 DEFINE 12
RCANB_IMR_BIT_IMR13 DEFINE 13
RCANB_IMR_BIT_IMR14 DEFINE 14
RCANB_IMR_BIT_IMR15 DEFINE 15
RCANB_TEC_REC_WORD DEFINE 0xFFFFD80C
RCANB_TEC_REC_BIT_TEC0 DEFINE 0
RCANB_TEC_REC_BIT_TEC1 DEFINE 1
RCANB_TEC_REC_BIT_TEC2 DEFINE 2
RCANB_TEC_REC_BIT_TEC3 DEFINE 3
RCANB_TEC_REC_BIT_TEC4 DEFINE 4
RCANB_TEC_REC_BIT_TEC5 DEFINE 5
RCANB_TEC_REC_BIT_TEC6 DEFINE 6
RCANB_TEC_REC_BIT_TEC7 DEFINE 7
RCANB_TEC_REC_BIT_REC0 DEFINE 0
RCANB_TEC_REC_BIT_REC1 DEFINE 1
RCANB_TEC_REC_BIT_REC2 DEFINE 2
RCANB_TEC_REC_BIT_REC3 DEFINE 3
RCANB_TEC_REC_BIT_REC4 DEFINE 4
RCANB_TEC_REC_BIT_REC5 DEFINE 5
RCANB_TEC_REC_BIT_REC6 DEFINE 6
RCANB_TEC_REC_BIT_REC7 DEFINE 7
RCANB_wk1 DEFINE 0xFFFFD80E
RCANB_TXPR_LONG DEFINE 0xFFFFD820
RCANB_TXPR_BIT_TXPR0_1 DEFINE 1
RCANB_TXPR_BIT_TXPR0_2 DEFINE 2
RCANB_TXPR_BIT_TXPR0_3 DEFINE 3
RCANB_TXPR_BIT_TXPR0_4 DEFINE 4
RCANB_TXPR_BIT_TXPR0_5 DEFINE 5
RCANB_TXPR_BIT_TXPR0_6 DEFINE 6
RCANB_TXPR_BIT_TXPR0_7 DEFINE 7
RCANB_TXPR_BIT_TXPR0_8 DEFINE 8
RCANB_TXPR_BIT_TXPR0_9 DEFINE 9
RCANB_TXPR_BIT_TXPR0_10 DEFINE 10
RCANB_TXPR_BIT_TXPR0_11 DEFINE 11
RCANB_TXPR_BIT_TXPR0_12 DEFINE 12
RCANB_TXPR_BIT_TXPR0_13 DEFINE 13
RCANB_TXPR_BIT_TXPR0_14 DEFINE 14
RCANB_TXPR_BIT_TXPR0_15 DEFINE 15
RCANB_TXPR_BIT_TXPR1_0 DEFINE 16
RCANB_TXPR_BIT_TXPR1_1 DEFINE 17
RCANB_TXPR_BIT_TXPR1_2 DEFINE 18
RCANB_TXPR_BIT_TXPR1_3 DEFINE 19
RCANB_TXPR_BIT_TXPR1_4 DEFINE 20
RCANB_TXPR_BIT_TXPR1_5 DEFINE 21
RCANB_TXPR_BIT_TXPR1_6 DEFINE 22
RCANB_TXPR_BIT_TXPR1_7 DEFINE 23
RCANB_TXPR_BIT_TXPR1_8 DEFINE 24
RCANB_TXPR_BIT_TXPR1_9 DEFINE 25
RCANB_TXPR_BIT_TXPR1_10 DEFINE 26
RCANB_TXPR_BIT_TXPR1_11 DEFINE 27
RCANB_TXPR_BIT_TXPR1_12 DEFINE 28
RCANB_TXPR_BIT_TXPR1_13 DEFINE 29
RCANB_TXPR_BIT_TXPR1_14 DEFINE 30
RCANB_TXPR_BIT_TXPR1_15 DEFINE 31
RCANB_wk2 DEFINE 0xFFFFD824
RCANB_TXCR_LONG DEFINE 0xFFFFD828
RCANB_TXCR_BIT_TXCR0_1 DEFINE 1
RCANB_TXCR_BIT_TXCR0_2 DEFINE 2
RCANB_TXCR_BIT_TXCR0_3 DEFINE 3
RCANB_TXCR_BIT_TXCR0_4 DEFINE 4
RCANB_TXCR_BIT_TXCR0_5 DEFINE 5
RCANB_TXCR_BIT_TXCR0_6 DEFINE 6
RCANB_TXCR_BIT_TXCR0_7 DEFINE 7
RCANB_TXCR_BIT_TXCR0_8 DEFINE 8
RCANB_TXCR_BIT_TXCR0_9 DEFINE 9
RCANB_TXCR_BIT_TXCR0_10 DEFINE 10
RCANB_TXCR_BIT_TXCR0_11 DEFINE 11
RCANB_TXCR_BIT_TXCR0_12 DEFINE 12
RCANB_TXCR_BIT_TXCR0_13 DEFINE 13
RCANB_TXCR_BIT_TXCR0_14 DEFINE 14
RCANB_TXCR_BIT_TXCR0_15 DEFINE 15
RCANB_TXCR_BIT_TXCR1_0 DEFINE 16
RCANB_TXCR_BIT_TXCR1_1 DEFINE 17
RCANB_TXCR_BIT_TXCR1_2 DEFINE 18
RCANB_TXCR_BIT_TXCR1_3 DEFINE 19
RCANB_TXCR_BIT_TXCR1_4 DEFINE 20
RCANB_TXCR_BIT_TXCR1_5 DEFINE 21
RCANB_TXCR_BIT_TXCR1_6 DEFINE 22
RCANB_TXCR_BIT_TXCR1_7 DEFINE 23
RCANB_TXCR_BIT_TXCR1_8 DEFINE 24
RCANB_TXCR_BIT_TXCR1_9 DEFINE 25
RCANB_TXCR_BIT_TXCR1_10 DEFINE 26
RCANB_TXCR_BIT_TXCR1_11 DEFINE 27
RCANB_TXCR_BIT_TXCR1_12 DEFINE 28
RCANB_TXCR_BIT_TXCR1_13 DEFINE 29
RCANB_TXCR_BIT_TXCR1_14 DEFINE 30
RCANB_TXCR_BIT_TXCR1_15 DEFINE 31
RCANB_TXCR_WORD_TXCR1 DEFINE 0xFFFFD828
RCANB_TXCR_WORD_TXCR0 DEFINE 0xFFFFD82A
RCANB_wk3 DEFINE 0xFFFFD82C
RCANB_TXACK_LONG DEFINE 0xFFFFD830
RCANB_TXACK_BIT_TXACK0_1 DEFINE 1
RCANB_TXACK_BIT_TXACK0_2 DEFINE 2
RCANB_TXACK_BIT_TXACK0_3 DEFINE 3
RCANB_TXACK_BIT_TXACK0_4 DEFINE 4
RCANB_TXACK_BIT_TXACK0_5 DEFINE 5
RCANB_TXACK_BIT_TXACK0_6 DEFINE 6
RCANB_TXACK_BIT_TXACK0_7 DEFINE 7
RCANB_TXACK_BIT_TXACK0_8 DEFINE 8
RCANB_TXACK_BIT_TXACK0_9 DEFINE 9
RCANB_TXACK_BIT_TXACK0_10 DEFINE 10
RCANB_TXACK_BIT_TXACK0_11 DEFINE 11
RCANB_TXACK_BIT_TXACK0_12 DEFINE 12
RCANB_TXACK_BIT_TXACK0_13 DEFINE 13
RCANB_TXACK_BIT_TXACK0_14 DEFINE 14
RCANB_TXACK_BIT_TXACK0_15 DEFINE 15
RCANB_TXACK_BIT_TXACK1_0 DEFINE 16
RCANB_TXACK_BIT_TXACK1_1 DEFINE 17
RCANB_TXACK_BIT_TXACK1_2 DEFINE 18
RCANB_TXACK_BIT_TXACK1_3 DEFINE 19
RCANB_TXACK_BIT_TXACK1_4 DEFINE 20
RCANB_TXACK_BIT_TXACK1_5 DEFINE 21
RCANB_TXACK_BIT_TXACK1_6 DEFINE 22
RCANB_TXACK_BIT_TXACK1_7 DEFINE 23
RCANB_TXACK_BIT_TXACK1_8 DEFINE 24
RCANB_TXACK_BIT_TXACK1_9 DEFINE 25
RCANB_TXACK_BIT_TXACK1_10 DEFINE 26
RCANB_TXACK_BIT_TXACK1_11 DEFINE 27
RCANB_TXACK_BIT_TXACK1_12 DEFINE 28
RCANB_TXACK_BIT_TXACK1_13 DEFINE 29
RCANB_TXACK_BIT_TXACK1_14 DEFINE 30
RCANB_TXACK_BIT_TXACK1_15 DEFINE 31
RCANB_TXACK_WORD_TXACK1 DEFINE 0xFFFFD830
RCANB_TXACK_WORD_TXACK0 DEFINE 0xFFFFD832
RCANB_wk4 DEFINE 0xFFFFD834
RCANB_ABACK_LONG DEFINE 0xFFFFD838
RCANB_ABACK_BIT_ABACK0_1 DEFINE 1
RCANB_ABACK_BIT_ABACK0_2 DEFINE 2
RCANB_ABACK_BIT_ABACK0_3 DEFINE 3
RCANB_ABACK_BIT_ABACK0_4 DEFINE 4
RCANB_ABACK_BIT_ABACK0_5 DEFINE 5
RCANB_ABACK_BIT_ABACK0_6 DEFINE 6
RCANB_ABACK_BIT_ABACK0_7 DEFINE 7
RCANB_ABACK_BIT_ABACK0_8 DEFINE 8
RCANB_ABACK_BIT_ABACK0_9 DEFINE 9
RCANB_ABACK_BIT_ABACK0_10 DEFINE 10
RCANB_ABACK_BIT_ABACK0_11 DEFINE 11
RCANB_ABACK_BIT_ABACK0_12 DEFINE 12
RCANB_ABACK_BIT_ABACK0_13 DEFINE 13
RCANB_ABACK_BIT_ABACK0_14 DEFINE 14
RCANB_ABACK_BIT_ABACK0_15 DEFINE 15
RCANB_ABACK_BIT_ABACK1_0 DEFINE 16
RCANB_ABACK_BIT_ABACK1_1 DEFINE 17
RCANB_ABACK_BIT_ABACK1_2 DEFINE 18
RCANB_ABACK_BIT_ABACK1_3 DEFINE 19
RCANB_ABACK_BIT_ABACK1_4 DEFINE 20
RCANB_ABACK_BIT_ABACK1_5 DEFINE 21
RCANB_ABACK_BIT_ABACK1_6 DEFINE 22
RCANB_ABACK_BIT_ABACK1_7 DEFINE 23
RCANB_ABACK_BIT_ABACK1_8 DEFINE 24
RCANB_ABACK_BIT_ABACK1_9 DEFINE 25
RCANB_ABACK_BIT_ABACK1_10 DEFINE 26
RCANB_ABACK_BIT_ABACK1_11 DEFINE 27
RCANB_ABACK_BIT_ABACK1_12 DEFINE 28
RCANB_ABACK_BIT_ABACK1_13 DEFINE 29
RCANB_ABACK_BIT_ABACK1_14 DEFINE 30
RCANB_ABACK_BIT_ABACK1_15 DEFINE 31
RCANB_ABACK_WORD_ABACK1 DEFINE 0xFFFFD838
RCANB_ABACK_WORD_ABACK0 DEFINE 0xFFFFD83A
RCANB_wk5 DEFINE 0xFFFFD83C
RCANB_RXPR_LONG DEFINE 0xFFFFD840
RCANB_RXPR_BIT_RXPR0_0 DEFINE 0
RCANB_RXPR_BIT_RXPR0_1 DEFINE 1
RCANB_RXPR_BIT_RXPR0_2 DEFINE 2
RCANB_RXPR_BIT_RXPR0_3 DEFINE 3
RCANB_RXPR_BIT_RXPR0_4 DEFINE 4
RCANB_RXPR_BIT_RXPR0_5 DEFINE 5
RCANB_RXPR_BIT_RXPR0_6 DEFINE 6
RCANB_RXPR_BIT_RXPR0_7 DEFINE 7
RCANB_RXPR_BIT_RXPR0_8 DEFINE 8
RCANB_RXPR_BIT_RXPR0_9 DEFINE 9
RCANB_RXPR_BIT_RXPR0_10 DEFINE 10
RCANB_RXPR_BIT_RXPR0_11 DEFINE 11
RCANB_RXPR_BIT_RXPR0_12 DEFINE 12
RCANB_RXPR_BIT_RXPR0_13 DEFINE 13
RCANB_RXPR_BIT_RXPR0_14 DEFINE 14
RCANB_RXPR_BIT_RXPR0_15 DEFINE 15
RCANB_RXPR_BIT_RXPR1_0 DEFINE 16
RCANB_RXPR_BIT_RXPR1_1 DEFINE 17
RCANB_RXPR_BIT_RXPR1_2 DEFINE 18
RCANB_RXPR_BIT_RXPR1_3 DEFINE 19
RCANB_RXPR_BIT_RXPR1_4 DEFINE 20
RCANB_RXPR_BIT_RXPR1_5 DEFINE 21
RCANB_RXPR_BIT_RXPR1_6 DEFINE 22
RCANB_RXPR_BIT_RXPR1_7 DEFINE 23
RCANB_RXPR_BIT_RXPR1_8 DEFINE 24
RCANB_RXPR_BIT_RXPR1_9 DEFINE 25
RCANB_RXPR_BIT_RXPR1_10 DEFINE 26
RCANB_RXPR_BIT_RXPR1_11 DEFINE 27
RCANB_RXPR_BIT_RXPR1_12 DEFINE 28
RCANB_RXPR_BIT_RXPR1_13 DEFINE 29
RCANB_RXPR_BIT_RXPR1_14 DEFINE 30
RCANB_RXPR_BIT_RXPR1_15 DEFINE 31
RCANB_RXPR_WORD_RXPR1 DEFINE 0xFFFFD840
RCANB_RXPR_WORD_RXPR0 DEFINE 0xFFFFD842
RCANB_wk6 DEFINE 0xFFFFD844
RCANB_RFPR_LONG DEFINE 0xFFFFD848
RCANB_RFPR_BIT_RFPR0_0 DEFINE 0
RCANB_RFPR_BIT_RFPR0_1 DEFINE 1
RCANB_RFPR_BIT_RFPR0_2 DEFINE 2
RCANB_RFPR_BIT_RFPR0_3 DEFINE 3
RCANB_RFPR_BIT_RFPR0_4 DEFINE 4
RCANB_RFPR_BIT_RFPR0_5 DEFINE 5
RCANB_RFPR_BIT_RFPR0_6 DEFINE 6
RCANB_RFPR_BIT_RFPR0_7 DEFINE 7
RCANB_RFPR_BIT_RFPR0_8 DEFINE 8
RCANB_RFPR_BIT_RFPR0_9 DEFINE 9
RCANB_RFPR_BIT_RFPR0_10 DEFINE 10
RCANB_RFPR_BIT_RFPR0_11 DEFINE 11
RCANB_RFPR_BIT_RFPR0_12 DEFINE 12
RCANB_RFPR_BIT_RFPR0_13 DEFINE 13
RCANB_RFPR_BIT_RFPR0_14 DEFINE 14
RCANB_RFPR_BIT_RFPR0_15 DEFINE 15
RCANB_RFPR_BIT_RFPR1_0 DEFINE 16
RCANB_RFPR_BIT_RFPR1_1 DEFINE 17
RCANB_RFPR_BIT_RFPR1_2 DEFINE 18
RCANB_RFPR_BIT_RFPR1_3 DEFINE 19
RCANB_RFPR_BIT_RFPR1_4 DEFINE 20
RCANB_RFPR_BIT_RFPR1_5 DEFINE 21
RCANB_RFPR_BIT_RFPR1_6 DEFINE 22
RCANB_RFPR_BIT_RFPR1_7 DEFINE 23
RCANB_RFPR_BIT_RFPR1_8 DEFINE 24
RCANB_RFPR_BIT_RFPR1_9 DEFINE 25
RCANB_RFPR_BIT_RFPR1_10 DEFINE 26
RCANB_RFPR_BIT_RFPR1_11 DEFINE 27
RCANB_RFPR_BIT_RFPR1_12 DEFINE 28
RCANB_RFPR_BIT_RFPR1_13 DEFINE 29
RCANB_RFPR_BIT_RFPR1_14 DEFINE 30
RCANB_RFPR_BIT_RFPR1_15 DEFINE 31
RCANB_RFPR_WORD_RFPR1 DEFINE 0xFFFFD848
RCANB_RFPR_WORD_RFPR0 DEFINE 0xFFFFD84A
RCANB_wk7 DEFINE 0xFFFFD84C
RCANB_MBIMR_LONG DEFINE 0xFFFFD850
RCANB_MBIMR_BIT_MBIMR0_0 DEFINE 0
RCANB_MBIMR_BIT_MBIMR0_1 DEFINE 1
RCANB_MBIMR_BIT_MBIMR0_2 DEFINE 2
RCANB_MBIMR_BIT_MBIMR0_3 DEFINE 3
RCANB_MBIMR_BIT_MBIMR0_4 DEFINE 4
RCANB_MBIMR_BIT_MBIMR0_5 DEFINE 5
RCANB_MBIMR_BIT_MBIMR0_6 DEFINE 6
RCANB_MBIMR_BIT_MBIMR0_7 DEFINE 7
RCANB_MBIMR_BIT_MBIMR0_8 DEFINE 8
RCANB_MBIMR_BIT_MBIMR0_9 DEFINE 9
RCANB_MBIMR_BIT_MBIMR0_10 DEFINE 10
RCANB_MBIMR_BIT_MBIMR0_11 DEFINE 11
RCANB_MBIMR_BIT_MBIMR0_12 DEFINE 12
RCANB_MBIMR_BIT_MBIMR0_13 DEFINE 13
RCANB_MBIMR_BIT_MBIMR0_14 DEFINE 14
RCANB_MBIMR_BIT_MBIMR0_15 DEFINE 15
RCANB_MBIMR_BIT_MBIMR1_0 DEFINE 16
RCANB_MBIMR_BIT_MBIMR1_1 DEFINE 17
RCANB_MBIMR_BIT_MBIMR1_2 DEFINE 18
RCANB_MBIMR_BIT_MBIMR1_3 DEFINE 19
RCANB_MBIMR_BIT_MBIMR1_4 DEFINE 20
RCANB_MBIMR_BIT_MBIMR1_5 DEFINE 21
RCANB_MBIMR_BIT_MBIMR1_6 DEFINE 22
RCANB_MBIMR_BIT_MBIMR1_7 DEFINE 23
RCANB_MBIMR_BIT_MBIMR1_8 DEFINE 24
RCANB_MBIMR_BIT_MBIMR1_9 DEFINE 25
RCANB_MBIMR_BIT_MBIMR1_10 DEFINE 26
RCANB_MBIMR_BIT_MBIMR1_11 DEFINE 27
RCANB_MBIMR_BIT_MBIMR1_12 DEFINE 28
RCANB_MBIMR_BIT_MBIMR1_13 DEFINE 29
RCANB_MBIMR_BIT_MBIMR1_14 DEFINE 30
RCANB_MBIMR_BIT_MBIMR1_15 DEFINE 31
RCANB_MBIMR_WORD_MBIMR1 DEFINE 0xFFFFD850
RCANB_MBIMR_WORD_MBIMR0 DEFINE 0xFFFFD852
RCANB_wk8 DEFINE 0xFFFFD854
RCANB_UMSR_LONG DEFINE 0xFFFFD858
RCANB_UMSR_BIT_UMSR0_0 DEFINE 0
RCANB_UMSR_BIT_UMSR0_1 DEFINE 1
RCANB_UMSR_BIT_UMSR0_2 DEFINE 2
RCANB_UMSR_BIT_UMSR0_3 DEFINE 3
RCANB_UMSR_BIT_UMSR0_4 DEFINE 4
RCANB_UMSR_BIT_UMSR0_5 DEFINE 5
RCANB_UMSR_BIT_UMSR0_6 DEFINE 6
RCANB_UMSR_BIT_UMSR0_7 DEFINE 7
RCANB_UMSR_BIT_UMSR0_8 DEFINE 8
RCANB_UMSR_BIT_UMSR0_9 DEFINE 9
RCANB_UMSR_BIT_UMSR0_10 DEFINE 10
RCANB_UMSR_BIT_UMSR0_11 DEFINE 11
RCANB_UMSR_BIT_UMSR0_12 DEFINE 12
RCANB_UMSR_BIT_UMSR0_13 DEFINE 13
RCANB_UMSR_BIT_UMSR0_14 DEFINE 14
RCANB_UMSR_BIT_UMSR0_15 DEFINE 15
RCANB_UMSR_BIT_UMSR1_0 DEFINE 16
RCANB_UMSR_BIT_UMSR1_1 DEFINE 17
RCANB_UMSR_BIT_UMSR1_2 DEFINE 18
RCANB_UMSR_BIT_UMSR1_3 DEFINE 19
RCANB_UMSR_BIT_UMSR1_4 DEFINE 20
RCANB_UMSR_BIT_UMSR1_5 DEFINE 21
RCANB_UMSR_BIT_UMSR1_6 DEFINE 22
RCANB_UMSR_BIT_UMSR1_7 DEFINE 23
RCANB_UMSR_BIT_UMSR1_8 DEFINE 24
RCANB_UMSR_BIT_UMSR1_9 DEFINE 25
RCANB_UMSR_BIT_UMSR1_10 DEFINE 26
RCANB_UMSR_BIT_UMSR1_11 DEFINE 27
RCANB_UMSR_BIT_UMSR1_12 DEFINE 28
RCANB_UMSR_BIT_UMSR1_13 DEFINE 29
RCANB_UMSR_BIT_UMSR1_14 DEFINE 30
RCANB_UMSR_BIT_UMSR1_15 DEFINE 31
RCANB_UMSR_WORD_UMSR1 DEFINE 0xFFFFD858
RCANB_UMSR_WORD_UMSR0 DEFINE 0xFFFFD85A
RCANB_wk9 DEFINE 0xFFFFD85C
RCANB_TTCR0_WORD DEFINE 0xFFFFD880
RCANB_TTCR0_BIT_TPSC0 DEFINE 0
RCANB_TTCR0_BIT_TPSC1 DEFINE 1
RCANB_TTCR0_BIT_TPSC2 DEFINE 2
RCANB_TTCR0_BIT_TPSC3 DEFINE 3
RCANB_TTCR0_BIT_TPSC4 DEFINE 4
RCANB_TTCR0_BIT_TPSC5 DEFINE 5
RCANB_TTCR0_BIT_TCR6 DEFINE 6
RCANB_TTCR0_BIT_TCR10 DEFINE 10
RCANB_TTCR0_BIT_TCR11 DEFINE 11
RCANB_TTCR0_BIT_TCR12 DEFINE 12
RCANB_TTCR0_BIT_TCR13 DEFINE 13
RCANB_TTCR0_BIT_TCR14 DEFINE 14
RCANB_TTCR0_BIT_TCR15 DEFINE 15
RCANB_wk10 DEFINE 0xFFFFD882
RCANB_CMAX_TEW_WORD DEFINE 0xFFFFD884
RCANB_CMAX_TEW_BIT_TEW DEFINE 0
RCANB_CMAX_TEW_BIT_CMAX DEFINE 8
RCANB_RFTROFF_WORD DEFINE 0xFFFFD886
RCANB_RFTROFF_BIT_RFTROFF DEFINE 8
RCANB_TSR_WORD DEFINE 0xFFFFD888
RCANB_TSR_BIT_TSR0 DEFINE 0
RCANB_TSR_BIT_TSR1 DEFINE 1
RCANB_TSR_BIT_TSR2 DEFINE 2
RCANB_TSR_BIT_TSR3 DEFINE 3
RCANB_TSR_BIT_TSR4 DEFINE 4
RCANB_CCR_WORD DEFINE 0xFFFFD88A
RCANB_CCR_BIT_CCR DEFINE 0
RCANB_TCNTR DEFINE 0xFFFFD88C
RCANB_wk11 DEFINE 0xFFFFD88E
RCANB_CYCTR DEFINE 0xFFFFD890
RCANB_wk12 DEFINE 0xFFFFD892
RCANB_RFMK DEFINE 0xFFFFD894
RCANB_wk13 DEFINE 0xFFFFD896
RCANB_TCMR0 DEFINE 0xFFFFD898
RCANB_wk14 DEFINE 0xFFFFD89A
RCANB_TCMR1 DEFINE 0xFFFFD89C
RCANB_wk15 DEFINE 0xFFFFD89E
RCANB_TCMR2 DEFINE 0xFFFFD8A0
RCANB_wk16 DEFINE 0xFFFFD8A2
RCANB_TTTSEL_WORD DEFINE 0xFFFFD8A4
RCANB_TTTSEL_BIT_TTTSEL8 DEFINE 8
RCANB_TTTSEL_BIT_TTTSEL9 DEFINE 9
RCANB_TTTSEL_BIT_TTTSEL10 DEFINE 10
RCANB_TTTSEL_BIT_TTTSEL11 DEFINE 11
RCANB_TTTSEL_BIT_TTTSEL12 DEFINE 12
RCANB_TTTSEL_BIT_TTTSEL13 DEFINE 13
RCANB_TTTSEL_BIT_TTTSEL14 DEFINE 14
RCANB_wk17 DEFINE 0xFFFFD8A6
RCANB_MSG1_t_CAN_message_buffer_CONTROL0_LONG DEFINE 0xFFFFD900
RCANB_MSG1_t_CAN_message_buffer_CONTROL0_BIT_EXTID DEFINE 0
RCANB_MSG1_t_CAN_message_buffer_CONTROL0_BIT_STDID DEFINE 18
RCANB_MSG1_t_CAN_message_buffer_CONTROL0_BIT_RTR DEFINE 30
RCANB_MSG1_t_CAN_message_buffer_CONTROL0_BIT_IDE DEFINE 31
RCANB_MSG1_t_CAN_message_buffer_LAFM_LONG DEFINE 0xFFFFD904
RCANB_MSG1_t_CAN_message_buffer_LAFM_BIT_EXTID_LAFM DEFINE 0
RCANB_MSG1_t_CAN_message_buffer_LAFM_BIT_STDID_LAFM DEFINE 18
RCANB_MSG1_t_CAN_message_buffer_LAFM_BIT_IDE_LAFM DEFINE 31
RCANB_MSG1_t_CAN_message_buffer_DATA_LONG DEFINE 0xFFFFD908
RCANB_MSG1_t_CAN_message_buffer_DATA_WORD DEFINE 0xFFFFD908
RCANB_MSG1_t_CAN_message_buffer_DATA_BYTE DEFINE 0xFFFFD908
RCANB_MSG1_t_CAN_message_buffer_CONTROL1_WORD DEFINE 0xFFFFD910
RCANB_MSG1_t_CAN_message_buffer_CONTROL1_BIT_MBC DEFINE 0
RCANB_MSG1_t_CAN_message_buffer_CONTROL1_BIT_DART DEFINE 3
RCANB_MSG1_t_CAN_message_buffer_CONTROL1_BIT_ATX DEFINE 4
RCANB_MSG1_t_CAN_message_buffer_CONTROL1_BIT_NMC DEFINE 5
RCANB_MSG1_t_CAN_message_buffer_CONTROL1_BIT_DLC DEFINE 0
RCANB_MSG1_t_CAN_message_buffer_Timestamp DEFINE 0xFFFFD912
RCANB_MSG1_t_CAN_message_buffer_TTT DEFINE 0xFFFFD914
RCANB_MSG1_t_CAN_message_buffer_TTW_WORD DEFINE 0xFFFFD916
RCANB_MSG1_t_CAN_message_buffer_TTW_BIT_rep_factor DEFINE 0
RCANB_MSG1_t_CAN_message_buffer_TTW_BIT_Offset DEFINE 8
RCANB_MSG1_t_CAN_message_buffer_TTW_BIT_TTW DEFINE 14
RCANB_MSG1_t_CAN_message_buffer_wk DEFINE 0xFFFFD918
RCANB_MSG2_t_CAN_message_buffer_CONTROL0_LONG DEFINE 0xFFFFD920
RCANB_MSG2_t_CAN_message_buffer_CONTROL0_BIT_EXTID DEFINE 0
RCANB_MSG2_t_CAN_message_buffer_CONTROL0_BIT_STDID DEFINE 18
RCANB_MSG2_t_CAN_message_buffer_CONTROL0_BIT_RTR DEFINE 30
RCANB_MSG2_t_CAN_message_buffer_CONTROL0_BIT_IDE DEFINE 31
RCANB_MSG2_t_CAN_message_buffer_LAFM_LONG DEFINE 0xFFFFD924
RCANB_MSG2_t_CAN_message_buffer_LAFM_BIT_EXTID_LAFM DEFINE 0
RCANB_MSG2_t_CAN_message_buffer_LAFM_BIT_STDID_LAFM DEFINE 18
RCANB_MSG2_t_CAN_message_buffer_LAFM_BIT_IDE_LAFM DEFINE 31
RCANB_MSG2_t_CAN_message_buffer_DATA_LONG DEFINE 0xFFFFD928
RCANB_MSG2_t_CAN_message_buffer_DATA_WORD DEFINE 0xFFFFD928
RCANB_MSG2_t_CAN_message_buffer_DATA_BYTE DEFINE 0xFFFFD928
RCANB_MSG2_t_CAN_message_buffer_CONTROL1_WORD DEFINE 0xFFFFD930
RCANB_MSG2_t_CAN_message_buffer_CONTROL1_BIT_MBC DEFINE 0
RCANB_MSG2_t_CAN_message_buffer_CONTROL1_BIT_DART DEFINE 3
RCANB_MSG2_t_CAN_message_buffer_CONTROL1_BIT_ATX DEFINE 4
RCANB_MSG2_t_CAN_message_buffer_CONTROL1_BIT_NMC DEFINE 5
RCANB_MSG2_t_CAN_message_buffer_CONTROL1_BIT_DLC DEFINE 0
RCANB_MSG2_t_CAN_message_buffer_Timestamp DEFINE 0xFFFFD932
RCANB_MSG2_t_CAN_message_buffer_TTT DEFINE 0xFFFFD934
RCANB_MSG2_t_CAN_message_buffer_TTW_WORD DEFINE 0xFFFFD936
RCANB_MSG2_t_CAN_message_buffer_TTW_BIT_rep_factor DEFINE 0
RCANB_MSG2_t_CAN_message_buffer_TTW_BIT_Offset DEFINE 8
RCANB_MSG2_t_CAN_message_buffer_TTW_BIT_TTW DEFINE 14
RCANB_MSG2_t_CAN_message_buffer_wk DEFINE 0xFFFFD938
RCANB_MSG3_t_CAN_message_buffer_CONTROL0_LONG DEFINE 0xFFFFD940
RCANB_MSG3_t_CAN_message_buffer_CONTROL0_BIT_EXTID DEFINE 0
RCANB_MSG3_t_CAN_message_buffer_CONTROL0_BIT_STDID DEFINE 18
RCANB_MSG3_t_CAN_message_buffer_CONTROL0_BIT_RTR DEFINE 30
RCANB_MSG3_t_CAN_message_buffer_CONTROL0_BIT_IDE DEFINE 31
RCANB_MSG3_t_CAN_message_buffer_LAFM_LONG DEFINE 0xFFFFD944
RCANB_MSG3_t_CAN_message_buffer_LAFM_BIT_EXTID_LAFM DEFINE 0
RCANB_MSG3_t_CAN_message_buffer_LAFM_BIT_STDID_LAFM DEFINE 18
RCANB_MSG3_t_CAN_message_buffer_LAFM_BIT_IDE_LAFM DEFINE 31
RCANB_MSG3_t_CAN_message_buffer_DATA_LONG DEFINE 0xFFFFD948
RCANB_MSG3_t_CAN_message_buffer_DATA_WORD DEFINE 0xFFFFD948
RCANB_MSG3_t_CAN_message_buffer_DATA_BYTE DEFINE 0xFFFFD948
RCANB_MSG3_t_CAN_message_buffer_CONTROL1_WORD DEFINE 0xFFFFD950
RCANB_MSG3_t_CAN_message_buffer_CONTROL1_BIT_MBC DEFINE 0
RCANB_MSG3_t_CAN_message_buffer_CONTROL1_BIT_DART DEFINE 3
RCANB_MSG3_t_CAN_message_buffer_CONTROL1_BIT_ATX DEFINE 4
RCANB_MSG3_t_CAN_message_buffer_CONTROL1_BIT_NMC DEFINE 5
RCANB_MSG3_t_CAN_message_buffer_CONTROL1_BIT_DLC DEFINE 0
RCANB_MSG3_t_CAN_message_buffer_Timestamp DEFINE 0xFFFFD952
RCANB_MSG3_t_CAN_message_buffer_TTT DEFINE 0xFFFFD954
RCANB_MSG3_t_CAN_message_buffer_TTW_WORD DEFINE 0xFFFFD956
RCANB_MSG3_t_CAN_message_buffer_TTW_BIT_rep_factor DEFINE 0
RCANB_MSG3_t_CAN_message_buffer_TTW_BIT_Offset DEFINE 8
RCANB_MSG3_t_CAN_message_buffer_TTW_BIT_TTW DEFINE 14
RCANB_MSG3_t_CAN_message_buffer_wk DEFINE 0xFFFFD958
RCANB_MSG4_t_CAN_message_buffer_CONTROL0_LONG DEFINE 0xFFFFD960
RCANB_MSG4_t_CAN_message_buffer_CONTROL0_BIT_EXTID DEFINE 0
RCANB_MSG4_t_CAN_message_buffer_CONTROL0_BIT_STDID DEFINE 18
RCANB_MSG4_t_CAN_message_buffer_CONTROL0_BIT_RTR DEFINE 30
RCANB_MSG4_t_CAN_message_buffer_CONTROL0_BIT_IDE DEFINE 31
RCANB_MSG4_t_CAN_message_buffer_LAFM_LONG DEFINE 0xFFFFD964
RCANB_MSG4_t_CAN_message_buffer_LAFM_BIT_EXTID_LAFM DEFINE 0
RCANB_MSG4_t_CAN_message_buffer_LAFM_BIT_STDID_LAFM DEFINE 18
RCANB_MSG4_t_CAN_message_buffer_LAFM_BIT_IDE_LAFM DEFINE 31
RCANB_MSG4_t_CAN_message_buffer_DATA_LONG DEFINE 0xFFFFD968
RCANB_MSG4_t_CAN_message_buffer_DATA_WORD DEFINE 0xFFFFD968
RCANB_MSG4_t_CAN_message_buffer_DATA_BYTE DEFINE 0xFFFFD968
RCANB_MSG4_t_CAN_message_buffer_CONTROL1_WORD DEFINE 0xFFFFD970
RCANB_MSG4_t_CAN_message_buffer_CONTROL1_BIT_MBC DEFINE 0
RCANB_MSG4_t_CAN_message_buffer_CONTROL1_BIT_DART DEFINE 3
RCANB_MSG4_t_CAN_message_buffer_CONTROL1_BIT_ATX DEFINE 4
RCANB_MSG4_t_CAN_message_buffer_CONTROL1_BIT_NMC DEFINE 5
RCANB_MSG4_t_CAN_message_buffer_CONTROL1_BIT_DLC DEFINE 0
RCANB_MSG4_t_CAN_message_buffer_Timestamp DEFINE 0xFFFFD972
RCANB_MSG4_t_CAN_message_buffer_TTT DEFINE 0xFFFFD974
RCANB_MSG4_t_CAN_message_buffer_TTW_WORD DEFINE 0xFFFFD976
RCANB_MSG4_t_CAN_message_buffer_TTW_BIT_rep_factor DEFINE 0
RCANB_MSG4_t_CAN_message_buffer_TTW_BIT_Offset DEFINE 8
RCANB_MSG4_t_CAN_message_buffer_TTW_BIT_TTW DEFINE 14
RCANB_MSG4_t_CAN_message_buffer_wk DEFINE 0xFFFFD978
RCANB_MSG5_t_CAN_message_buffer_CONTROL0_LONG DEFINE 0xFFFFD980
RCANB_MSG5_t_CAN_message_buffer_CONTROL0_BIT_EXTID DEFINE 0
RCANB_MSG5_t_CAN_message_buffer_CONTROL0_BIT_STDID DEFINE 18
RCANB_MSG5_t_CAN_message_buffer_CONTROL0_BIT_RTR DEFINE 30
RCANB_MSG5_t_CAN_message_buffer_CONTROL0_BIT_IDE DEFINE 31
RCANB_MSG5_t_CAN_message_buffer_LAFM_LONG DEFINE 0xFFFFD984
RCANB_MSG5_t_CAN_message_buffer_LAFM_BIT_EXTID_LAFM DEFINE 0
RCANB_MSG5_t_CAN_message_buffer_LAFM_BIT_STDID_LAFM DEFINE 18
RCANB_MSG5_t_CAN_message_buffer_LAFM_BIT_IDE_LAFM DEFINE 31
RCANB_MSG5_t_CAN_message_buffer_DATA_LONG DEFINE 0xFFFFD988
RCANB_MSG5_t_CAN_message_buffer_DATA_WORD DEFINE 0xFFFFD988
RCANB_MSG5_t_CAN_message_buffer_DATA_BYTE DEFINE 0xFFFFD988
RCANB_MSG5_t_CAN_message_buffer_CONTROL1_WORD DEFINE 0xFFFFD990
RCANB_MSG5_t_CAN_message_buffer_CONTROL1_BIT_MBC DEFINE 0
RCANB_MSG5_t_CAN_message_buffer_CONTROL1_BIT_DART DEFINE 3
RCANB_MSG5_t_CAN_message_buffer_CONTROL1_BIT_ATX DEFINE 4
RCANB_MSG5_t_CAN_message_buffer_CONTROL1_BIT_NMC DEFINE 5
RCANB_MSG5_t_CAN_message_buffer_CONTROL1_BIT_DLC DEFINE 0
RCANB_MSG5_t_CAN_message_buffer_Timestamp DEFINE 0xFFFFD992
RCANB_MSG5_t_CAN_message_buffer_TTT DEFINE 0xFFFFD994
RCANB_MSG5_t_CAN_message_buffer_TTW_WORD DEFINE 0xFFFFD996
RCANB_MSG5_t_CAN_message_buffer_TTW_BIT_rep_factor DEFINE 0
RCANB_MSG5_t_CAN_message_buffer_TTW_BIT_Offset DEFINE 8
RCANB_MSG5_t_CAN_message_buffer_TTW_BIT_TTW DEFINE 14
RCANB_MSG5_t_CAN_message_buffer_wk DEFINE 0xFFFFD998
RCANB_MSG6_t_CAN_message_buffer_CONTROL0_LONG DEFINE 0xFFFFD9A0
RCANB_MSG6_t_CAN_message_buffer_CONTROL0_BIT_EXTID DEFINE 0
RCANB_MSG6_t_CAN_message_buffer_CONTROL0_BIT_STDID DEFINE 18
RCANB_MSG6_t_CAN_message_buffer_CONTROL0_BIT_RTR DEFINE 30
RCANB_MSG6_t_CAN_message_buffer_CONTROL0_BIT_IDE DEFINE 31
RCANB_MSG6_t_CAN_message_buffer_LAFM_LONG DEFINE 0xFFFFD9A4
RCANB_MSG6_t_CAN_message_buffer_LAFM_BIT_EXTID_LAFM DEFINE 0
RCANB_MSG6_t_CAN_message_buffer_LAFM_BIT_STDID_LAFM DEFINE 18
RCANB_MSG6_t_CAN_message_buffer_LAFM_BIT_IDE_LAFM DEFINE 31
RCANB_MSG6_t_CAN_message_buffer_DATA_LONG DEFINE 0xFFFFD9A8
RCANB_MSG6_t_CAN_message_buffer_DATA_WORD DEFINE 0xFFFFD9A8
RCANB_MSG6_t_CAN_message_buffer_DATA_BYTE DEFINE 0xFFFFD9A8
RCANB_MSG6_t_CAN_message_buffer_CONTROL1_WORD DEFINE 0xFFFFD9B0
RCANB_MSG6_t_CAN_message_buffer_CONTROL1_BIT_MBC DEFINE 0
RCANB_MSG6_t_CAN_message_buffer_CONTROL1_BIT_DART DEFINE 3
RCANB_MSG6_t_CAN_message_buffer_CONTROL1_BIT_ATX DEFINE 4
RCANB_MSG6_t_CAN_message_buffer_CONTROL1_BIT_NMC DEFINE 5
RCANB_MSG6_t_CAN_message_buffer_CONTROL1_BIT_DLC DEFINE 0
RCANB_MSG6_t_CAN_message_buffer_Timestamp DEFINE 0xFFFFD9B2
RCANB_MSG6_t_CAN_message_buffer_TTT DEFINE 0xFFFFD9B4
RCANB_MSG6_t_CAN_message_buffer_TTW_WORD DEFINE 0xFFFFD9B6
RCANB_MSG6_t_CAN_message_buffer_TTW_BIT_rep_factor DEFINE 0
RCANB_MSG6_t_CAN_message_buffer_TTW_BIT_Offset DEFINE 8
RCANB_MSG6_t_CAN_message_buffer_TTW_BIT_TTW DEFINE 14
RCANB_MSG6_t_CAN_message_buffer_wk DEFINE 0xFFFFD9B8
RCANB_MSG7_t_CAN_message_buffer_CONTROL0_LONG DEFINE 0xFFFFD9C0
RCANB_MSG7_t_CAN_message_buffer_CONTROL0_BIT_EXTID DEFINE 0
RCANB_MSG7_t_CAN_message_buffer_CONTROL0_BIT_STDID DEFINE 18
RCANB_MSG7_t_CAN_message_buffer_CONTROL0_BIT_RTR DEFINE 30
RCANB_MSG7_t_CAN_message_buffer_CONTROL0_BIT_IDE DEFINE 31
RCANB_MSG7_t_CAN_message_buffer_LAFM_LONG DEFINE 0xFFFFD9C4
RCANB_MSG7_t_CAN_message_buffer_LAFM_BIT_EXTID_LAFM DEFINE 0
RCANB_MSG7_t_CAN_message_buffer_LAFM_BIT_STDID_LAFM DEFINE 18
RCANB_MSG7_t_CAN_message_buffer_LAFM_BIT_IDE_LAFM DEFINE 31
RCANB_MSG7_t_CAN_message_buffer_DATA_LONG DEFINE 0xFFFFD9C8
RCANB_MSG7_t_CAN_message_buffer_DATA_WORD DEFINE 0xFFFFD9C8
RCANB_MSG7_t_CAN_message_buffer_DATA_BYTE DEFINE 0xFFFFD9C8
RCANB_MSG7_t_CAN_message_buffer_CONTROL1_WORD DEFINE 0xFFFFD9D0
RCANB_MSG7_t_CAN_message_buffer_CONTROL1_BIT_MBC DEFINE 0
RCANB_MSG7_t_CAN_message_buffer_CONTROL1_BIT_DART DEFINE 3
RCANB_MSG7_t_CAN_message_buffer_CONTROL1_BIT_ATX DEFINE 4
RCANB_MSG7_t_CAN_message_buffer_CONTROL1_BIT_NMC DEFINE 5
RCANB_MSG7_t_CAN_message_buffer_CONTROL1_BIT_DLC DEFINE 0
RCANB_MSG7_t_CAN_message_buffer_Timestamp DEFINE 0xFFFFD9D2
RCANB_MSG7_t_CAN_message_buffer_TTT DEFINE 0xFFFFD9D4
RCANB_MSG7_t_CAN_message_buffer_TTW_WORD DEFINE 0xFFFFD9D6
RCANB_MSG7_t_CAN_message_buffer_TTW_BIT_rep_factor DEFINE 0
RCANB_MSG7_t_CAN_message_buffer_TTW_BIT_Offset DEFINE 8
RCANB_MSG7_t_CAN_message_buffer_TTW_BIT_TTW DEFINE 14
RCANB_MSG7_t_CAN_message_buffer_wk DEFINE 0xFFFFD9D8
RCANB_MSG8_t_CAN_message_buffer_CONTROL0_LONG DEFINE 0xFFFFD9E0
RCANB_MSG8_t_CAN_message_buffer_CONTROL0_BIT_EXTID DEFINE 0
RCANB_MSG8_t_CAN_message_buffer_CONTROL0_BIT_STDID DEFINE 18
RCANB_MSG8_t_CAN_message_buffer_CONTROL0_BIT_RTR DEFINE 30
RCANB_MSG8_t_CAN_message_buffer_CONTROL0_BIT_IDE DEFINE 31
RCANB_MSG8_t_CAN_message_buffer_LAFM_LONG DEFINE 0xFFFFD9E4
RCANB_MSG8_t_CAN_message_buffer_LAFM_BIT_EXTID_LAFM DEFINE 0
RCANB_MSG8_t_CAN_message_buffer_LAFM_BIT_STDID_LAFM DEFINE 18
RCANB_MSG8_t_CAN_message_buffer_LAFM_BIT_IDE_LAFM DEFINE 31
RCANB_MSG8_t_CAN_message_buffer_DATA_LONG DEFINE 0xFFFFD9E8
RCANB_MSG8_t_CAN_message_buffer_DATA_WORD DEFINE 0xFFFFD9E8
RCANB_MSG8_t_CAN_message_buffer_DATA_BYTE DEFINE 0xFFFFD9E8
RCANB_MSG8_t_CAN_message_buffer_CONTROL1_WORD DEFINE 0xFFFFD9F0
RCANB_MSG8_t_CAN_message_buffer_CONTROL1_BIT_MBC DEFINE 0
RCANB_MSG8_t_CAN_message_buffer_CONTROL1_BIT_DART DEFINE 3
RCANB_MSG8_t_CAN_message_buffer_CONTROL1_BIT_ATX DEFINE 4
RCANB_MSG8_t_CAN_message_buffer_CONTROL1_BIT_NMC DEFINE 5
RCANB_MSG8_t_CAN_message_buffer_CONTROL1_BIT_DLC DEFINE 0
RCANB_MSG8_t_CAN_message_buffer_Timestamp DEFINE 0xFFFFD9F2
RCANB_MSG8_t_CAN_message_buffer_TTT DEFINE 0xFFFFD9F4
RCANB_MSG8_t_CAN_message_buffer_TTW_WORD DEFINE 0xFFFFD9F6
RCANB_MSG8_t_CAN_message_buffer_TTW_BIT_rep_factor DEFINE 0
RCANB_MSG8_t_CAN_message_buffer_TTW_BIT_Offset DEFINE 8
RCANB_MSG8_t_CAN_message_buffer_TTW_BIT_TTW DEFINE 14
RCANB_MSG8_t_CAN_message_buffer_wk DEFINE 0xFFFFD9F8
RCANB_MSG9_t_CAN_message_buffer_CONTROL0_LONG DEFINE 0xFFFFDA00
RCANB_MSG9_t_CAN_message_buffer_CONTROL0_BIT_EXTID DEFINE 0
RCANB_MSG9_t_CAN_message_buffer_CONTROL0_BIT_STDID DEFINE 18
RCANB_MSG9_t_CAN_message_buffer_CONTROL0_BIT_RTR DEFINE 30
RCANB_MSG9_t_CAN_message_buffer_CONTROL0_BIT_IDE DEFINE 31
RCANB_MSG9_t_CAN_message_buffer_LAFM_LONG DEFINE 0xFFFFDA04
RCANB_MSG9_t_CAN_message_buffer_LAFM_BIT_EXTID_LAFM DEFINE 0
RCANB_MSG9_t_CAN_message_buffer_LAFM_BIT_STDID_LAFM DEFINE 18
RCANB_MSG9_t_CAN_message_buffer_LAFM_BIT_IDE_LAFM DEFINE 31
RCANB_MSG9_t_CAN_message_buffer_DATA_LONG DEFINE 0xFFFFDA08
RCANB_MSG9_t_CAN_message_buffer_DATA_WORD DEFINE 0xFFFFDA08
RCANB_MSG9_t_CAN_message_buffer_DATA_BYTE DEFINE 0xFFFFDA08
RCANB_MSG9_t_CAN_message_buffer_CONTROL1_WORD DEFINE 0xFFFFDA10
RCANB_MSG9_t_CAN_message_buffer_CONTROL1_BIT_MBC DEFINE 0
RCANB_MSG9_t_CAN_message_buffer_CONTROL1_BIT_DART DEFINE 3
RCANB_MSG9_t_CAN_message_buffer_CONTROL1_BIT_ATX DEFINE 4
RCANB_MSG9_t_CAN_message_buffer_CONTROL1_BIT_NMC DEFINE 5
RCANB_MSG9_t_CAN_message_buffer_CONTROL1_BIT_DLC DEFINE 0
RCANB_MSG9_t_CAN_message_buffer_Timestamp DEFINE 0xFFFFDA12
RCANB_MSG9_t_CAN_message_buffer_TTT DEFINE 0xFFFFDA14
RCANB_MSG9_t_CAN_message_buffer_TTW_WORD DEFINE 0xFFFFDA16
RCANB_MSG9_t_CAN_message_buffer_TTW_BIT_rep_factor DEFINE 0
RCANB_MSG9_t_CAN_message_buffer_TTW_BIT_Offset DEFINE 8
RCANB_MSG9_t_CAN_message_buffer_TTW_BIT_TTW DEFINE 14
RCANB_MSG9_t_CAN_message_buffer_wk DEFINE 0xFFFFDA18
RCANB_MSG10_t_CAN_message_buffer_CONTROL0_LONG DEFINE 0xFFFFDA20
RCANB_MSG10_t_CAN_message_buffer_CONTROL0_BIT_EXTID DEFINE 0
RCANB_MSG10_t_CAN_message_buffer_CONTROL0_BIT_STDID DEFINE 18
RCANB_MSG10_t_CAN_message_buffer_CONTROL0_BIT_RTR DEFINE 30
RCANB_MSG10_t_CAN_message_buffer_CONTROL0_BIT_IDE DEFINE 31
RCANB_MSG10_t_CAN_message_buffer_LAFM_LONG DEFINE 0xFFFFDA24
RCANB_MSG10_t_CAN_message_buffer_LAFM_BIT_EXTID_LAFM DEFINE 0
RCANB_MSG10_t_CAN_message_buffer_LAFM_BIT_STDID_LAFM DEFINE 18
RCANB_MSG10_t_CAN_message_buffer_LAFM_BIT_IDE_LAFM DEFINE 31
RCANB_MSG10_t_CAN_message_buffer_DATA_LONG DEFINE 0xFFFFDA28
RCANB_MSG10_t_CAN_message_buffer_DATA_WORD DEFINE 0xFFFFDA28
RCANB_MSG10_t_CAN_message_buffer_DATA_BYTE DEFINE 0xFFFFDA28
RCANB_MSG10_t_CAN_message_buffer_CONTROL1_WORD DEFINE 0xFFFFDA30
RCANB_MSG10_t_CAN_message_buffer_CONTROL1_BIT_MBC DEFINE 0
RCANB_MSG10_t_CAN_message_buffer_CONTROL1_BIT_DART DEFINE 3
RCANB_MSG10_t_CAN_message_buffer_CONTROL1_BIT_ATX DEFINE 4
RCANB_MSG10_t_CAN_message_buffer_CONTROL1_BIT_NMC DEFINE 5
RCANB_MSG10_t_CAN_message_buffer_CONTROL1_BIT_DLC DEFINE 0
RCANB_MSG10_t_CAN_message_buffer_Timestamp DEFINE 0xFFFFDA32
RCANB_MSG10_t_CAN_message_buffer_TTT DEFINE 0xFFFFDA34
RCANB_MSG10_t_CAN_message_buffer_TTW_WORD DEFINE 0xFFFFDA36
RCANB_MSG10_t_CAN_message_buffer_TTW_BIT_rep_factor DEFINE 0
RCANB_MSG10_t_CAN_message_buffer_TTW_BIT_Offset DEFINE 8
RCANB_MSG10_t_CAN_message_buffer_TTW_BIT_TTW DEFINE 14
RCANB_MSG10_t_CAN_message_buffer_wk DEFINE 0xFFFFDA38
RCANB_MSG11_t_CAN_message_buffer_CONTROL0_LONG DEFINE 0xFFFFDA40
RCANB_MSG11_t_CAN_message_buffer_CONTROL0_BIT_EXTID DEFINE 0
RCANB_MSG11_t_CAN_message_buffer_CONTROL0_BIT_STDID DEFINE 18
RCANB_MSG11_t_CAN_message_buffer_CONTROL0_BIT_RTR DEFINE 30
RCANB_MSG11_t_CAN_message_buffer_CONTROL0_BIT_IDE DEFINE 31
RCANB_MSG11_t_CAN_message_buffer_LAFM_LONG DEFINE 0xFFFFDA44
RCANB_MSG11_t_CAN_message_buffer_LAFM_BIT_EXTID_LAFM DEFINE 0
RCANB_MSG11_t_CAN_message_buffer_LAFM_BIT_STDID_LAFM DEFINE 18
RCANB_MSG11_t_CAN_message_buffer_LAFM_BIT_IDE_LAFM DEFINE 31
RCANB_MSG11_t_CAN_message_buffer_DATA_LONG DEFINE 0xFFFFDA48
RCANB_MSG11_t_CAN_message_buffer_DATA_WORD DEFINE 0xFFFFDA48
RCANB_MSG11_t_CAN_message_buffer_DATA_BYTE DEFINE 0xFFFFDA48
RCANB_MSG11_t_CAN_message_buffer_CONTROL1_WORD DEFINE 0xFFFFDA50
RCANB_MSG11_t_CAN_message_buffer_CONTROL1_BIT_MBC DEFINE 0
RCANB_MSG11_t_CAN_message_buffer_CONTROL1_BIT_DART DEFINE 3
RCANB_MSG11_t_CAN_message_buffer_CONTROL1_BIT_ATX DEFINE 4
RCANB_MSG11_t_CAN_message_buffer_CONTROL1_BIT_NMC DEFINE 5
RCANB_MSG11_t_CAN_message_buffer_CONTROL1_BIT_DLC DEFINE 0
RCANB_MSG11_t_CAN_message_buffer_Timestamp DEFINE 0xFFFFDA52
RCANB_MSG11_t_CAN_message_buffer_TTT DEFINE 0xFFFFDA54
RCANB_MSG11_t_CAN_message_buffer_TTW_WORD DEFINE 0xFFFFDA56
RCANB_MSG11_t_CAN_message_buffer_TTW_BIT_rep_factor DEFINE 0
RCANB_MSG11_t_CAN_message_buffer_TTW_BIT_Offset DEFINE 8
RCANB_MSG11_t_CAN_message_buffer_TTW_BIT_TTW DEFINE 14
RCANB_MSG11_t_CAN_message_buffer_wk DEFINE 0xFFFFDA58
RCANB_MSG12_t_CAN_message_buffer_CONTROL0_LONG DEFINE 0xFFFFDA60
RCANB_MSG12_t_CAN_message_buffer_CONTROL0_BIT_EXTID DEFINE 0
RCANB_MSG12_t_CAN_message_buffer_CONTROL0_BIT_STDID DEFINE 18
RCANB_MSG12_t_CAN_message_buffer_CONTROL0_BIT_RTR DEFINE 30
RCANB_MSG12_t_CAN_message_buffer_CONTROL0_BIT_IDE DEFINE 31
RCANB_MSG12_t_CAN_message_buffer_LAFM_LONG DEFINE 0xFFFFDA64
RCANB_MSG12_t_CAN_message_buffer_LAFM_BIT_EXTID_LAFM DEFINE 0
RCANB_MSG12_t_CAN_message_buffer_LAFM_BIT_STDID_LAFM DEFINE 18
RCANB_MSG12_t_CAN_message_buffer_LAFM_BIT_IDE_LAFM DEFINE 31
RCANB_MSG12_t_CAN_message_buffer_DATA_LONG DEFINE 0xFFFFDA68
RCANB_MSG12_t_CAN_message_buffer_DATA_WORD DEFINE 0xFFFFDA68
RCANB_MSG12_t_CAN_message_buffer_DATA_BYTE DEFINE 0xFFFFDA68
RCANB_MSG12_t_CAN_message_buffer_CONTROL1_WORD DEFINE 0xFFFFDA70
RCANB_MSG12_t_CAN_message_buffer_CONTROL1_BIT_MBC DEFINE 0
RCANB_MSG12_t_CAN_message_buffer_CONTROL1_BIT_DART DEFINE 3
RCANB_MSG12_t_CAN_message_buffer_CONTROL1_BIT_ATX DEFINE 4
RCANB_MSG12_t_CAN_message_buffer_CONTROL1_BIT_NMC DEFINE 5
RCANB_MSG12_t_CAN_message_buffer_CONTROL1_BIT_DLC DEFINE 0
RCANB_MSG12_t_CAN_message_buffer_Timestamp DEFINE 0xFFFFDA72
RCANB_MSG12_t_CAN_message_buffer_TTT DEFINE 0xFFFFDA74
RCANB_MSG12_t_CAN_message_buffer_TTW_WORD DEFINE 0xFFFFDA76
RCANB_MSG12_t_CAN_message_buffer_TTW_BIT_rep_factor DEFINE 0
RCANB_MSG12_t_CAN_message_buffer_TTW_BIT_Offset DEFINE 8
RCANB_MSG12_t_CAN_message_buffer_TTW_BIT_TTW DEFINE 14
RCANB_MSG12_t_CAN_message_buffer_wk DEFINE 0xFFFFDA78
RCANB_MSG13_t_CAN_message_buffer_CONTROL0_LONG DEFINE 0xFFFFDA80
RCANB_MSG13_t_CAN_message_buffer_CONTROL0_BIT_EXTID DEFINE 0
RCANB_MSG13_t_CAN_message_buffer_CONTROL0_BIT_STDID DEFINE 18
RCANB_MSG13_t_CAN_message_buffer_CONTROL0_BIT_RTR DEFINE 30
RCANB_MSG13_t_CAN_message_buffer_CONTROL0_BIT_IDE DEFINE 31
RCANB_MSG13_t_CAN_message_buffer_LAFM_LONG DEFINE 0xFFFFDA84
RCANB_MSG13_t_CAN_message_buffer_LAFM_BIT_EXTID_LAFM DEFINE 0
RCANB_MSG13_t_CAN_message_buffer_LAFM_BIT_STDID_LAFM DEFINE 18
RCANB_MSG13_t_CAN_message_buffer_LAFM_BIT_IDE_LAFM DEFINE 31
RCANB_MSG13_t_CAN_message_buffer_DATA_LONG DEFINE 0xFFFFDA88
RCANB_MSG13_t_CAN_message_buffer_DATA_WORD DEFINE 0xFFFFDA88
RCANB_MSG13_t_CAN_message_buffer_DATA_BYTE DEFINE 0xFFFFDA88
RCANB_MSG13_t_CAN_message_buffer_CONTROL1_WORD DEFINE 0xFFFFDA90
RCANB_MSG13_t_CAN_message_buffer_CONTROL1_BIT_MBC DEFINE 0
RCANB_MSG13_t_CAN_message_buffer_CONTROL1_BIT_DART DEFINE 3
RCANB_MSG13_t_CAN_message_buffer_CONTROL1_BIT_ATX DEFINE 4
RCANB_MSG13_t_CAN_message_buffer_CONTROL1_BIT_NMC DEFINE 5
RCANB_MSG13_t_CAN_message_buffer_CONTROL1_BIT_DLC DEFINE 0
RCANB_MSG13_t_CAN_message_buffer_Timestamp DEFINE 0xFFFFDA92
RCANB_MSG13_t_CAN_message_buffer_TTT DEFINE 0xFFFFDA94
RCANB_MSG13_t_CAN_message_buffer_TTW_WORD DEFINE 0xFFFFDA96
RCANB_MSG13_t_CAN_message_buffer_TTW_BIT_rep_factor DEFINE 0
RCANB_MSG13_t_CAN_message_buffer_TTW_BIT_Offset DEFINE 8
RCANB_MSG13_t_CAN_message_buffer_TTW_BIT_TTW DEFINE 14
RCANB_MSG13_t_CAN_message_buffer_wk DEFINE 0xFFFFDA98
RCANB_MSG14_t_CAN_message_buffer_CONTROL0_LONG DEFINE 0xFFFFDAA0
RCANB_MSG14_t_CAN_message_buffer_CONTROL0_BIT_EXTID DEFINE 0
RCANB_MSG14_t_CAN_message_buffer_CONTROL0_BIT_STDID DEFINE 18
RCANB_MSG14_t_CAN_message_buffer_CONTROL0_BIT_RTR DEFINE 30
RCANB_MSG14_t_CAN_message_buffer_CONTROL0_BIT_IDE DEFINE 31
RCANB_MSG14_t_CAN_message_buffer_LAFM_LONG DEFINE 0xFFFFDAA4
RCANB_MSG14_t_CAN_message_buffer_LAFM_BIT_EXTID_LAFM DEFINE 0
RCANB_MSG14_t_CAN_message_buffer_LAFM_BIT_STDID_LAFM DEFINE 18
RCANB_MSG14_t_CAN_message_buffer_LAFM_BIT_IDE_LAFM DEFINE 31
RCANB_MSG14_t_CAN_message_buffer_DATA_LONG DEFINE 0xFFFFDAA8
RCANB_MSG14_t_CAN_message_buffer_DATA_WORD DEFINE 0xFFFFDAA8
RCANB_MSG14_t_CAN_message_buffer_DATA_BYTE DEFINE 0xFFFFDAA8
RCANB_MSG14_t_CAN_message_buffer_CONTROL1_WORD DEFINE 0xFFFFDAB0
RCANB_MSG14_t_CAN_message_buffer_CONTROL1_BIT_MBC DEFINE 0
RCANB_MSG14_t_CAN_message_buffer_CONTROL1_BIT_DART DEFINE 3
RCANB_MSG14_t_CAN_message_buffer_CONTROL1_BIT_ATX DEFINE 4
RCANB_MSG14_t_CAN_message_buffer_CONTROL1_BIT_NMC DEFINE 5
RCANB_MSG14_t_CAN_message_buffer_CONTROL1_BIT_DLC DEFINE 0
RCANB_MSG14_t_CAN_message_buffer_Timestamp DEFINE 0xFFFFDAB2
RCANB_MSG14_t_CAN_message_buffer_TTT DEFINE 0xFFFFDAB4
RCANB_MSG14_t_CAN_message_buffer_TTW_WORD DEFINE 0xFFFFDAB6
RCANB_MSG14_t_CAN_message_buffer_TTW_BIT_rep_factor DEFINE 0
RCANB_MSG14_t_CAN_message_buffer_TTW_BIT_Offset DEFINE 8
RCANB_MSG14_t_CAN_message_buffer_TTW_BIT_TTW DEFINE 14
RCANB_MSG14_t_CAN_message_buffer_wk DEFINE 0xFFFFDAB8
RCANB_MSG15_t_CAN_message_buffer_CONTROL0_LONG DEFINE 0xFFFFDAC0
RCANB_MSG15_t_CAN_message_buffer_CONTROL0_BIT_EXTID DEFINE 0
RCANB_MSG15_t_CAN_message_buffer_CONTROL0_BIT_STDID DEFINE 18
RCANB_MSG15_t_CAN_message_buffer_CONTROL0_BIT_RTR DEFINE 30
RCANB_MSG15_t_CAN_message_buffer_CONTROL0_BIT_IDE DEFINE 31
RCANB_MSG15_t_CAN_message_buffer_LAFM_LONG DEFINE 0xFFFFDAC4
RCANB_MSG15_t_CAN_message_buffer_LAFM_BIT_EXTID_LAFM DEFINE 0
RCANB_MSG15_t_CAN_message_buffer_LAFM_BIT_STDID_LAFM DEFINE 18
RCANB_MSG15_t_CAN_message_buffer_LAFM_BIT_IDE_LAFM DEFINE 31
RCANB_MSG15_t_CAN_message_buffer_DATA_LONG DEFINE 0xFFFFDAC8
RCANB_MSG15_t_CAN_message_buffer_DATA_WORD DEFINE 0xFFFFDAC8
RCANB_MSG15_t_CAN_message_buffer_DATA_BYTE DEFINE 0xFFFFDAC8
RCANB_MSG15_t_CAN_message_buffer_CONTROL1_WORD DEFINE 0xFFFFDAD0
RCANB_MSG15_t_CAN_message_buffer_CONTROL1_BIT_MBC DEFINE 0
RCANB_MSG15_t_CAN_message_buffer_CONTROL1_BIT_DART DEFINE 3
RCANB_MSG15_t_CAN_message_buffer_CONTROL1_BIT_ATX DEFINE 4
RCANB_MSG15_t_CAN_message_buffer_CONTROL1_BIT_NMC DEFINE 5
RCANB_MSG15_t_CAN_message_buffer_CONTROL1_BIT_DLC DEFINE 0
RCANB_MSG15_t_CAN_message_buffer_Timestamp DEFINE 0xFFFFDAD2
RCANB_MSG15_t_CAN_message_buffer_TTT DEFINE 0xFFFFDAD4
RCANB_MSG15_t_CAN_message_buffer_TTW_WORD DEFINE 0xFFFFDAD6
RCANB_MSG15_t_CAN_message_buffer_TTW_BIT_rep_factor DEFINE 0
RCANB_MSG15_t_CAN_message_buffer_TTW_BIT_Offset DEFINE 8
RCANB_MSG15_t_CAN_message_buffer_TTW_BIT_TTW DEFINE 14
RCANB_MSG15_t_CAN_message_buffer_wk DEFINE 0xFFFFDAD8
RCANB_MSG16_t_CAN_message_buffer_CONTROL0_LONG DEFINE 0xFFFFDAE0
RCANB_MSG16_t_CAN_message_buffer_CONTROL0_BIT_EXTID DEFINE 0
RCANB_MSG16_t_CAN_message_buffer_CONTROL0_BIT_STDID DEFINE 18
RCANB_MSG16_t_CAN_message_buffer_CONTROL0_BIT_RTR DEFINE 30
RCANB_MSG16_t_CAN_message_buffer_CONTROL0_BIT_IDE DEFINE 31
RCANB_MSG16_t_CAN_message_buffer_LAFM_LONG DEFINE 0xFFFFDAE4
RCANB_MSG16_t_CAN_message_buffer_LAFM_BIT_EXTID_LAFM DEFINE 0
RCANB_MSG16_t_CAN_message_buffer_LAFM_BIT_STDID_LAFM DEFINE 18
RCANB_MSG16_t_CAN_message_buffer_LAFM_BIT_IDE_LAFM DEFINE 31
RCANB_MSG16_t_CAN_message_buffer_DATA_LONG DEFINE 0xFFFFDAE8
RCANB_MSG16_t_CAN_message_buffer_DATA_WORD DEFINE 0xFFFFDAE8
RCANB_MSG16_t_CAN_message_buffer_DATA_BYTE DEFINE 0xFFFFDAE8
RCANB_MSG16_t_CAN_message_buffer_CONTROL1_WORD DEFINE 0xFFFFDAF0
RCANB_MSG16_t_CAN_message_buffer_CONTROL1_BIT_MBC DEFINE 0
RCANB_MSG16_t_CAN_message_buffer_CONTROL1_BIT_DART DEFINE 3
RCANB_MSG16_t_CAN_message_buffer_CONTROL1_BIT_ATX DEFINE 4
RCANB_MSG16_t_CAN_message_buffer_CONTROL1_BIT_NMC DEFINE 5
RCANB_MSG16_t_CAN_message_buffer_CONTROL1_BIT_DLC DEFINE 0
RCANB_MSG16_t_CAN_message_buffer_Timestamp DEFINE 0xFFFFDAF2
RCANB_MSG16_t_CAN_message_buffer_TTT DEFINE 0xFFFFDAF4
RCANB_MSG16_t_CAN_message_buffer_TTW_WORD DEFINE 0xFFFFDAF6
RCANB_MSG16_t_CAN_message_buffer_TTW_BIT_rep_factor DEFINE 0
RCANB_MSG16_t_CAN_message_buffer_TTW_BIT_Offset DEFINE 8
RCANB_MSG16_t_CAN_message_buffer_TTW_BIT_TTW DEFINE 14
RCANB_MSG16_t_CAN_message_buffer_wk DEFINE 0xFFFFDAF8
RCANB_MSG17_t_CAN_message_buffer_CONTROL0_LONG DEFINE 0xFFFFDB00
RCANB_MSG17_t_CAN_message_buffer_CONTROL0_BIT_EXTID DEFINE 0
RCANB_MSG17_t_CAN_message_buffer_CONTROL0_BIT_STDID DEFINE 18
RCANB_MSG17_t_CAN_message_buffer_CONTROL0_BIT_RTR DEFINE 30
RCANB_MSG17_t_CAN_message_buffer_CONTROL0_BIT_IDE DEFINE 31
RCANB_MSG17_t_CAN_message_buffer_LAFM_LONG DEFINE 0xFFFFDB04
RCANB_MSG17_t_CAN_message_buffer_LAFM_BIT_EXTID_LAFM DEFINE 0
RCANB_MSG17_t_CAN_message_buffer_LAFM_BIT_STDID_LAFM DEFINE 18
RCANB_MSG17_t_CAN_message_buffer_LAFM_BIT_IDE_LAFM DEFINE 31
RCANB_MSG17_t_CAN_message_buffer_DATA_LONG DEFINE 0xFFFFDB08
RCANB_MSG17_t_CAN_message_buffer_DATA_WORD DEFINE 0xFFFFDB08
RCANB_MSG17_t_CAN_message_buffer_DATA_BYTE DEFINE 0xFFFFDB08
RCANB_MSG17_t_CAN_message_buffer_CONTROL1_WORD DEFINE 0xFFFFDB10
RCANB_MSG17_t_CAN_message_buffer_CONTROL1_BIT_MBC DEFINE 0
RCANB_MSG17_t_CAN_message_buffer_CONTROL1_BIT_DART DEFINE 3
RCANB_MSG17_t_CAN_message_buffer_CONTROL1_BIT_ATX DEFINE 4
RCANB_MSG17_t_CAN_message_buffer_CONTROL1_BIT_NMC DEFINE 5
RCANB_MSG17_t_CAN_message_buffer_CONTROL1_BIT_DLC DEFINE 0
RCANB_MSG17_t_CAN_message_buffer_Timestamp DEFINE 0xFFFFDB12
RCANB_MSG17_t_CAN_message_buffer_TTT DEFINE 0xFFFFDB14
RCANB_MSG17_t_CAN_message_buffer_TTW_WORD DEFINE 0xFFFFDB16
RCANB_MSG17_t_CAN_message_buffer_TTW_BIT_rep_factor DEFINE 0
RCANB_MSG17_t_CAN_message_buffer_TTW_BIT_Offset DEFINE 8
RCANB_MSG17_t_CAN_message_buffer_TTW_BIT_TTW DEFINE 14
RCANB_MSG17_t_CAN_message_buffer_wk DEFINE 0xFFFFDB18
RCANB_MSG18_t_CAN_message_buffer_CONTROL0_LONG DEFINE 0xFFFFDB20
RCANB_MSG18_t_CAN_message_buffer_CONTROL0_BIT_EXTID DEFINE 0
RCANB_MSG18_t_CAN_message_buffer_CONTROL0_BIT_STDID DEFINE 18
RCANB_MSG18_t_CAN_message_buffer_CONTROL0_BIT_RTR DEFINE 30
RCANB_MSG18_t_CAN_message_buffer_CONTROL0_BIT_IDE DEFINE 31
RCANB_MSG18_t_CAN_message_buffer_LAFM_LONG DEFINE 0xFFFFDB24
RCANB_MSG18_t_CAN_message_buffer_LAFM_BIT_EXTID_LAFM DEFINE 0
RCANB_MSG18_t_CAN_message_buffer_LAFM_BIT_STDID_LAFM DEFINE 18
RCANB_MSG18_t_CAN_message_buffer_LAFM_BIT_IDE_LAFM DEFINE 31
RCANB_MSG18_t_CAN_message_buffer_DATA_LONG DEFINE 0xFFFFDB28
RCANB_MSG18_t_CAN_message_buffer_DATA_WORD DEFINE 0xFFFFDB28
RCANB_MSG18_t_CAN_message_buffer_DATA_BYTE DEFINE 0xFFFFDB28
RCANB_MSG18_t_CAN_message_buffer_CONTROL1_WORD DEFINE 0xFFFFDB30
RCANB_MSG18_t_CAN_message_buffer_CONTROL1_BIT_MBC DEFINE 0
RCANB_MSG18_t_CAN_message_buffer_CONTROL1_BIT_DART DEFINE 3
RCANB_MSG18_t_CAN_message_buffer_CONTROL1_BIT_ATX DEFINE 4
RCANB_MSG18_t_CAN_message_buffer_CONTROL1_BIT_NMC DEFINE 5
RCANB_MSG18_t_CAN_message_buffer_CONTROL1_BIT_DLC DEFINE 0
RCANB_MSG18_t_CAN_message_buffer_Timestamp DEFINE 0xFFFFDB32
RCANB_MSG18_t_CAN_message_buffer_TTT DEFINE 0xFFFFDB34
RCANB_MSG18_t_CAN_message_buffer_TTW_WORD DEFINE 0xFFFFDB36
RCANB_MSG18_t_CAN_message_buffer_TTW_BIT_rep_factor DEFINE 0
RCANB_MSG18_t_CAN_message_buffer_TTW_BIT_Offset DEFINE 8
RCANB_MSG18_t_CAN_message_buffer_TTW_BIT_TTW DEFINE 14
RCANB_MSG18_t_CAN_message_buffer_wk DEFINE 0xFFFFDB38
RCANB_MSG19_t_CAN_message_buffer_CONTROL0_LONG DEFINE 0xFFFFDB40
RCANB_MSG19_t_CAN_message_buffer_CONTROL0_BIT_EXTID DEFINE 0
RCANB_MSG19_t_CAN_message_buffer_CONTROL0_BIT_STDID DEFINE 18
RCANB_MSG19_t_CAN_message_buffer_CONTROL0_BIT_RTR DEFINE 30
RCANB_MSG19_t_CAN_message_buffer_CONTROL0_BIT_IDE DEFINE 31
RCANB_MSG19_t_CAN_message_buffer_LAFM_LONG DEFINE 0xFFFFDB44
RCANB_MSG19_t_CAN_message_buffer_LAFM_BIT_EXTID_LAFM DEFINE 0
RCANB_MSG19_t_CAN_message_buffer_LAFM_BIT_STDID_LAFM DEFINE 18
RCANB_MSG19_t_CAN_message_buffer_LAFM_BIT_IDE_LAFM DEFINE 31
RCANB_MSG19_t_CAN_message_buffer_DATA_LONG DEFINE 0xFFFFDB48
RCANB_MSG19_t_CAN_message_buffer_DATA_WORD DEFINE 0xFFFFDB48
RCANB_MSG19_t_CAN_message_buffer_DATA_BYTE DEFINE 0xFFFFDB48
RCANB_MSG19_t_CAN_message_buffer_CONTROL1_WORD DEFINE 0xFFFFDB50
RCANB_MSG19_t_CAN_message_buffer_CONTROL1_BIT_MBC DEFINE 0
RCANB_MSG19_t_CAN_message_buffer_CONTROL1_BIT_DART DEFINE 3
RCANB_MSG19_t_CAN_message_buffer_CONTROL1_BIT_ATX DEFINE 4
RCANB_MSG19_t_CAN_message_buffer_CONTROL1_BIT_NMC DEFINE 5
RCANB_MSG19_t_CAN_message_buffer_CONTROL1_BIT_DLC DEFINE 0
RCANB_MSG19_t_CAN_message_buffer_Timestamp DEFINE 0xFFFFDB52
RCANB_MSG19_t_CAN_message_buffer_TTT DEFINE 0xFFFFDB54
RCANB_MSG19_t_CAN_message_buffer_TTW_WORD DEFINE 0xFFFFDB56
RCANB_MSG19_t_CAN_message_buffer_TTW_BIT_rep_factor DEFINE 0
RCANB_MSG19_t_CAN_message_buffer_TTW_BIT_Offset DEFINE 8
RCANB_MSG19_t_CAN_message_buffer_TTW_BIT_TTW DEFINE 14
RCANB_MSG19_t_CAN_message_buffer_wk DEFINE 0xFFFFDB58
RCANB_MSG20_t_CAN_message_buffer_CONTROL0_LONG DEFINE 0xFFFFDB60
RCANB_MSG20_t_CAN_message_buffer_CONTROL0_BIT_EXTID DEFINE 0
RCANB_MSG20_t_CAN_message_buffer_CONTROL0_BIT_STDID DEFINE 18
RCANB_MSG20_t_CAN_message_buffer_CONTROL0_BIT_RTR DEFINE 30
RCANB_MSG20_t_CAN_message_buffer_CONTROL0_BIT_IDE DEFINE 31
RCANB_MSG20_t_CAN_message_buffer_LAFM_LONG DEFINE 0xFFFFDB64
RCANB_MSG20_t_CAN_message_buffer_LAFM_BIT_EXTID_LAFM DEFINE 0
RCANB_MSG20_t_CAN_message_buffer_LAFM_BIT_STDID_LAFM DEFINE 18
RCANB_MSG20_t_CAN_message_buffer_LAFM_BIT_IDE_LAFM DEFINE 31
RCANB_MSG20_t_CAN_message_buffer_DATA_LONG DEFINE 0xFFFFDB68
RCANB_MSG20_t_CAN_message_buffer_DATA_WORD DEFINE 0xFFFFDB68
RCANB_MSG20_t_CAN_message_buffer_DATA_BYTE DEFINE 0xFFFFDB68
RCANB_MSG20_t_CAN_message_buffer_CONTROL1_WORD DEFINE 0xFFFFDB70
RCANB_MSG20_t_CAN_message_buffer_CONTROL1_BIT_MBC DEFINE 0
RCANB_MSG20_t_CAN_message_buffer_CONTROL1_BIT_DART DEFINE 3
RCANB_MSG20_t_CAN_message_buffer_CONTROL1_BIT_ATX DEFINE 4
RCANB_MSG20_t_CAN_message_buffer_CONTROL1_BIT_NMC DEFINE 5
RCANB_MSG20_t_CAN_message_buffer_CONTROL1_BIT_DLC DEFINE 0
RCANB_MSG20_t_CAN_message_buffer_Timestamp DEFINE 0xFFFFDB72
RCANB_MSG20_t_CAN_message_buffer_TTT DEFINE 0xFFFFDB74
RCANB_MSG20_t_CAN_message_buffer_TTW_WORD DEFINE 0xFFFFDB76
RCANB_MSG20_t_CAN_message_buffer_TTW_BIT_rep_factor DEFINE 0
RCANB_MSG20_t_CAN_message_buffer_TTW_BIT_Offset DEFINE 8
RCANB_MSG20_t_CAN_message_buffer_TTW_BIT_TTW DEFINE 14
RCANB_MSG20_t_CAN_message_buffer_wk DEFINE 0xFFFFDB78
RCANB_MSG21_t_CAN_message_buffer_CONTROL0_LONG DEFINE 0xFFFFDB80
RCANB_MSG21_t_CAN_message_buffer_CONTROL0_BIT_EXTID DEFINE 0
RCANB_MSG21_t_CAN_message_buffer_CONTROL0_BIT_STDID DEFINE 18
RCANB_MSG21_t_CAN_message_buffer_CONTROL0_BIT_RTR DEFINE 30
RCANB_MSG21_t_CAN_message_buffer_CONTROL0_BIT_IDE DEFINE 31
RCANB_MSG21_t_CAN_message_buffer_LAFM_LONG DEFINE 0xFFFFDB84
RCANB_MSG21_t_CAN_message_buffer_LAFM_BIT_EXTID_LAFM DEFINE 0
RCANB_MSG21_t_CAN_message_buffer_LAFM_BIT_STDID_LAFM DEFINE 18
RCANB_MSG21_t_CAN_message_buffer_LAFM_BIT_IDE_LAFM DEFINE 31
RCANB_MSG21_t_CAN_message_buffer_DATA_LONG DEFINE 0xFFFFDB88
RCANB_MSG21_t_CAN_message_buffer_DATA_WORD DEFINE 0xFFFFDB88
RCANB_MSG21_t_CAN_message_buffer_DATA_BYTE DEFINE 0xFFFFDB88
RCANB_MSG21_t_CAN_message_buffer_CONTROL1_WORD DEFINE 0xFFFFDB90
RCANB_MSG21_t_CAN_message_buffer_CONTROL1_BIT_MBC DEFINE 0
RCANB_MSG21_t_CAN_message_buffer_CONTROL1_BIT_DART DEFINE 3
RCANB_MSG21_t_CAN_message_buffer_CONTROL1_BIT_ATX DEFINE 4
RCANB_MSG21_t_CAN_message_buffer_CONTROL1_BIT_NMC DEFINE 5
RCANB_MSG21_t_CAN_message_buffer_CONTROL1_BIT_DLC DEFINE 0
RCANB_MSG21_t_CAN_message_buffer_Timestamp DEFINE 0xFFFFDB92
RCANB_MSG21_t_CAN_message_buffer_TTT DEFINE 0xFFFFDB94
RCANB_MSG21_t_CAN_message_buffer_TTW_WORD DEFINE 0xFFFFDB96
RCANB_MSG21_t_CAN_message_buffer_TTW_BIT_rep_factor DEFINE 0
RCANB_MSG21_t_CAN_message_buffer_TTW_BIT_Offset DEFINE 8
RCANB_MSG21_t_CAN_message_buffer_TTW_BIT_TTW DEFINE 14
RCANB_MSG21_t_CAN_message_buffer_wk DEFINE 0xFFFFDB98
RCANB_MSG22_t_CAN_message_buffer_CONTROL0_LONG DEFINE 0xFFFFDBA0
RCANB_MSG22_t_CAN_message_buffer_CONTROL0_BIT_EXTID DEFINE 0
RCANB_MSG22_t_CAN_message_buffer_CONTROL0_BIT_STDID DEFINE 18
RCANB_MSG22_t_CAN_message_buffer_CONTROL0_BIT_RTR DEFINE 30
RCANB_MSG22_t_CAN_message_buffer_CONTROL0_BIT_IDE DEFINE 31
RCANB_MSG22_t_CAN_message_buffer_LAFM_LONG DEFINE 0xFFFFDBA4
RCANB_MSG22_t_CAN_message_buffer_LAFM_BIT_EXTID_LAFM DEFINE 0
RCANB_MSG22_t_CAN_message_buffer_LAFM_BIT_STDID_LAFM DEFINE 18
RCANB_MSG22_t_CAN_message_buffer_LAFM_BIT_IDE_LAFM DEFINE 31
RCANB_MSG22_t_CAN_message_buffer_DATA_LONG DEFINE 0xFFFFDBA8
RCANB_MSG22_t_CAN_message_buffer_DATA_WORD DEFINE 0xFFFFDBA8
RCANB_MSG22_t_CAN_message_buffer_DATA_BYTE DEFINE 0xFFFFDBA8
RCANB_MSG22_t_CAN_message_buffer_CONTROL1_WORD DEFINE 0xFFFFDBB0
RCANB_MSG22_t_CAN_message_buffer_CONTROL1_BIT_MBC DEFINE 0
RCANB_MSG22_t_CAN_message_buffer_CONTROL1_BIT_DART DEFINE 3
RCANB_MSG22_t_CAN_message_buffer_CONTROL1_BIT_ATX DEFINE 4
RCANB_MSG22_t_CAN_message_buffer_CONTROL1_BIT_NMC DEFINE 5
RCANB_MSG22_t_CAN_message_buffer_CONTROL1_BIT_DLC DEFINE 0
RCANB_MSG22_t_CAN_message_buffer_Timestamp DEFINE 0xFFFFDBB2
RCANB_MSG22_t_CAN_message_buffer_TTT DEFINE 0xFFFFDBB4
RCANB_MSG22_t_CAN_message_buffer_TTW_WORD DEFINE 0xFFFFDBB6
RCANB_MSG22_t_CAN_message_buffer_TTW_BIT_rep_factor DEFINE 0
RCANB_MSG22_t_CAN_message_buffer_TTW_BIT_Offset DEFINE 8
RCANB_MSG22_t_CAN_message_buffer_TTW_BIT_TTW DEFINE 14
RCANB_MSG22_t_CAN_message_buffer_wk DEFINE 0xFFFFDBB8
RCANB_MSG23_t_CAN_message_buffer_CONTROL0_LONG DEFINE 0xFFFFDBC0
RCANB_MSG23_t_CAN_message_buffer_CONTROL0_BIT_EXTID DEFINE 0
RCANB_MSG23_t_CAN_message_buffer_CONTROL0_BIT_STDID DEFINE 18
RCANB_MSG23_t_CAN_message_buffer_CONTROL0_BIT_RTR DEFINE 30
RCANB_MSG23_t_CAN_message_buffer_CONTROL0_BIT_IDE DEFINE 31
RCANB_MSG23_t_CAN_message_buffer_LAFM_LONG DEFINE 0xFFFFDBC4
RCANB_MSG23_t_CAN_message_buffer_LAFM_BIT_EXTID_LAFM DEFINE 0
RCANB_MSG23_t_CAN_message_buffer_LAFM_BIT_STDID_LAFM DEFINE 18
RCANB_MSG23_t_CAN_message_buffer_LAFM_BIT_IDE_LAFM DEFINE 31
RCANB_MSG23_t_CAN_message_buffer_DATA_LONG DEFINE 0xFFFFDBC8
RCANB_MSG23_t_CAN_message_buffer_DATA_WORD DEFINE 0xFFFFDBC8
RCANB_MSG23_t_CAN_message_buffer_DATA_BYTE DEFINE 0xFFFFDBC8
RCANB_MSG23_t_CAN_message_buffer_CONTROL1_WORD DEFINE 0xFFFFDBD0
RCANB_MSG23_t_CAN_message_buffer_CONTROL1_BIT_MBC DEFINE 0
RCANB_MSG23_t_CAN_message_buffer_CONTROL1_BIT_DART DEFINE 3
RCANB_MSG23_t_CAN_message_buffer_CONTROL1_BIT_ATX DEFINE 4
RCANB_MSG23_t_CAN_message_buffer_CONTROL1_BIT_NMC DEFINE 5
RCANB_MSG23_t_CAN_message_buffer_CONTROL1_BIT_DLC DEFINE 0
RCANB_MSG23_t_CAN_message_buffer_Timestamp DEFINE 0xFFFFDBD2
RCANB_MSG23_t_CAN_message_buffer_TTT DEFINE 0xFFFFDBD4
RCANB_MSG23_t_CAN_message_buffer_TTW_WORD DEFINE 0xFFFFDBD6
RCANB_MSG23_t_CAN_message_buffer_TTW_BIT_rep_factor DEFINE 0
RCANB_MSG23_t_CAN_message_buffer_TTW_BIT_Offset DEFINE 8
RCANB_MSG23_t_CAN_message_buffer_TTW_BIT_TTW DEFINE 14
RCANB_MSG23_t_CAN_message_buffer_wk DEFINE 0xFFFFDBD8
RCANB_MSG24_t_CAN_message_buffer_CONTROL0_LONG DEFINE 0xFFFFDBE0
RCANB_MSG24_t_CAN_message_buffer_CONTROL0_BIT_EXTID DEFINE 0
RCANB_MSG24_t_CAN_message_buffer_CONTROL0_BIT_STDID DEFINE 18
RCANB_MSG24_t_CAN_message_buffer_CONTROL0_BIT_RTR DEFINE 30
RCANB_MSG24_t_CAN_message_buffer_CONTROL0_BIT_IDE DEFINE 31
RCANB_MSG24_t_CAN_message_buffer_LAFM_LONG DEFINE 0xFFFFDBE4
RCANB_MSG24_t_CAN_message_buffer_LAFM_BIT_EXTID_LAFM DEFINE 0
RCANB_MSG24_t_CAN_message_buffer_LAFM_BIT_STDID_LAFM DEFINE 18
RCANB_MSG24_t_CAN_message_buffer_LAFM_BIT_IDE_LAFM DEFINE 31
RCANB_MSG24_t_CAN_message_buffer_DATA_LONG DEFINE 0xFFFFDBE8
RCANB_MSG24_t_CAN_message_buffer_DATA_WORD DEFINE 0xFFFFDBE8
RCANB_MSG24_t_CAN_message_buffer_DATA_BYTE DEFINE 0xFFFFDBE8
RCANB_MSG24_t_CAN_message_buffer_CONTROL1_WORD DEFINE 0xFFFFDBF0
RCANB_MSG24_t_CAN_message_buffer_CONTROL1_BIT_MBC DEFINE 0
RCANB_MSG24_t_CAN_message_buffer_CONTROL1_BIT_DART DEFINE 3
RCANB_MSG24_t_CAN_message_buffer_CONTROL1_BIT_ATX DEFINE 4
RCANB_MSG24_t_CAN_message_buffer_CONTROL1_BIT_NMC DEFINE 5
RCANB_MSG24_t_CAN_message_buffer_CONTROL1_BIT_DLC DEFINE 0
RCANB_MSG24_t_CAN_message_buffer_Timestamp DEFINE 0xFFFFDBF2
RCANB_MSG24_t_CAN_message_buffer_TTT DEFINE 0xFFFFDBF4
RCANB_MSG24_t_CAN_message_buffer_TTW_WORD DEFINE 0xFFFFDBF6
RCANB_MSG24_t_CAN_message_buffer_TTW_BIT_rep_factor DEFINE 0
RCANB_MSG24_t_CAN_message_buffer_TTW_BIT_Offset DEFINE 8
RCANB_MSG24_t_CAN_message_buffer_TTW_BIT_TTW DEFINE 14
RCANB_MSG24_t_CAN_message_buffer_wk DEFINE 0xFFFFDBF8
RCANB_MSG25_t_CAN_message_buffer_CONTROL0_LONG DEFINE 0xFFFFDC00
RCANB_MSG25_t_CAN_message_buffer_CONTROL0_BIT_EXTID DEFINE 0
RCANB_MSG25_t_CAN_message_buffer_CONTROL0_BIT_STDID DEFINE 18
RCANB_MSG25_t_CAN_message_buffer_CONTROL0_BIT_RTR DEFINE 30
RCANB_MSG25_t_CAN_message_buffer_CONTROL0_BIT_IDE DEFINE 31
RCANB_MSG25_t_CAN_message_buffer_LAFM_LONG DEFINE 0xFFFFDC04
RCANB_MSG25_t_CAN_message_buffer_LAFM_BIT_EXTID_LAFM DEFINE 0
RCANB_MSG25_t_CAN_message_buffer_LAFM_BIT_STDID_LAFM DEFINE 18
RCANB_MSG25_t_CAN_message_buffer_LAFM_BIT_IDE_LAFM DEFINE 31
RCANB_MSG25_t_CAN_message_buffer_DATA_LONG DEFINE 0xFFFFDC08
RCANB_MSG25_t_CAN_message_buffer_DATA_WORD DEFINE 0xFFFFDC08
RCANB_MSG25_t_CAN_message_buffer_DATA_BYTE DEFINE 0xFFFFDC08
RCANB_MSG25_t_CAN_message_buffer_CONTROL1_WORD DEFINE 0xFFFFDC10
RCANB_MSG25_t_CAN_message_buffer_CONTROL1_BIT_MBC DEFINE 0
RCANB_MSG25_t_CAN_message_buffer_CONTROL1_BIT_DART DEFINE 3
RCANB_MSG25_t_CAN_message_buffer_CONTROL1_BIT_ATX DEFINE 4
RCANB_MSG25_t_CAN_message_buffer_CONTROL1_BIT_NMC DEFINE 5
RCANB_MSG25_t_CAN_message_buffer_CONTROL1_BIT_DLC DEFINE 0
RCANB_MSG25_t_CAN_message_buffer_Timestamp DEFINE 0xFFFFDC12
RCANB_MSG25_t_CAN_message_buffer_TTT DEFINE 0xFFFFDC14
RCANB_MSG25_t_CAN_message_buffer_TTW_WORD DEFINE 0xFFFFDC16
RCANB_MSG25_t_CAN_message_buffer_TTW_BIT_rep_factor DEFINE 0
RCANB_MSG25_t_CAN_message_buffer_TTW_BIT_Offset DEFINE 8
RCANB_MSG25_t_CAN_message_buffer_TTW_BIT_TTW DEFINE 14
RCANB_MSG25_t_CAN_message_buffer_wk DEFINE 0xFFFFDC18
RCANB_MSG26_t_CAN_message_buffer_CONTROL0_LONG DEFINE 0xFFFFDC20
RCANB_MSG26_t_CAN_message_buffer_CONTROL0_BIT_EXTID DEFINE 0
RCANB_MSG26_t_CAN_message_buffer_CONTROL0_BIT_STDID DEFINE 18
RCANB_MSG26_t_CAN_message_buffer_CONTROL0_BIT_RTR DEFINE 30
RCANB_MSG26_t_CAN_message_buffer_CONTROL0_BIT_IDE DEFINE 31
RCANB_MSG26_t_CAN_message_buffer_LAFM_LONG DEFINE 0xFFFFDC24
RCANB_MSG26_t_CAN_message_buffer_LAFM_BIT_EXTID_LAFM DEFINE 0
RCANB_MSG26_t_CAN_message_buffer_LAFM_BIT_STDID_LAFM DEFINE 18
RCANB_MSG26_t_CAN_message_buffer_LAFM_BIT_IDE_LAFM DEFINE 31
RCANB_MSG26_t_CAN_message_buffer_DATA_LONG DEFINE 0xFFFFDC28
RCANB_MSG26_t_CAN_message_buffer_DATA_WORD DEFINE 0xFFFFDC28
RCANB_MSG26_t_CAN_message_buffer_DATA_BYTE DEFINE 0xFFFFDC28
RCANB_MSG26_t_CAN_message_buffer_CONTROL1_WORD DEFINE 0xFFFFDC30
RCANB_MSG26_t_CAN_message_buffer_CONTROL1_BIT_MBC DEFINE 0
RCANB_MSG26_t_CAN_message_buffer_CONTROL1_BIT_DART DEFINE 3
RCANB_MSG26_t_CAN_message_buffer_CONTROL1_BIT_ATX DEFINE 4
RCANB_MSG26_t_CAN_message_buffer_CONTROL1_BIT_NMC DEFINE 5
RCANB_MSG26_t_CAN_message_buffer_CONTROL1_BIT_DLC DEFINE 0
RCANB_MSG26_t_CAN_message_buffer_Timestamp DEFINE 0xFFFFDC32
RCANB_MSG26_t_CAN_message_buffer_TTT DEFINE 0xFFFFDC34
RCANB_MSG26_t_CAN_message_buffer_TTW_WORD DEFINE 0xFFFFDC36
RCANB_MSG26_t_CAN_message_buffer_TTW_BIT_rep_factor DEFINE 0
RCANB_MSG26_t_CAN_message_buffer_TTW_BIT_Offset DEFINE 8
RCANB_MSG26_t_CAN_message_buffer_TTW_BIT_TTW DEFINE 14
RCANB_MSG26_t_CAN_message_buffer_wk DEFINE 0xFFFFDC38
RCANB_MSG27_t_CAN_message_buffer_CONTROL0_LONG DEFINE 0xFFFFDC40
RCANB_MSG27_t_CAN_message_buffer_CONTROL0_BIT_EXTID DEFINE 0
RCANB_MSG27_t_CAN_message_buffer_CONTROL0_BIT_STDID DEFINE 18
RCANB_MSG27_t_CAN_message_buffer_CONTROL0_BIT_RTR DEFINE 30
RCANB_MSG27_t_CAN_message_buffer_CONTROL0_BIT_IDE DEFINE 31
RCANB_MSG27_t_CAN_message_buffer_LAFM_LONG DEFINE 0xFFFFDC44
RCANB_MSG27_t_CAN_message_buffer_LAFM_BIT_EXTID_LAFM DEFINE 0
RCANB_MSG27_t_CAN_message_buffer_LAFM_BIT_STDID_LAFM DEFINE 18
RCANB_MSG27_t_CAN_message_buffer_LAFM_BIT_IDE_LAFM DEFINE 31
RCANB_MSG27_t_CAN_message_buffer_DATA_LONG DEFINE 0xFFFFDC48
RCANB_MSG27_t_CAN_message_buffer_DATA_WORD DEFINE 0xFFFFDC48
RCANB_MSG27_t_CAN_message_buffer_DATA_BYTE DEFINE 0xFFFFDC48
RCANB_MSG27_t_CAN_message_buffer_CONTROL1_WORD DEFINE 0xFFFFDC50
RCANB_MSG27_t_CAN_message_buffer_CONTROL1_BIT_MBC DEFINE 0
RCANB_MSG27_t_CAN_message_buffer_CONTROL1_BIT_DART DEFINE 3
RCANB_MSG27_t_CAN_message_buffer_CONTROL1_BIT_ATX DEFINE 4
RCANB_MSG27_t_CAN_message_buffer_CONTROL1_BIT_NMC DEFINE 5
RCANB_MSG27_t_CAN_message_buffer_CONTROL1_BIT_DLC DEFINE 0
RCANB_MSG27_t_CAN_message_buffer_Timestamp DEFINE 0xFFFFDC52
RCANB_MSG27_t_CAN_message_buffer_TTT DEFINE 0xFFFFDC54
RCANB_MSG27_t_CAN_message_buffer_TTW_WORD DEFINE 0xFFFFDC56
RCANB_MSG27_t_CAN_message_buffer_TTW_BIT_rep_factor DEFINE 0
RCANB_MSG27_t_CAN_message_buffer_TTW_BIT_Offset DEFINE 8
RCANB_MSG27_t_CAN_message_buffer_TTW_BIT_TTW DEFINE 14
RCANB_MSG27_t_CAN_message_buffer_wk DEFINE 0xFFFFDC58
RCANB_MSG28_t_CAN_message_buffer_CONTROL0_LONG DEFINE 0xFFFFDC60
RCANB_MSG28_t_CAN_message_buffer_CONTROL0_BIT_EXTID DEFINE 0
RCANB_MSG28_t_CAN_message_buffer_CONTROL0_BIT_STDID DEFINE 18
RCANB_MSG28_t_CAN_message_buffer_CONTROL0_BIT_RTR DEFINE 30
RCANB_MSG28_t_CAN_message_buffer_CONTROL0_BIT_IDE DEFINE 31
RCANB_MSG28_t_CAN_message_buffer_LAFM_LONG DEFINE 0xFFFFDC64
RCANB_MSG28_t_CAN_message_buffer_LAFM_BIT_EXTID_LAFM DEFINE 0
RCANB_MSG28_t_CAN_message_buffer_LAFM_BIT_STDID_LAFM DEFINE 18
RCANB_MSG28_t_CAN_message_buffer_LAFM_BIT_IDE_LAFM DEFINE 31
RCANB_MSG28_t_CAN_message_buffer_DATA_LONG DEFINE 0xFFFFDC68
RCANB_MSG28_t_CAN_message_buffer_DATA_WORD DEFINE 0xFFFFDC68
RCANB_MSG28_t_CAN_message_buffer_DATA_BYTE DEFINE 0xFFFFDC68
RCANB_MSG28_t_CAN_message_buffer_CONTROL1_WORD DEFINE 0xFFFFDC70
RCANB_MSG28_t_CAN_message_buffer_CONTROL1_BIT_MBC DEFINE 0
RCANB_MSG28_t_CAN_message_buffer_CONTROL1_BIT_DART DEFINE 3
RCANB_MSG28_t_CAN_message_buffer_CONTROL1_BIT_ATX DEFINE 4
RCANB_MSG28_t_CAN_message_buffer_CONTROL1_BIT_NMC DEFINE 5
RCANB_MSG28_t_CAN_message_buffer_CONTROL1_BIT_DLC DEFINE 0
RCANB_MSG28_t_CAN_message_buffer_Timestamp DEFINE 0xFFFFDC72
RCANB_MSG28_t_CAN_message_buffer_TTT DEFINE 0xFFFFDC74
RCANB_MSG28_t_CAN_message_buffer_TTW_WORD DEFINE 0xFFFFDC76
RCANB_MSG28_t_CAN_message_buffer_TTW_BIT_rep_factor DEFINE 0
RCANB_MSG28_t_CAN_message_buffer_TTW_BIT_Offset DEFINE 8
RCANB_MSG28_t_CAN_message_buffer_TTW_BIT_TTW DEFINE 14
RCANB_MSG28_t_CAN_message_buffer_wk DEFINE 0xFFFFDC78
RCANB_MSG29_t_CAN_message_buffer_CONTROL0_LONG DEFINE 0xFFFFDC80
RCANB_MSG29_t_CAN_message_buffer_CONTROL0_BIT_EXTID DEFINE 0
RCANB_MSG29_t_CAN_message_buffer_CONTROL0_BIT_STDID DEFINE 18
RCANB_MSG29_t_CAN_message_buffer_CONTROL0_BIT_RTR DEFINE 30
RCANB_MSG29_t_CAN_message_buffer_CONTROL0_BIT_IDE DEFINE 31
RCANB_MSG29_t_CAN_message_buffer_LAFM_LONG DEFINE 0xFFFFDC84
RCANB_MSG29_t_CAN_message_buffer_LAFM_BIT_EXTID_LAFM DEFINE 0
RCANB_MSG29_t_CAN_message_buffer_LAFM_BIT_STDID_LAFM DEFINE 18
RCANB_MSG29_t_CAN_message_buffer_LAFM_BIT_IDE_LAFM DEFINE 31
RCANB_MSG29_t_CAN_message_buffer_DATA_LONG DEFINE 0xFFFFDC88
RCANB_MSG29_t_CAN_message_buffer_DATA_WORD DEFINE 0xFFFFDC88
RCANB_MSG29_t_CAN_message_buffer_DATA_BYTE DEFINE 0xFFFFDC88
RCANB_MSG29_t_CAN_message_buffer_CONTROL1_WORD DEFINE 0xFFFFDC90
RCANB_MSG29_t_CAN_message_buffer_CONTROL1_BIT_MBC DEFINE 0
RCANB_MSG29_t_CAN_message_buffer_CONTROL1_BIT_DART DEFINE 3
RCANB_MSG29_t_CAN_message_buffer_CONTROL1_BIT_ATX DEFINE 4
RCANB_MSG29_t_CAN_message_buffer_CONTROL1_BIT_NMC DEFINE 5
RCANB_MSG29_t_CAN_message_buffer_CONTROL1_BIT_DLC DEFINE 0
RCANB_MSG29_t_CAN_message_buffer_Timestamp DEFINE 0xFFFFDC92
RCANB_MSG29_t_CAN_message_buffer_TTT DEFINE 0xFFFFDC94
RCANB_MSG29_t_CAN_message_buffer_TTW_WORD DEFINE 0xFFFFDC96
RCANB_MSG29_t_CAN_message_buffer_TTW_BIT_rep_factor DEFINE 0
RCANB_MSG29_t_CAN_message_buffer_TTW_BIT_Offset DEFINE 8
RCANB_MSG29_t_CAN_message_buffer_TTW_BIT_TTW DEFINE 14
RCANB_MSG29_t_CAN_message_buffer_wk DEFINE 0xFFFFDC98
RCANB_MSG30_t_CAN_message_buffer_CONTROL0_LONG DEFINE 0xFFFFDCA0
RCANB_MSG30_t_CAN_message_buffer_CONTROL0_BIT_EXTID DEFINE 0
RCANB_MSG30_t_CAN_message_buffer_CONTROL0_BIT_STDID DEFINE 18
RCANB_MSG30_t_CAN_message_buffer_CONTROL0_BIT_RTR DEFINE 30
RCANB_MSG30_t_CAN_message_buffer_CONTROL0_BIT_IDE DEFINE 31
RCANB_MSG30_t_CAN_message_buffer_LAFM_LONG DEFINE 0xFFFFDCA4
RCANB_MSG30_t_CAN_message_buffer_LAFM_BIT_EXTID_LAFM DEFINE 0
RCANB_MSG30_t_CAN_message_buffer_LAFM_BIT_STDID_LAFM DEFINE 18
RCANB_MSG30_t_CAN_message_buffer_LAFM_BIT_IDE_LAFM DEFINE 31
RCANB_MSG30_t_CAN_message_buffer_DATA_LONG DEFINE 0xFFFFDCA8
RCANB_MSG30_t_CAN_message_buffer_DATA_WORD DEFINE 0xFFFFDCA8
RCANB_MSG30_t_CAN_message_buffer_DATA_BYTE DEFINE 0xFFFFDCA8
RCANB_MSG30_t_CAN_message_buffer_CONTROL1_WORD DEFINE 0xFFFFDCB0
RCANB_MSG30_t_CAN_message_buffer_CONTROL1_BIT_MBC DEFINE 0
RCANB_MSG30_t_CAN_message_buffer_CONTROL1_BIT_DART DEFINE 3
RCANB_MSG30_t_CAN_message_buffer_CONTROL1_BIT_ATX DEFINE 4
RCANB_MSG30_t_CAN_message_buffer_CONTROL1_BIT_NMC DEFINE 5
RCANB_MSG30_t_CAN_message_buffer_CONTROL1_BIT_DLC DEFINE 0
RCANB_MSG30_t_CAN_message_buffer_Timestamp DEFINE 0xFFFFDCB2
RCANB_MSG30_t_CAN_message_buffer_TTT DEFINE 0xFFFFDCB4
RCANB_MSG30_t_CAN_message_buffer_TTW_WORD DEFINE 0xFFFFDCB6
RCANB_MSG30_t_CAN_message_buffer_TTW_BIT_rep_factor DEFINE 0
RCANB_MSG30_t_CAN_message_buffer_TTW_BIT_Offset DEFINE 8
RCANB_MSG30_t_CAN_message_buffer_TTW_BIT_TTW DEFINE 14
RCANB_MSG30_t_CAN_message_buffer_wk DEFINE 0xFFFFDCB8
RCANB_MSG31_t_CAN_message_buffer_CONTROL0_LONG DEFINE 0xFFFFDCC0
RCANB_MSG31_t_CAN_message_buffer_CONTROL0_BIT_EXTID DEFINE 0
RCANB_MSG31_t_CAN_message_buffer_CONTROL0_BIT_STDID DEFINE 18
RCANB_MSG31_t_CAN_message_buffer_CONTROL0_BIT_RTR DEFINE 30
RCANB_MSG31_t_CAN_message_buffer_CONTROL0_BIT_IDE DEFINE 31
RCANB_MSG31_t_CAN_message_buffer_LAFM_LONG DEFINE 0xFFFFDCC4
RCANB_MSG31_t_CAN_message_buffer_LAFM_BIT_EXTID_LAFM DEFINE 0
RCANB_MSG31_t_CAN_message_buffer_LAFM_BIT_STDID_LAFM DEFINE 18
RCANB_MSG31_t_CAN_message_buffer_LAFM_BIT_IDE_LAFM DEFINE 31
RCANB_MSG31_t_CAN_message_buffer_DATA_LONG DEFINE 0xFFFFDCC8
RCANB_MSG31_t_CAN_message_buffer_DATA_WORD DEFINE 0xFFFFDCC8
RCANB_MSG31_t_CAN_message_buffer_DATA_BYTE DEFINE 0xFFFFDCC8
RCANB_MSG31_t_CAN_message_buffer_CONTROL1_WORD DEFINE 0xFFFFDCD0
RCANB_MSG31_t_CAN_message_buffer_CONTROL1_BIT_MBC DEFINE 0
RCANB_MSG31_t_CAN_message_buffer_CONTROL1_BIT_DART DEFINE 3
RCANB_MSG31_t_CAN_message_buffer_CONTROL1_BIT_ATX DEFINE 4
RCANB_MSG31_t_CAN_message_buffer_CONTROL1_BIT_NMC DEFINE 5
RCANB_MSG31_t_CAN_message_buffer_CONTROL1_BIT_DLC DEFINE 0
RCANB_MSG31_t_CAN_message_buffer_Timestamp DEFINE 0xFFFFDCD2
RCANB_MSG31_t_CAN_message_buffer_TTT DEFINE 0xFFFFDCD4
RCANB_MSG31_t_CAN_message_buffer_TTW_WORD DEFINE 0xFFFFDCD6
RCANB_MSG31_t_CAN_message_buffer_TTW_BIT_rep_factor DEFINE 0
RCANB_MSG31_t_CAN_message_buffer_TTW_BIT_Offset DEFINE 8
RCANB_MSG31_t_CAN_message_buffer_TTW_BIT_TTW DEFINE 14
RCANB_MSG31_t_CAN_message_buffer_wk DEFINE 0xFFFFDCD8
RCANB_MSG32_t_CAN_message_buffer_CONTROL0_LONG DEFINE 0xFFFFDCE0
RCANB_MSG32_t_CAN_message_buffer_CONTROL0_BIT_EXTID DEFINE 0
RCANB_MSG32_t_CAN_message_buffer_CONTROL0_BIT_STDID DEFINE 18
RCANB_MSG32_t_CAN_message_buffer_CONTROL0_BIT_RTR DEFINE 30
RCANB_MSG32_t_CAN_message_buffer_CONTROL0_BIT_IDE DEFINE 31
RCANB_MSG32_t_CAN_message_buffer_LAFM_LONG DEFINE 0xFFFFDCE4
RCANB_MSG32_t_CAN_message_buffer_LAFM_BIT_EXTID_LAFM DEFINE 0
RCANB_MSG32_t_CAN_message_buffer_LAFM_BIT_STDID_LAFM DEFINE 18
RCANB_MSG32_t_CAN_message_buffer_LAFM_BIT_IDE_LAFM DEFINE 31
RCANB_MSG32_t_CAN_message_buffer_DATA_LONG DEFINE 0xFFFFDCE8
RCANB_MSG32_t_CAN_message_buffer_DATA_WORD DEFINE 0xFFFFDCE8
RCANB_MSG32_t_CAN_message_buffer_DATA_BYTE DEFINE 0xFFFFDCE8
RCANB_MSG32_t_CAN_message_buffer_CONTROL1_WORD DEFINE 0xFFFFDCF0
RCANB_MSG32_t_CAN_message_buffer_CONTROL1_BIT_MBC DEFINE 0
RCANB_MSG32_t_CAN_message_buffer_CONTROL1_BIT_DART DEFINE 3
RCANB_MSG32_t_CAN_message_buffer_CONTROL1_BIT_ATX DEFINE 4
RCANB_MSG32_t_CAN_message_buffer_CONTROL1_BIT_NMC DEFINE 5
RCANB_MSG32_t_CAN_message_buffer_CONTROL1_BIT_DLC DEFINE 0
RCANB_MSG32_t_CAN_message_buffer_Timestamp DEFINE 0xFFFFDCF2
RCANB_MSG32_t_CAN_message_buffer_TTT DEFINE 0xFFFFDCF4
RCANB_MSG32_t_CAN_message_buffer_TTW_WORD DEFINE 0xFFFFDCF6
RCANB_MSG32_t_CAN_message_buffer_TTW_BIT_rep_factor DEFINE 0
RCANB_MSG32_t_CAN_message_buffer_TTW_BIT_Offset DEFINE 8
RCANB_MSG32_t_CAN_message_buffer_TTW_BIT_TTW DEFINE 14
RCANB_MSG32_t_CAN_message_buffer_wk DEFINE 0xFFFFDCF8
RCANB_wk18 DEFINE 0xFFFFDD00
RCANB_MBESR_WORD DEFINE 0xFFFFDE00
RCANB_MBESR_BIT_MBEF DEFINE 0
RCANB_MBECR_WORD DEFINE 0xFFFFDE02
RCANB_MBECR_BIT_MBIM DEFINE 0

/* Renesas Controller Area Network Module C     */
RCANC_MCR_WORD DEFINE 0xFFFFE000
RCANC_MCR_BIT_MCR0 DEFINE 0
RCANC_MCR_BIT_MCR1 DEFINE 1
RCANC_MCR_BIT_MCR2 DEFINE 2
RCANC_MCR_BIT_MCR5 DEFINE 5
RCANC_MCR_BIT_MCR6 DEFINE 6
RCANC_MCR_BIT_MCR7 DEFINE 7
RCANC_MCR_BIT_TST DEFINE 8
RCANC_MCR_BIT_MCR14 DEFINE 14
RCANC_MCR_BIT_MCR15 DEFINE 15
RCANC_GSR_WORD DEFINE 0xFFFFE002
RCANC_GSR_BIT_GSR0 DEFINE 0
RCANC_GSR_BIT_GSR1 DEFINE 1
RCANC_GSR_BIT_GSR2 DEFINE 2
RCANC_GSR_BIT_GSR3 DEFINE 3
RCANC_GSR_BIT_GSR4 DEFINE 4
RCANC_GSR_BIT_GSR5 DEFINE 5
RCANC_BCR1_WORD DEFINE 0xFFFFE004
RCANC_BCR1_BIT_BSP DEFINE 0
RCANC_BCR1_BIT_SJW DEFINE 4
RCANC_BCR1_BIT_TSG2 DEFINE 8
RCANC_BCR1_BIT_TSG1 DEFINE 12
RCANC_BCR0_WORD DEFINE 0xFFFFE006
RCANC_BCR0_BIT_BRP DEFINE 0
RCANC_IRR_WORD DEFINE 0xFFFFE008
RCANC_IRR_BIT_IRR0 DEFINE 0
RCANC_IRR_BIT_IRR1 DEFINE 1
RCANC_IRR_BIT_IRR2 DEFINE 2
RCANC_IRR_BIT_IRR3 DEFINE 3
RCANC_IRR_BIT_IRR4 DEFINE 4
RCANC_IRR_BIT_IRR5 DEFINE 5
RCANC_IRR_BIT_IRR6 DEFINE 6
RCANC_IRR_BIT_IRR7 DEFINE 7
RCANC_IRR_BIT_IRR8 DEFINE 8
RCANC_IRR_BIT_IRR9 DEFINE 9
RCANC_IRR_BIT_IRR10 DEFINE 10
RCANC_IRR_BIT_IRR11 DEFINE 11
RCANC_IRR_BIT_IRR12 DEFINE 12
RCANC_IRR_BIT_IRR13 DEFINE 13
RCANC_IRR_BIT_IRR14 DEFINE 14
RCANC_IRR_BIT_IRR15 DEFINE 15
RCANC_IMR_WORD DEFINE 0xFFFFE00A
RCANC_IMR_BIT_IMR0 DEFINE 0
RCANC_IMR_BIT_IMR1 DEFINE 1
RCANC_IMR_BIT_IMR2 DEFINE 2
RCANC_IMR_BIT_IMR3 DEFINE 3
RCANC_IMR_BIT_IMR4 DEFINE 4
RCANC_IMR_BIT_IMR5 DEFINE 5
RCANC_IMR_BIT_IMR6 DEFINE 6
RCANC_IMR_BIT_IMR7 DEFINE 7
RCANC_IMR_BIT_IMR8 DEFINE 8
RCANC_IMR_BIT_IMR9 DEFINE 9
RCANC_IMR_BIT_IMR10 DEFINE 10
RCANC_IMR_BIT_IMR11 DEFINE 11
RCANC_IMR_BIT_IMR12 DEFINE 12
RCANC_IMR_BIT_IMR13 DEFINE 13
RCANC_IMR_BIT_IMR14 DEFINE 14
RCANC_IMR_BIT_IMR15 DEFINE 15
RCANC_TEC_REC_WORD DEFINE 0xFFFFE00C
RCANC_TEC_REC_BIT_TEC0 DEFINE 0
RCANC_TEC_REC_BIT_TEC1 DEFINE 1
RCANC_TEC_REC_BIT_TEC2 DEFINE 2
RCANC_TEC_REC_BIT_TEC3 DEFINE 3
RCANC_TEC_REC_BIT_TEC4 DEFINE 4
RCANC_TEC_REC_BIT_TEC5 DEFINE 5
RCANC_TEC_REC_BIT_TEC6 DEFINE 6
RCANC_TEC_REC_BIT_TEC7 DEFINE 7
RCANC_TEC_REC_BIT_REC0 DEFINE 0
RCANC_TEC_REC_BIT_REC1 DEFINE 1
RCANC_TEC_REC_BIT_REC2 DEFINE 2
RCANC_TEC_REC_BIT_REC3 DEFINE 3
RCANC_TEC_REC_BIT_REC4 DEFINE 4
RCANC_TEC_REC_BIT_REC5 DEFINE 5
RCANC_TEC_REC_BIT_REC6 DEFINE 6
RCANC_TEC_REC_BIT_REC7 DEFINE 7
RCANC_wk1 DEFINE 0xFFFFE00E
RCANC_TXPR_LONG DEFINE 0xFFFFE020
RCANC_TXPR_BIT_TXPR0_1 DEFINE 1
RCANC_TXPR_BIT_TXPR0_2 DEFINE 2
RCANC_TXPR_BIT_TXPR0_3 DEFINE 3
RCANC_TXPR_BIT_TXPR0_4 DEFINE 4
RCANC_TXPR_BIT_TXPR0_5 DEFINE 5
RCANC_TXPR_BIT_TXPR0_6 DEFINE 6
RCANC_TXPR_BIT_TXPR0_7 DEFINE 7
RCANC_TXPR_BIT_TXPR0_8 DEFINE 8
RCANC_TXPR_BIT_TXPR0_9 DEFINE 9
RCANC_TXPR_BIT_TXPR0_10 DEFINE 10
RCANC_TXPR_BIT_TXPR0_11 DEFINE 11
RCANC_TXPR_BIT_TXPR0_12 DEFINE 12
RCANC_TXPR_BIT_TXPR0_13 DEFINE 13
RCANC_TXPR_BIT_TXPR0_14 DEFINE 14
RCANC_TXPR_BIT_TXPR0_15 DEFINE 15
RCANC_TXPR_BIT_TXPR1_0 DEFINE 16
RCANC_TXPR_BIT_TXPR1_1 DEFINE 17
RCANC_TXPR_BIT_TXPR1_2 DEFINE 18
RCANC_TXPR_BIT_TXPR1_3 DEFINE 19
RCANC_TXPR_BIT_TXPR1_4 DEFINE 20
RCANC_TXPR_BIT_TXPR1_5 DEFINE 21
RCANC_TXPR_BIT_TXPR1_6 DEFINE 22
RCANC_TXPR_BIT_TXPR1_7 DEFINE 23
RCANC_TXPR_BIT_TXPR1_8 DEFINE 24
RCANC_TXPR_BIT_TXPR1_9 DEFINE 25
RCANC_TXPR_BIT_TXPR1_10 DEFINE 26
RCANC_TXPR_BIT_TXPR1_11 DEFINE 27
RCANC_TXPR_BIT_TXPR1_12 DEFINE 28
RCANC_TXPR_BIT_TXPR1_13 DEFINE 29
RCANC_TXPR_BIT_TXPR1_14 DEFINE 30
RCANC_TXPR_BIT_TXPR1_15 DEFINE 31
RCANC_wk2 DEFINE 0xFFFFE024
RCANC_TXCR_LONG DEFINE 0xFFFFE028
RCANC_TXCR_BIT_TXCR0_1 DEFINE 1
RCANC_TXCR_BIT_TXCR0_2 DEFINE 2
RCANC_TXCR_BIT_TXCR0_3 DEFINE 3
RCANC_TXCR_BIT_TXCR0_4 DEFINE 4
RCANC_TXCR_BIT_TXCR0_5 DEFINE 5
RCANC_TXCR_BIT_TXCR0_6 DEFINE 6
RCANC_TXCR_BIT_TXCR0_7 DEFINE 7
RCANC_TXCR_BIT_TXCR0_8 DEFINE 8
RCANC_TXCR_BIT_TXCR0_9 DEFINE 9
RCANC_TXCR_BIT_TXCR0_10 DEFINE 10
RCANC_TXCR_BIT_TXCR0_11 DEFINE 11
RCANC_TXCR_BIT_TXCR0_12 DEFINE 12
RCANC_TXCR_BIT_TXCR0_13 DEFINE 13
RCANC_TXCR_BIT_TXCR0_14 DEFINE 14
RCANC_TXCR_BIT_TXCR0_15 DEFINE 15
RCANC_TXCR_BIT_TXCR1_0 DEFINE 16
RCANC_TXCR_BIT_TXCR1_1 DEFINE 17
RCANC_TXCR_BIT_TXCR1_2 DEFINE 18
RCANC_TXCR_BIT_TXCR1_3 DEFINE 19
RCANC_TXCR_BIT_TXCR1_4 DEFINE 20
RCANC_TXCR_BIT_TXCR1_5 DEFINE 21
RCANC_TXCR_BIT_TXCR1_6 DEFINE 22
RCANC_TXCR_BIT_TXCR1_7 DEFINE 23
RCANC_TXCR_BIT_TXCR1_8 DEFINE 24
RCANC_TXCR_BIT_TXCR1_9 DEFINE 25
RCANC_TXCR_BIT_TXCR1_10 DEFINE 26
RCANC_TXCR_BIT_TXCR1_11 DEFINE 27
RCANC_TXCR_BIT_TXCR1_12 DEFINE 28
RCANC_TXCR_BIT_TXCR1_13 DEFINE 29
RCANC_TXCR_BIT_TXCR1_14 DEFINE 30
RCANC_TXCR_BIT_TXCR1_15 DEFINE 31
RCANC_TXCR_WORD_TXCR1 DEFINE 0xFFFFE028
RCANC_TXCR_WORD_TXCR0 DEFINE 0xFFFFE02A
RCANC_wk3 DEFINE 0xFFFFE02C
RCANC_TXACK_LONG DEFINE 0xFFFFE030
RCANC_TXACK_BIT_TXACK0_1 DEFINE 1
RCANC_TXACK_BIT_TXACK0_2 DEFINE 2
RCANC_TXACK_BIT_TXACK0_3 DEFINE 3
RCANC_TXACK_BIT_TXACK0_4 DEFINE 4
RCANC_TXACK_BIT_TXACK0_5 DEFINE 5
RCANC_TXACK_BIT_TXACK0_6 DEFINE 6
RCANC_TXACK_BIT_TXACK0_7 DEFINE 7
RCANC_TXACK_BIT_TXACK0_8 DEFINE 8
RCANC_TXACK_BIT_TXACK0_9 DEFINE 9
RCANC_TXACK_BIT_TXACK0_10 DEFINE 10
RCANC_TXACK_BIT_TXACK0_11 DEFINE 11
RCANC_TXACK_BIT_TXACK0_12 DEFINE 12
RCANC_TXACK_BIT_TXACK0_13 DEFINE 13
RCANC_TXACK_BIT_TXACK0_14 DEFINE 14
RCANC_TXACK_BIT_TXACK0_15 DEFINE 15
RCANC_TXACK_BIT_TXACK1_0 DEFINE 16
RCANC_TXACK_BIT_TXACK1_1 DEFINE 17
RCANC_TXACK_BIT_TXACK1_2 DEFINE 18
RCANC_TXACK_BIT_TXACK1_3 DEFINE 19
RCANC_TXACK_BIT_TXACK1_4 DEFINE 20
RCANC_TXACK_BIT_TXACK1_5 DEFINE 21
RCANC_TXACK_BIT_TXACK1_6 DEFINE 22
RCANC_TXACK_BIT_TXACK1_7 DEFINE 23
RCANC_TXACK_BIT_TXACK1_8 DEFINE 24
RCANC_TXACK_BIT_TXACK1_9 DEFINE 25
RCANC_TXACK_BIT_TXACK1_10 DEFINE 26
RCANC_TXACK_BIT_TXACK1_11 DEFINE 27
RCANC_TXACK_BIT_TXACK1_12 DEFINE 28
RCANC_TXACK_BIT_TXACK1_13 DEFINE 29
RCANC_TXACK_BIT_TXACK1_14 DEFINE 30
RCANC_TXACK_BIT_TXACK1_15 DEFINE 31
RCANC_TXACK_WORD_TXACK1 DEFINE 0xFFFFE030
RCANC_TXACK_WORD_TXACK0 DEFINE 0xFFFFE032
RCANC_wk4 DEFINE 0xFFFFE034
RCANC_ABACK_LONG DEFINE 0xFFFFE038
RCANC_ABACK_BIT_ABACK0_1 DEFINE 1
RCANC_ABACK_BIT_ABACK0_2 DEFINE 2
RCANC_ABACK_BIT_ABACK0_3 DEFINE 3
RCANC_ABACK_BIT_ABACK0_4 DEFINE 4
RCANC_ABACK_BIT_ABACK0_5 DEFINE 5
RCANC_ABACK_BIT_ABACK0_6 DEFINE 6
RCANC_ABACK_BIT_ABACK0_7 DEFINE 7
RCANC_ABACK_BIT_ABACK0_8 DEFINE 8
RCANC_ABACK_BIT_ABACK0_9 DEFINE 9
RCANC_ABACK_BIT_ABACK0_10 DEFINE 10
RCANC_ABACK_BIT_ABACK0_11 DEFINE 11
RCANC_ABACK_BIT_ABACK0_12 DEFINE 12
RCANC_ABACK_BIT_ABACK0_13 DEFINE 13
RCANC_ABACK_BIT_ABACK0_14 DEFINE 14
RCANC_ABACK_BIT_ABACK0_15 DEFINE 15
RCANC_ABACK_BIT_ABACK1_0 DEFINE 16
RCANC_ABACK_BIT_ABACK1_1 DEFINE 17
RCANC_ABACK_BIT_ABACK1_2 DEFINE 18
RCANC_ABACK_BIT_ABACK1_3 DEFINE 19
RCANC_ABACK_BIT_ABACK1_4 DEFINE 20
RCANC_ABACK_BIT_ABACK1_5 DEFINE 21
RCANC_ABACK_BIT_ABACK1_6 DEFINE 22
RCANC_ABACK_BIT_ABACK1_7 DEFINE 23
RCANC_ABACK_BIT_ABACK1_8 DEFINE 24
RCANC_ABACK_BIT_ABACK1_9 DEFINE 25
RCANC_ABACK_BIT_ABACK1_10 DEFINE 26
RCANC_ABACK_BIT_ABACK1_11 DEFINE 27
RCANC_ABACK_BIT_ABACK1_12 DEFINE 28
RCANC_ABACK_BIT_ABACK1_13 DEFINE 29
RCANC_ABACK_BIT_ABACK1_14 DEFINE 30
RCANC_ABACK_BIT_ABACK1_15 DEFINE 31
RCANC_ABACK_WORD_ABACK1 DEFINE 0xFFFFE038
RCANC_ABACK_WORD_ABACK0 DEFINE 0xFFFFE03A
RCANC_wk5 DEFINE 0xFFFFE03C
RCANC_RXPR_LONG DEFINE 0xFFFFE040
RCANC_RXPR_BIT_RXPR0_0 DEFINE 0
RCANC_RXPR_BIT_RXPR0_1 DEFINE 1
RCANC_RXPR_BIT_RXPR0_2 DEFINE 2
RCANC_RXPR_BIT_RXPR0_3 DEFINE 3
RCANC_RXPR_BIT_RXPR0_4 DEFINE 4
RCANC_RXPR_BIT_RXPR0_5 DEFINE 5
RCANC_RXPR_BIT_RXPR0_6 DEFINE 6
RCANC_RXPR_BIT_RXPR0_7 DEFINE 7
RCANC_RXPR_BIT_RXPR0_8 DEFINE 8
RCANC_RXPR_BIT_RXPR0_9 DEFINE 9
RCANC_RXPR_BIT_RXPR0_10 DEFINE 10
RCANC_RXPR_BIT_RXPR0_11 DEFINE 11
RCANC_RXPR_BIT_RXPR0_12 DEFINE 12
RCANC_RXPR_BIT_RXPR0_13 DEFINE 13
RCANC_RXPR_BIT_RXPR0_14 DEFINE 14
RCANC_RXPR_BIT_RXPR0_15 DEFINE 15
RCANC_RXPR_BIT_RXPR1_0 DEFINE 16
RCANC_RXPR_BIT_RXPR1_1 DEFINE 17
RCANC_RXPR_BIT_RXPR1_2 DEFINE 18
RCANC_RXPR_BIT_RXPR1_3 DEFINE 19
RCANC_RXPR_BIT_RXPR1_4 DEFINE 20
RCANC_RXPR_BIT_RXPR1_5 DEFINE 21
RCANC_RXPR_BIT_RXPR1_6 DEFINE 22
RCANC_RXPR_BIT_RXPR1_7 DEFINE 23
RCANC_RXPR_BIT_RXPR1_8 DEFINE 24
RCANC_RXPR_BIT_RXPR1_9 DEFINE 25
RCANC_RXPR_BIT_RXPR1_10 DEFINE 26
RCANC_RXPR_BIT_RXPR1_11 DEFINE 27
RCANC_RXPR_BIT_RXPR1_12 DEFINE 28
RCANC_RXPR_BIT_RXPR1_13 DEFINE 29
RCANC_RXPR_BIT_RXPR1_14 DEFINE 30
RCANC_RXPR_BIT_RXPR1_15 DEFINE 31
RCANC_RXPR_WORD_RXPR1 DEFINE 0xFFFFE040
RCANC_RXPR_WORD_RXPR0 DEFINE 0xFFFFE042
RCANC_wk6 DEFINE 0xFFFFE044
RCANC_RFPR_LONG DEFINE 0xFFFFE048
RCANC_RFPR_BIT_RFPR0_0 DEFINE 0
RCANC_RFPR_BIT_RFPR0_1 DEFINE 1
RCANC_RFPR_BIT_RFPR0_2 DEFINE 2
RCANC_RFPR_BIT_RFPR0_3 DEFINE 3
RCANC_RFPR_BIT_RFPR0_4 DEFINE 4
RCANC_RFPR_BIT_RFPR0_5 DEFINE 5
RCANC_RFPR_BIT_RFPR0_6 DEFINE 6
RCANC_RFPR_BIT_RFPR0_7 DEFINE 7
RCANC_RFPR_BIT_RFPR0_8 DEFINE 8
RCANC_RFPR_BIT_RFPR0_9 DEFINE 9
RCANC_RFPR_BIT_RFPR0_10 DEFINE 10
RCANC_RFPR_BIT_RFPR0_11 DEFINE 11
RCANC_RFPR_BIT_RFPR0_12 DEFINE 12
RCANC_RFPR_BIT_RFPR0_13 DEFINE 13
RCANC_RFPR_BIT_RFPR0_14 DEFINE 14
RCANC_RFPR_BIT_RFPR0_15 DEFINE 15
RCANC_RFPR_BIT_RFPR1_0 DEFINE 16
RCANC_RFPR_BIT_RFPR1_1 DEFINE 17
RCANC_RFPR_BIT_RFPR1_2 DEFINE 18
RCANC_RFPR_BIT_RFPR1_3 DEFINE 19
RCANC_RFPR_BIT_RFPR1_4 DEFINE 20
RCANC_RFPR_BIT_RFPR1_5 DEFINE 21
RCANC_RFPR_BIT_RFPR1_6 DEFINE 22
RCANC_RFPR_BIT_RFPR1_7 DEFINE 23
RCANC_RFPR_BIT_RFPR1_8 DEFINE 24
RCANC_RFPR_BIT_RFPR1_9 DEFINE 25
RCANC_RFPR_BIT_RFPR1_10 DEFINE 26
RCANC_RFPR_BIT_RFPR1_11 DEFINE 27
RCANC_RFPR_BIT_RFPR1_12 DEFINE 28
RCANC_RFPR_BIT_RFPR1_13 DEFINE 29
RCANC_RFPR_BIT_RFPR1_14 DEFINE 30
RCANC_RFPR_BIT_RFPR1_15 DEFINE 31
RCANC_RFPR_WORD_RFPR1 DEFINE 0xFFFFE048
RCANC_RFPR_WORD_RFPR0 DEFINE 0xFFFFE04A
RCANC_wk7 DEFINE 0xFFFFE04C
RCANC_MBIMR_LONG DEFINE 0xFFFFE050
RCANC_MBIMR_BIT_MBIMR0_0 DEFINE 0
RCANC_MBIMR_BIT_MBIMR0_1 DEFINE 1
RCANC_MBIMR_BIT_MBIMR0_2 DEFINE 2
RCANC_MBIMR_BIT_MBIMR0_3 DEFINE 3
RCANC_MBIMR_BIT_MBIMR0_4 DEFINE 4
RCANC_MBIMR_BIT_MBIMR0_5 DEFINE 5
RCANC_MBIMR_BIT_MBIMR0_6 DEFINE 6
RCANC_MBIMR_BIT_MBIMR0_7 DEFINE 7
RCANC_MBIMR_BIT_MBIMR0_8 DEFINE 8
RCANC_MBIMR_BIT_MBIMR0_9 DEFINE 9
RCANC_MBIMR_BIT_MBIMR0_10 DEFINE 10
RCANC_MBIMR_BIT_MBIMR0_11 DEFINE 11
RCANC_MBIMR_BIT_MBIMR0_12 DEFINE 12
RCANC_MBIMR_BIT_MBIMR0_13 DEFINE 13
RCANC_MBIMR_BIT_MBIMR0_14 DEFINE 14
RCANC_MBIMR_BIT_MBIMR0_15 DEFINE 15
RCANC_MBIMR_BIT_MBIMR1_0 DEFINE 16
RCANC_MBIMR_BIT_MBIMR1_1 DEFINE 17
RCANC_MBIMR_BIT_MBIMR1_2 DEFINE 18
RCANC_MBIMR_BIT_MBIMR1_3 DEFINE 19
RCANC_MBIMR_BIT_MBIMR1_4 DEFINE 20
RCANC_MBIMR_BIT_MBIMR1_5 DEFINE 21
RCANC_MBIMR_BIT_MBIMR1_6 DEFINE 22
RCANC_MBIMR_BIT_MBIMR1_7 DEFINE 23
RCANC_MBIMR_BIT_MBIMR1_8 DEFINE 24
RCANC_MBIMR_BIT_MBIMR1_9 DEFINE 25
RCANC_MBIMR_BIT_MBIMR1_10 DEFINE 26
RCANC_MBIMR_BIT_MBIMR1_11 DEFINE 27
RCANC_MBIMR_BIT_MBIMR1_12 DEFINE 28
RCANC_MBIMR_BIT_MBIMR1_13 DEFINE 29
RCANC_MBIMR_BIT_MBIMR1_14 DEFINE 30
RCANC_MBIMR_BIT_MBIMR1_15 DEFINE 31
RCANC_MBIMR_WORD_MBIMR1 DEFINE 0xFFFFE050
RCANC_MBIMR_WORD_MBIMR0 DEFINE 0xFFFFE052
RCANC_wk8 DEFINE 0xFFFFE054
RCANC_UMSR_LONG DEFINE 0xFFFFE058
RCANC_UMSR_BIT_UMSR0_0 DEFINE 0
RCANC_UMSR_BIT_UMSR0_1 DEFINE 1
RCANC_UMSR_BIT_UMSR0_2 DEFINE 2
RCANC_UMSR_BIT_UMSR0_3 DEFINE 3
RCANC_UMSR_BIT_UMSR0_4 DEFINE 4
RCANC_UMSR_BIT_UMSR0_5 DEFINE 5
RCANC_UMSR_BIT_UMSR0_6 DEFINE 6
RCANC_UMSR_BIT_UMSR0_7 DEFINE 7
RCANC_UMSR_BIT_UMSR0_8 DEFINE 8
RCANC_UMSR_BIT_UMSR0_9 DEFINE 9
RCANC_UMSR_BIT_UMSR0_10 DEFINE 10
RCANC_UMSR_BIT_UMSR0_11 DEFINE 11
RCANC_UMSR_BIT_UMSR0_12 DEFINE 12
RCANC_UMSR_BIT_UMSR0_13 DEFINE 13
RCANC_UMSR_BIT_UMSR0_14 DEFINE 14
RCANC_UMSR_BIT_UMSR0_15 DEFINE 15
RCANC_UMSR_BIT_UMSR1_0 DEFINE 16
RCANC_UMSR_BIT_UMSR1_1 DEFINE 17
RCANC_UMSR_BIT_UMSR1_2 DEFINE 18
RCANC_UMSR_BIT_UMSR1_3 DEFINE 19
RCANC_UMSR_BIT_UMSR1_4 DEFINE 20
RCANC_UMSR_BIT_UMSR1_5 DEFINE 21
RCANC_UMSR_BIT_UMSR1_6 DEFINE 22
RCANC_UMSR_BIT_UMSR1_7 DEFINE 23
RCANC_UMSR_BIT_UMSR1_8 DEFINE 24
RCANC_UMSR_BIT_UMSR1_9 DEFINE 25
RCANC_UMSR_BIT_UMSR1_10 DEFINE 26
RCANC_UMSR_BIT_UMSR1_11 DEFINE 27
RCANC_UMSR_BIT_UMSR1_12 DEFINE 28
RCANC_UMSR_BIT_UMSR1_13 DEFINE 29
RCANC_UMSR_BIT_UMSR1_14 DEFINE 30
RCANC_UMSR_BIT_UMSR1_15 DEFINE 31
RCANC_UMSR_WORD_UMSR1 DEFINE 0xFFFFE058
RCANC_UMSR_WORD_UMSR0 DEFINE 0xFFFFE05A
RCANC_wk9 DEFINE 0xFFFFE05C
RCANC_TTCR0_WORD DEFINE 0xFFFFE080
RCANC_TTCR0_BIT_TPSC0 DEFINE 0
RCANC_TTCR0_BIT_TPSC1 DEFINE 1
RCANC_TTCR0_BIT_TPSC2 DEFINE 2
RCANC_TTCR0_BIT_TPSC3 DEFINE 3
RCANC_TTCR0_BIT_TPSC4 DEFINE 4
RCANC_TTCR0_BIT_TPSC5 DEFINE 5
RCANC_TTCR0_BIT_TCR6 DEFINE 6
RCANC_TTCR0_BIT_TCR10 DEFINE 10
RCANC_TTCR0_BIT_TCR11 DEFINE 11
RCANC_TTCR0_BIT_TCR12 DEFINE 12
RCANC_TTCR0_BIT_TCR13 DEFINE 13
RCANC_TTCR0_BIT_TCR14 DEFINE 14
RCANC_TTCR0_BIT_TCR15 DEFINE 15
RCANC_wk10 DEFINE 0xFFFFE082
RCANC_CMAX_TEW_WORD DEFINE 0xFFFFE084
RCANC_CMAX_TEW_BIT_TEW DEFINE 0
RCANC_CMAX_TEW_BIT_CMAX DEFINE 8
RCANC_RFTROFF_WORD DEFINE 0xFFFFE086
RCANC_RFTROFF_BIT_RFTROFF DEFINE 8
RCANC_TSR_WORD DEFINE 0xFFFFE088
RCANC_TSR_BIT_TSR0 DEFINE 0
RCANC_TSR_BIT_TSR1 DEFINE 1
RCANC_TSR_BIT_TSR2 DEFINE 2
RCANC_TSR_BIT_TSR3 DEFINE 3
RCANC_TSR_BIT_TSR4 DEFINE 4
RCANC_CCR_WORD DEFINE 0xFFFFE08A
RCANC_CCR_BIT_CCR DEFINE 0
RCANC_TCNTR DEFINE 0xFFFFE08C
RCANC_wk11 DEFINE 0xFFFFE08E
RCANC_CYCTR DEFINE 0xFFFFE090
RCANC_wk12 DEFINE 0xFFFFE092
RCANC_RFMK DEFINE 0xFFFFE094
RCANC_wk13 DEFINE 0xFFFFE096
RCANC_TCMR0 DEFINE 0xFFFFE098
RCANC_wk14 DEFINE 0xFFFFE09A
RCANC_TCMR1 DEFINE 0xFFFFE09C
RCANC_wk15 DEFINE 0xFFFFE09E
RCANC_TCMR2 DEFINE 0xFFFFE0A0
RCANC_wk16 DEFINE 0xFFFFE0A2
RCANC_TTTSEL_WORD DEFINE 0xFFFFE0A4
RCANC_TTTSEL_BIT_TTTSEL8 DEFINE 8
RCANC_TTTSEL_BIT_TTTSEL9 DEFINE 9
RCANC_TTTSEL_BIT_TTTSEL10 DEFINE 10
RCANC_TTTSEL_BIT_TTTSEL11 DEFINE 11
RCANC_TTTSEL_BIT_TTTSEL12 DEFINE 12
RCANC_TTTSEL_BIT_TTTSEL13 DEFINE 13
RCANC_TTTSEL_BIT_TTTSEL14 DEFINE 14
RCANC_wk17 DEFINE 0xFFFFE0A6
RCANC_MSG1_t_CAN_message_buffer_CONTROL0_LONG DEFINE 0xFFFFE100
RCANC_MSG1_t_CAN_message_buffer_CONTROL0_BIT_EXTID DEFINE 0
RCANC_MSG1_t_CAN_message_buffer_CONTROL0_BIT_STDID DEFINE 18
RCANC_MSG1_t_CAN_message_buffer_CONTROL0_BIT_RTR DEFINE 30
RCANC_MSG1_t_CAN_message_buffer_CONTROL0_BIT_IDE DEFINE 31
RCANC_MSG1_t_CAN_message_buffer_LAFM_LONG DEFINE 0xFFFFE104
RCANC_MSG1_t_CAN_message_buffer_LAFM_BIT_EXTID_LAFM DEFINE 0
RCANC_MSG1_t_CAN_message_buffer_LAFM_BIT_STDID_LAFM DEFINE 18
RCANC_MSG1_t_CAN_message_buffer_LAFM_BIT_IDE_LAFM DEFINE 31
RCANC_MSG1_t_CAN_message_buffer_DATA_LONG DEFINE 0xFFFFE108
RCANC_MSG1_t_CAN_message_buffer_DATA_WORD DEFINE 0xFFFFE108
RCANC_MSG1_t_CAN_message_buffer_DATA_BYTE DEFINE 0xFFFFE108
RCANC_MSG1_t_CAN_message_buffer_CONTROL1_WORD DEFINE 0xFFFFE110
RCANC_MSG1_t_CAN_message_buffer_CONTROL1_BIT_MBC DEFINE 0
RCANC_MSG1_t_CAN_message_buffer_CONTROL1_BIT_DART DEFINE 3
RCANC_MSG1_t_CAN_message_buffer_CONTROL1_BIT_ATX DEFINE 4
RCANC_MSG1_t_CAN_message_buffer_CONTROL1_BIT_NMC DEFINE 5
RCANC_MSG1_t_CAN_message_buffer_CONTROL1_BIT_DLC DEFINE 0
RCANC_MSG1_t_CAN_message_buffer_Timestamp DEFINE 0xFFFFE112
RCANC_MSG1_t_CAN_message_buffer_TTT DEFINE 0xFFFFE114
RCANC_MSG1_t_CAN_message_buffer_TTW_WORD DEFINE 0xFFFFE116
RCANC_MSG1_t_CAN_message_buffer_TTW_BIT_rep_factor DEFINE 0
RCANC_MSG1_t_CAN_message_buffer_TTW_BIT_Offset DEFINE 8
RCANC_MSG1_t_CAN_message_buffer_TTW_BIT_TTW DEFINE 14
RCANC_MSG1_t_CAN_message_buffer_wk DEFINE 0xFFFFE118
RCANC_MSG2_t_CAN_message_buffer_CONTROL0_LONG DEFINE 0xFFFFE120
RCANC_MSG2_t_CAN_message_buffer_CONTROL0_BIT_EXTID DEFINE 0
RCANC_MSG2_t_CAN_message_buffer_CONTROL0_BIT_STDID DEFINE 18
RCANC_MSG2_t_CAN_message_buffer_CONTROL0_BIT_RTR DEFINE 30
RCANC_MSG2_t_CAN_message_buffer_CONTROL0_BIT_IDE DEFINE 31
RCANC_MSG2_t_CAN_message_buffer_LAFM_LONG DEFINE 0xFFFFE124
RCANC_MSG2_t_CAN_message_buffer_LAFM_BIT_EXTID_LAFM DEFINE 0
RCANC_MSG2_t_CAN_message_buffer_LAFM_BIT_STDID_LAFM DEFINE 18
RCANC_MSG2_t_CAN_message_buffer_LAFM_BIT_IDE_LAFM DEFINE 31
RCANC_MSG2_t_CAN_message_buffer_DATA_LONG DEFINE 0xFFFFE128
RCANC_MSG2_t_CAN_message_buffer_DATA_WORD DEFINE 0xFFFFE128
RCANC_MSG2_t_CAN_message_buffer_DATA_BYTE DEFINE 0xFFFFE128
RCANC_MSG2_t_CAN_message_buffer_CONTROL1_WORD DEFINE 0xFFFFE130
RCANC_MSG2_t_CAN_message_buffer_CONTROL1_BIT_MBC DEFINE 0
RCANC_MSG2_t_CAN_message_buffer_CONTROL1_BIT_DART DEFINE 3
RCANC_MSG2_t_CAN_message_buffer_CONTROL1_BIT_ATX DEFINE 4
RCANC_MSG2_t_CAN_message_buffer_CONTROL1_BIT_NMC DEFINE 5
RCANC_MSG2_t_CAN_message_buffer_CONTROL1_BIT_DLC DEFINE 0
RCANC_MSG2_t_CAN_message_buffer_Timestamp DEFINE 0xFFFFE132
RCANC_MSG2_t_CAN_message_buffer_TTT DEFINE 0xFFFFE134
RCANC_MSG2_t_CAN_message_buffer_TTW_WORD DEFINE 0xFFFFE136
RCANC_MSG2_t_CAN_message_buffer_TTW_BIT_rep_factor DEFINE 0
RCANC_MSG2_t_CAN_message_buffer_TTW_BIT_Offset DEFINE 8
RCANC_MSG2_t_CAN_message_buffer_TTW_BIT_TTW DEFINE 14
RCANC_MSG2_t_CAN_message_buffer_wk DEFINE 0xFFFFE138
RCANC_MSG3_t_CAN_message_buffer_CONTROL0_LONG DEFINE 0xFFFFE140
RCANC_MSG3_t_CAN_message_buffer_CONTROL0_BIT_EXTID DEFINE 0
RCANC_MSG3_t_CAN_message_buffer_CONTROL0_BIT_STDID DEFINE 18
RCANC_MSG3_t_CAN_message_buffer_CONTROL0_BIT_RTR DEFINE 30
RCANC_MSG3_t_CAN_message_buffer_CONTROL0_BIT_IDE DEFINE 31
RCANC_MSG3_t_CAN_message_buffer_LAFM_LONG DEFINE 0xFFFFE144
RCANC_MSG3_t_CAN_message_buffer_LAFM_BIT_EXTID_LAFM DEFINE 0
RCANC_MSG3_t_CAN_message_buffer_LAFM_BIT_STDID_LAFM DEFINE 18
RCANC_MSG3_t_CAN_message_buffer_LAFM_BIT_IDE_LAFM DEFINE 31
RCANC_MSG3_t_CAN_message_buffer_DATA_LONG DEFINE 0xFFFFE148
RCANC_MSG3_t_CAN_message_buffer_DATA_WORD DEFINE 0xFFFFE148
RCANC_MSG3_t_CAN_message_buffer_DATA_BYTE DEFINE 0xFFFFE148
RCANC_MSG3_t_CAN_message_buffer_CONTROL1_WORD DEFINE 0xFFFFE150
RCANC_MSG3_t_CAN_message_buffer_CONTROL1_BIT_MBC DEFINE 0
RCANC_MSG3_t_CAN_message_buffer_CONTROL1_BIT_DART DEFINE 3
RCANC_MSG3_t_CAN_message_buffer_CONTROL1_BIT_ATX DEFINE 4
RCANC_MSG3_t_CAN_message_buffer_CONTROL1_BIT_NMC DEFINE 5
RCANC_MSG3_t_CAN_message_buffer_CONTROL1_BIT_DLC DEFINE 0
RCANC_MSG3_t_CAN_message_buffer_Timestamp DEFINE 0xFFFFE152
RCANC_MSG3_t_CAN_message_buffer_TTT DEFINE 0xFFFFE154
RCANC_MSG3_t_CAN_message_buffer_TTW_WORD DEFINE 0xFFFFE156
RCANC_MSG3_t_CAN_message_buffer_TTW_BIT_rep_factor DEFINE 0
RCANC_MSG3_t_CAN_message_buffer_TTW_BIT_Offset DEFINE 8
RCANC_MSG3_t_CAN_message_buffer_TTW_BIT_TTW DEFINE 14
RCANC_MSG3_t_CAN_message_buffer_wk DEFINE 0xFFFFE158
RCANC_MSG4_t_CAN_message_buffer_CONTROL0_LONG DEFINE 0xFFFFE160
RCANC_MSG4_t_CAN_message_buffer_CONTROL0_BIT_EXTID DEFINE 0
RCANC_MSG4_t_CAN_message_buffer_CONTROL0_BIT_STDID DEFINE 18
RCANC_MSG4_t_CAN_message_buffer_CONTROL0_BIT_RTR DEFINE 30
RCANC_MSG4_t_CAN_message_buffer_CONTROL0_BIT_IDE DEFINE 31
RCANC_MSG4_t_CAN_message_buffer_LAFM_LONG DEFINE 0xFFFFE164
RCANC_MSG4_t_CAN_message_buffer_LAFM_BIT_EXTID_LAFM DEFINE 0
RCANC_MSG4_t_CAN_message_buffer_LAFM_BIT_STDID_LAFM DEFINE 18
RCANC_MSG4_t_CAN_message_buffer_LAFM_BIT_IDE_LAFM DEFINE 31
RCANC_MSG4_t_CAN_message_buffer_DATA_LONG DEFINE 0xFFFFE168
RCANC_MSG4_t_CAN_message_buffer_DATA_WORD DEFINE 0xFFFFE168
RCANC_MSG4_t_CAN_message_buffer_DATA_BYTE DEFINE 0xFFFFE168
RCANC_MSG4_t_CAN_message_buffer_CONTROL1_WORD DEFINE 0xFFFFE170
RCANC_MSG4_t_CAN_message_buffer_CONTROL1_BIT_MBC DEFINE 0
RCANC_MSG4_t_CAN_message_buffer_CONTROL1_BIT_DART DEFINE 3
RCANC_MSG4_t_CAN_message_buffer_CONTROL1_BIT_ATX DEFINE 4
RCANC_MSG4_t_CAN_message_buffer_CONTROL1_BIT_NMC DEFINE 5
RCANC_MSG4_t_CAN_message_buffer_CONTROL1_BIT_DLC DEFINE 0
RCANC_MSG4_t_CAN_message_buffer_Timestamp DEFINE 0xFFFFE172
RCANC_MSG4_t_CAN_message_buffer_TTT DEFINE 0xFFFFE174
RCANC_MSG4_t_CAN_message_buffer_TTW_WORD DEFINE 0xFFFFE176
RCANC_MSG4_t_CAN_message_buffer_TTW_BIT_rep_factor DEFINE 0
RCANC_MSG4_t_CAN_message_buffer_TTW_BIT_Offset DEFINE 8
RCANC_MSG4_t_CAN_message_buffer_TTW_BIT_TTW DEFINE 14
RCANC_MSG4_t_CAN_message_buffer_wk DEFINE 0xFFFFE178
RCANC_MSG5_t_CAN_message_buffer_CONTROL0_LONG DEFINE 0xFFFFE180
RCANC_MSG5_t_CAN_message_buffer_CONTROL0_BIT_EXTID DEFINE 0
RCANC_MSG5_t_CAN_message_buffer_CONTROL0_BIT_STDID DEFINE 18
RCANC_MSG5_t_CAN_message_buffer_CONTROL0_BIT_RTR DEFINE 30
RCANC_MSG5_t_CAN_message_buffer_CONTROL0_BIT_IDE DEFINE 31
RCANC_MSG5_t_CAN_message_buffer_LAFM_LONG DEFINE 0xFFFFE184
RCANC_MSG5_t_CAN_message_buffer_LAFM_BIT_EXTID_LAFM DEFINE 0
RCANC_MSG5_t_CAN_message_buffer_LAFM_BIT_STDID_LAFM DEFINE 18
RCANC_MSG5_t_CAN_message_buffer_LAFM_BIT_IDE_LAFM DEFINE 31
RCANC_MSG5_t_CAN_message_buffer_DATA_LONG DEFINE 0xFFFFE188
RCANC_MSG5_t_CAN_message_buffer_DATA_WORD DEFINE 0xFFFFE188
RCANC_MSG5_t_CAN_message_buffer_DATA_BYTE DEFINE 0xFFFFE188
RCANC_MSG5_t_CAN_message_buffer_CONTROL1_WORD DEFINE 0xFFFFE190
RCANC_MSG5_t_CAN_message_buffer_CONTROL1_BIT_MBC DEFINE 0
RCANC_MSG5_t_CAN_message_buffer_CONTROL1_BIT_DART DEFINE 3
RCANC_MSG5_t_CAN_message_buffer_CONTROL1_BIT_ATX DEFINE 4
RCANC_MSG5_t_CAN_message_buffer_CONTROL1_BIT_NMC DEFINE 5
RCANC_MSG5_t_CAN_message_buffer_CONTROL1_BIT_DLC DEFINE 0
RCANC_MSG5_t_CAN_message_buffer_Timestamp DEFINE 0xFFFFE192
RCANC_MSG5_t_CAN_message_buffer_TTT DEFINE 0xFFFFE194
RCANC_MSG5_t_CAN_message_buffer_TTW_WORD DEFINE 0xFFFFE196
RCANC_MSG5_t_CAN_message_buffer_TTW_BIT_rep_factor DEFINE 0
RCANC_MSG5_t_CAN_message_buffer_TTW_BIT_Offset DEFINE 8
RCANC_MSG5_t_CAN_message_buffer_TTW_BIT_TTW DEFINE 14
RCANC_MSG5_t_CAN_message_buffer_wk DEFINE 0xFFFFE198
RCANC_MSG6_t_CAN_message_buffer_CONTROL0_LONG DEFINE 0xFFFFE1A0
RCANC_MSG6_t_CAN_message_buffer_CONTROL0_BIT_EXTID DEFINE 0
RCANC_MSG6_t_CAN_message_buffer_CONTROL0_BIT_STDID DEFINE 18
RCANC_MSG6_t_CAN_message_buffer_CONTROL0_BIT_RTR DEFINE 30
RCANC_MSG6_t_CAN_message_buffer_CONTROL0_BIT_IDE DEFINE 31
RCANC_MSG6_t_CAN_message_buffer_LAFM_LONG DEFINE 0xFFFFE1A4
RCANC_MSG6_t_CAN_message_buffer_LAFM_BIT_EXTID_LAFM DEFINE 0
RCANC_MSG6_t_CAN_message_buffer_LAFM_BIT_STDID_LAFM DEFINE 18
RCANC_MSG6_t_CAN_message_buffer_LAFM_BIT_IDE_LAFM DEFINE 31
RCANC_MSG6_t_CAN_message_buffer_DATA_LONG DEFINE 0xFFFFE1A8
RCANC_MSG6_t_CAN_message_buffer_DATA_WORD DEFINE 0xFFFFE1A8
RCANC_MSG6_t_CAN_message_buffer_DATA_BYTE DEFINE 0xFFFFE1A8
RCANC_MSG6_t_CAN_message_buffer_CONTROL1_WORD DEFINE 0xFFFFE1B0
RCANC_MSG6_t_CAN_message_buffer_CONTROL1_BIT_MBC DEFINE 0
RCANC_MSG6_t_CAN_message_buffer_CONTROL1_BIT_DART DEFINE 3
RCANC_MSG6_t_CAN_message_buffer_CONTROL1_BIT_ATX DEFINE 4
RCANC_MSG6_t_CAN_message_buffer_CONTROL1_BIT_NMC DEFINE 5
RCANC_MSG6_t_CAN_message_buffer_CONTROL1_BIT_DLC DEFINE 0
RCANC_MSG6_t_CAN_message_buffer_Timestamp DEFINE 0xFFFFE1B2
RCANC_MSG6_t_CAN_message_buffer_TTT DEFINE 0xFFFFE1B4
RCANC_MSG6_t_CAN_message_buffer_TTW_WORD DEFINE 0xFFFFE1B6
RCANC_MSG6_t_CAN_message_buffer_TTW_BIT_rep_factor DEFINE 0
RCANC_MSG6_t_CAN_message_buffer_TTW_BIT_Offset DEFINE 8
RCANC_MSG6_t_CAN_message_buffer_TTW_BIT_TTW DEFINE 14
RCANC_MSG6_t_CAN_message_buffer_wk DEFINE 0xFFFFE1B8
RCANC_MSG7_t_CAN_message_buffer_CONTROL0_LONG DEFINE 0xFFFFE1C0
RCANC_MSG7_t_CAN_message_buffer_CONTROL0_BIT_EXTID DEFINE 0
RCANC_MSG7_t_CAN_message_buffer_CONTROL0_BIT_STDID DEFINE 18
RCANC_MSG7_t_CAN_message_buffer_CONTROL0_BIT_RTR DEFINE 30
RCANC_MSG7_t_CAN_message_buffer_CONTROL0_BIT_IDE DEFINE 31
RCANC_MSG7_t_CAN_message_buffer_LAFM_LONG DEFINE 0xFFFFE1C4
RCANC_MSG7_t_CAN_message_buffer_LAFM_BIT_EXTID_LAFM DEFINE 0
RCANC_MSG7_t_CAN_message_buffer_LAFM_BIT_STDID_LAFM DEFINE 18
RCANC_MSG7_t_CAN_message_buffer_LAFM_BIT_IDE_LAFM DEFINE 31
RCANC_MSG7_t_CAN_message_buffer_DATA_LONG DEFINE 0xFFFFE1C8
RCANC_MSG7_t_CAN_message_buffer_DATA_WORD DEFINE 0xFFFFE1C8
RCANC_MSG7_t_CAN_message_buffer_DATA_BYTE DEFINE 0xFFFFE1C8
RCANC_MSG7_t_CAN_message_buffer_CONTROL1_WORD DEFINE 0xFFFFE1D0
RCANC_MSG7_t_CAN_message_buffer_CONTROL1_BIT_MBC DEFINE 0
RCANC_MSG7_t_CAN_message_buffer_CONTROL1_BIT_DART DEFINE 3
RCANC_MSG7_t_CAN_message_buffer_CONTROL1_BIT_ATX DEFINE 4
RCANC_MSG7_t_CAN_message_buffer_CONTROL1_BIT_NMC DEFINE 5
RCANC_MSG7_t_CAN_message_buffer_CONTROL1_BIT_DLC DEFINE 0
RCANC_MSG7_t_CAN_message_buffer_Timestamp DEFINE 0xFFFFE1D2
RCANC_MSG7_t_CAN_message_buffer_TTT DEFINE 0xFFFFE1D4
RCANC_MSG7_t_CAN_message_buffer_TTW_WORD DEFINE 0xFFFFE1D6
RCANC_MSG7_t_CAN_message_buffer_TTW_BIT_rep_factor DEFINE 0
RCANC_MSG7_t_CAN_message_buffer_TTW_BIT_Offset DEFINE 8
RCANC_MSG7_t_CAN_message_buffer_TTW_BIT_TTW DEFINE 14
RCANC_MSG7_t_CAN_message_buffer_wk DEFINE 0xFFFFE1D8
RCANC_MSG8_t_CAN_message_buffer_CONTROL0_LONG DEFINE 0xFFFFE1E0
RCANC_MSG8_t_CAN_message_buffer_CONTROL0_BIT_EXTID DEFINE 0
RCANC_MSG8_t_CAN_message_buffer_CONTROL0_BIT_STDID DEFINE 18
RCANC_MSG8_t_CAN_message_buffer_CONTROL0_BIT_RTR DEFINE 30
RCANC_MSG8_t_CAN_message_buffer_CONTROL0_BIT_IDE DEFINE 31
RCANC_MSG8_t_CAN_message_buffer_LAFM_LONG DEFINE 0xFFFFE1E4
RCANC_MSG8_t_CAN_message_buffer_LAFM_BIT_EXTID_LAFM DEFINE 0
RCANC_MSG8_t_CAN_message_buffer_LAFM_BIT_STDID_LAFM DEFINE 18
RCANC_MSG8_t_CAN_message_buffer_LAFM_BIT_IDE_LAFM DEFINE 31
RCANC_MSG8_t_CAN_message_buffer_DATA_LONG DEFINE 0xFFFFE1E8
RCANC_MSG8_t_CAN_message_buffer_DATA_WORD DEFINE 0xFFFFE1E8
RCANC_MSG8_t_CAN_message_buffer_DATA_BYTE DEFINE 0xFFFFE1E8
RCANC_MSG8_t_CAN_message_buffer_CONTROL1_WORD DEFINE 0xFFFFE1F0
RCANC_MSG8_t_CAN_message_buffer_CONTROL1_BIT_MBC DEFINE 0
RCANC_MSG8_t_CAN_message_buffer_CONTROL1_BIT_DART DEFINE 3
RCANC_MSG8_t_CAN_message_buffer_CONTROL1_BIT_ATX DEFINE 4
RCANC_MSG8_t_CAN_message_buffer_CONTROL1_BIT_NMC DEFINE 5
RCANC_MSG8_t_CAN_message_buffer_CONTROL1_BIT_DLC DEFINE 0
RCANC_MSG8_t_CAN_message_buffer_Timestamp DEFINE 0xFFFFE1F2
RCANC_MSG8_t_CAN_message_buffer_TTT DEFINE 0xFFFFE1F4
RCANC_MSG8_t_CAN_message_buffer_TTW_WORD DEFINE 0xFFFFE1F6
RCANC_MSG8_t_CAN_message_buffer_TTW_BIT_rep_factor DEFINE 0
RCANC_MSG8_t_CAN_message_buffer_TTW_BIT_Offset DEFINE 8
RCANC_MSG8_t_CAN_message_buffer_TTW_BIT_TTW DEFINE 14
RCANC_MSG8_t_CAN_message_buffer_wk DEFINE 0xFFFFE1F8
RCANC_MSG9_t_CAN_message_buffer_CONTROL0_LONG DEFINE 0xFFFFE200
RCANC_MSG9_t_CAN_message_buffer_CONTROL0_BIT_EXTID DEFINE 0
RCANC_MSG9_t_CAN_message_buffer_CONTROL0_BIT_STDID DEFINE 18
RCANC_MSG9_t_CAN_message_buffer_CONTROL0_BIT_RTR DEFINE 30
RCANC_MSG9_t_CAN_message_buffer_CONTROL0_BIT_IDE DEFINE 31
RCANC_MSG9_t_CAN_message_buffer_LAFM_LONG DEFINE 0xFFFFE204
RCANC_MSG9_t_CAN_message_buffer_LAFM_BIT_EXTID_LAFM DEFINE 0
RCANC_MSG9_t_CAN_message_buffer_LAFM_BIT_STDID_LAFM DEFINE 18
RCANC_MSG9_t_CAN_message_buffer_LAFM_BIT_IDE_LAFM DEFINE 31
RCANC_MSG9_t_CAN_message_buffer_DATA_LONG DEFINE 0xFFFFE208
RCANC_MSG9_t_CAN_message_buffer_DATA_WORD DEFINE 0xFFFFE208
RCANC_MSG9_t_CAN_message_buffer_DATA_BYTE DEFINE 0xFFFFE208
RCANC_MSG9_t_CAN_message_buffer_CONTROL1_WORD DEFINE 0xFFFFE210
RCANC_MSG9_t_CAN_message_buffer_CONTROL1_BIT_MBC DEFINE 0
RCANC_MSG9_t_CAN_message_buffer_CONTROL1_BIT_DART DEFINE 3
RCANC_MSG9_t_CAN_message_buffer_CONTROL1_BIT_ATX DEFINE 4
RCANC_MSG9_t_CAN_message_buffer_CONTROL1_BIT_NMC DEFINE 5
RCANC_MSG9_t_CAN_message_buffer_CONTROL1_BIT_DLC DEFINE 0
RCANC_MSG9_t_CAN_message_buffer_Timestamp DEFINE 0xFFFFE212
RCANC_MSG9_t_CAN_message_buffer_TTT DEFINE 0xFFFFE214
RCANC_MSG9_t_CAN_message_buffer_TTW_WORD DEFINE 0xFFFFE216
RCANC_MSG9_t_CAN_message_buffer_TTW_BIT_rep_factor DEFINE 0
RCANC_MSG9_t_CAN_message_buffer_TTW_BIT_Offset DEFINE 8
RCANC_MSG9_t_CAN_message_buffer_TTW_BIT_TTW DEFINE 14
RCANC_MSG9_t_CAN_message_buffer_wk DEFINE 0xFFFFE218
RCANC_MSG10_t_CAN_message_buffer_CONTROL0_LONG DEFINE 0xFFFFE220
RCANC_MSG10_t_CAN_message_buffer_CONTROL0_BIT_EXTID DEFINE 0
RCANC_MSG10_t_CAN_message_buffer_CONTROL0_BIT_STDID DEFINE 18
RCANC_MSG10_t_CAN_message_buffer_CONTROL0_BIT_RTR DEFINE 30
RCANC_MSG10_t_CAN_message_buffer_CONTROL0_BIT_IDE DEFINE 31
RCANC_MSG10_t_CAN_message_buffer_LAFM_LONG DEFINE 0xFFFFE224
RCANC_MSG10_t_CAN_message_buffer_LAFM_BIT_EXTID_LAFM DEFINE 0
RCANC_MSG10_t_CAN_message_buffer_LAFM_BIT_STDID_LAFM DEFINE 18
RCANC_MSG10_t_CAN_message_buffer_LAFM_BIT_IDE_LAFM DEFINE 31
RCANC_MSG10_t_CAN_message_buffer_DATA_LONG DEFINE 0xFFFFE228
RCANC_MSG10_t_CAN_message_buffer_DATA_WORD DEFINE 0xFFFFE228
RCANC_MSG10_t_CAN_message_buffer_DATA_BYTE DEFINE 0xFFFFE228
RCANC_MSG10_t_CAN_message_buffer_CONTROL1_WORD DEFINE 0xFFFFE230
RCANC_MSG10_t_CAN_message_buffer_CONTROL1_BIT_MBC DEFINE 0
RCANC_MSG10_t_CAN_message_buffer_CONTROL1_BIT_DART DEFINE 3
RCANC_MSG10_t_CAN_message_buffer_CONTROL1_BIT_ATX DEFINE 4
RCANC_MSG10_t_CAN_message_buffer_CONTROL1_BIT_NMC DEFINE 5
RCANC_MSG10_t_CAN_message_buffer_CONTROL1_BIT_DLC DEFINE 0
RCANC_MSG10_t_CAN_message_buffer_Timestamp DEFINE 0xFFFFE232
RCANC_MSG10_t_CAN_message_buffer_TTT DEFINE 0xFFFFE234
RCANC_MSG10_t_CAN_message_buffer_TTW_WORD DEFINE 0xFFFFE236
RCANC_MSG10_t_CAN_message_buffer_TTW_BIT_rep_factor DEFINE 0
RCANC_MSG10_t_CAN_message_buffer_TTW_BIT_Offset DEFINE 8
RCANC_MSG10_t_CAN_message_buffer_TTW_BIT_TTW DEFINE 14
RCANC_MSG10_t_CAN_message_buffer_wk DEFINE 0xFFFFE238
RCANC_MSG11_t_CAN_message_buffer_CONTROL0_LONG DEFINE 0xFFFFE240
RCANC_MSG11_t_CAN_message_buffer_CONTROL0_BIT_EXTID DEFINE 0
RCANC_MSG11_t_CAN_message_buffer_CONTROL0_BIT_STDID DEFINE 18
RCANC_MSG11_t_CAN_message_buffer_CONTROL0_BIT_RTR DEFINE 30
RCANC_MSG11_t_CAN_message_buffer_CONTROL0_BIT_IDE DEFINE 31
RCANC_MSG11_t_CAN_message_buffer_LAFM_LONG DEFINE 0xFFFFE244
RCANC_MSG11_t_CAN_message_buffer_LAFM_BIT_EXTID_LAFM DEFINE 0
RCANC_MSG11_t_CAN_message_buffer_LAFM_BIT_STDID_LAFM DEFINE 18
RCANC_MSG11_t_CAN_message_buffer_LAFM_BIT_IDE_LAFM DEFINE 31
RCANC_MSG11_t_CAN_message_buffer_DATA_LONG DEFINE 0xFFFFE248
RCANC_MSG11_t_CAN_message_buffer_DATA_WORD DEFINE 0xFFFFE248
RCANC_MSG11_t_CAN_message_buffer_DATA_BYTE DEFINE 0xFFFFE248
RCANC_MSG11_t_CAN_message_buffer_CONTROL1_WORD DEFINE 0xFFFFE250
RCANC_MSG11_t_CAN_message_buffer_CONTROL1_BIT_MBC DEFINE 0
RCANC_MSG11_t_CAN_message_buffer_CONTROL1_BIT_DART DEFINE 3
RCANC_MSG11_t_CAN_message_buffer_CONTROL1_BIT_ATX DEFINE 4
RCANC_MSG11_t_CAN_message_buffer_CONTROL1_BIT_NMC DEFINE 5
RCANC_MSG11_t_CAN_message_buffer_CONTROL1_BIT_DLC DEFINE 0
RCANC_MSG11_t_CAN_message_buffer_Timestamp DEFINE 0xFFFFE252
RCANC_MSG11_t_CAN_message_buffer_TTT DEFINE 0xFFFFE254
RCANC_MSG11_t_CAN_message_buffer_TTW_WORD DEFINE 0xFFFFE256
RCANC_MSG11_t_CAN_message_buffer_TTW_BIT_rep_factor DEFINE 0
RCANC_MSG11_t_CAN_message_buffer_TTW_BIT_Offset DEFINE 8
RCANC_MSG11_t_CAN_message_buffer_TTW_BIT_TTW DEFINE 14
RCANC_MSG11_t_CAN_message_buffer_wk DEFINE 0xFFFFE258
RCANC_MSG12_t_CAN_message_buffer_CONTROL0_LONG DEFINE 0xFFFFE260
RCANC_MSG12_t_CAN_message_buffer_CONTROL0_BIT_EXTID DEFINE 0
RCANC_MSG12_t_CAN_message_buffer_CONTROL0_BIT_STDID DEFINE 18
RCANC_MSG12_t_CAN_message_buffer_CONTROL0_BIT_RTR DEFINE 30
RCANC_MSG12_t_CAN_message_buffer_CONTROL0_BIT_IDE DEFINE 31
RCANC_MSG12_t_CAN_message_buffer_LAFM_LONG DEFINE 0xFFFFE264
RCANC_MSG12_t_CAN_message_buffer_LAFM_BIT_EXTID_LAFM DEFINE 0
RCANC_MSG12_t_CAN_message_buffer_LAFM_BIT_STDID_LAFM DEFINE 18
RCANC_MSG12_t_CAN_message_buffer_LAFM_BIT_IDE_LAFM DEFINE 31
RCANC_MSG12_t_CAN_message_buffer_DATA_LONG DEFINE 0xFFFFE268
RCANC_MSG12_t_CAN_message_buffer_DATA_WORD DEFINE 0xFFFFE268
RCANC_MSG12_t_CAN_message_buffer_DATA_BYTE DEFINE 0xFFFFE268
RCANC_MSG12_t_CAN_message_buffer_CONTROL1_WORD DEFINE 0xFFFFE270
RCANC_MSG12_t_CAN_message_buffer_CONTROL1_BIT_MBC DEFINE 0
RCANC_MSG12_t_CAN_message_buffer_CONTROL1_BIT_DART DEFINE 3
RCANC_MSG12_t_CAN_message_buffer_CONTROL1_BIT_ATX DEFINE 4
RCANC_MSG12_t_CAN_message_buffer_CONTROL1_BIT_NMC DEFINE 5
RCANC_MSG12_t_CAN_message_buffer_CONTROL1_BIT_DLC DEFINE 0
RCANC_MSG12_t_CAN_message_buffer_Timestamp DEFINE 0xFFFFE272
RCANC_MSG12_t_CAN_message_buffer_TTT DEFINE 0xFFFFE274
RCANC_MSG12_t_CAN_message_buffer_TTW_WORD DEFINE 0xFFFFE276
RCANC_MSG12_t_CAN_message_buffer_TTW_BIT_rep_factor DEFINE 0
RCANC_MSG12_t_CAN_message_buffer_TTW_BIT_Offset DEFINE 8
RCANC_MSG12_t_CAN_message_buffer_TTW_BIT_TTW DEFINE 14
RCANC_MSG12_t_CAN_message_buffer_wk DEFINE 0xFFFFE278
RCANC_MSG13_t_CAN_message_buffer_CONTROL0_LONG DEFINE 0xFFFFE280
RCANC_MSG13_t_CAN_message_buffer_CONTROL0_BIT_EXTID DEFINE 0
RCANC_MSG13_t_CAN_message_buffer_CONTROL0_BIT_STDID DEFINE 18
RCANC_MSG13_t_CAN_message_buffer_CONTROL0_BIT_RTR DEFINE 30
RCANC_MSG13_t_CAN_message_buffer_CONTROL0_BIT_IDE DEFINE 31
RCANC_MSG13_t_CAN_message_buffer_LAFM_LONG DEFINE 0xFFFFE284
RCANC_MSG13_t_CAN_message_buffer_LAFM_BIT_EXTID_LAFM DEFINE 0
RCANC_MSG13_t_CAN_message_buffer_LAFM_BIT_STDID_LAFM DEFINE 18
RCANC_MSG13_t_CAN_message_buffer_LAFM_BIT_IDE_LAFM DEFINE 31
RCANC_MSG13_t_CAN_message_buffer_DATA_LONG DEFINE 0xFFFFE288
RCANC_MSG13_t_CAN_message_buffer_DATA_WORD DEFINE 0xFFFFE288
RCANC_MSG13_t_CAN_message_buffer_DATA_BYTE DEFINE 0xFFFFE288
RCANC_MSG13_t_CAN_message_buffer_CONTROL1_WORD DEFINE 0xFFFFE290
RCANC_MSG13_t_CAN_message_buffer_CONTROL1_BIT_MBC DEFINE 0
RCANC_MSG13_t_CAN_message_buffer_CONTROL1_BIT_DART DEFINE 3
RCANC_MSG13_t_CAN_message_buffer_CONTROL1_BIT_ATX DEFINE 4
RCANC_MSG13_t_CAN_message_buffer_CONTROL1_BIT_NMC DEFINE 5
RCANC_MSG13_t_CAN_message_buffer_CONTROL1_BIT_DLC DEFINE 0
RCANC_MSG13_t_CAN_message_buffer_Timestamp DEFINE 0xFFFFE292
RCANC_MSG13_t_CAN_message_buffer_TTT DEFINE 0xFFFFE294
RCANC_MSG13_t_CAN_message_buffer_TTW_WORD DEFINE 0xFFFFE296
RCANC_MSG13_t_CAN_message_buffer_TTW_BIT_rep_factor DEFINE 0
RCANC_MSG13_t_CAN_message_buffer_TTW_BIT_Offset DEFINE 8
RCANC_MSG13_t_CAN_message_buffer_TTW_BIT_TTW DEFINE 14
RCANC_MSG13_t_CAN_message_buffer_wk DEFINE 0xFFFFE298
RCANC_MSG14_t_CAN_message_buffer_CONTROL0_LONG DEFINE 0xFFFFE2A0
RCANC_MSG14_t_CAN_message_buffer_CONTROL0_BIT_EXTID DEFINE 0
RCANC_MSG14_t_CAN_message_buffer_CONTROL0_BIT_STDID DEFINE 18
RCANC_MSG14_t_CAN_message_buffer_CONTROL0_BIT_RTR DEFINE 30
RCANC_MSG14_t_CAN_message_buffer_CONTROL0_BIT_IDE DEFINE 31
RCANC_MSG14_t_CAN_message_buffer_LAFM_LONG DEFINE 0xFFFFE2A4
RCANC_MSG14_t_CAN_message_buffer_LAFM_BIT_EXTID_LAFM DEFINE 0
RCANC_MSG14_t_CAN_message_buffer_LAFM_BIT_STDID_LAFM DEFINE 18
RCANC_MSG14_t_CAN_message_buffer_LAFM_BIT_IDE_LAFM DEFINE 31
RCANC_MSG14_t_CAN_message_buffer_DATA_LONG DEFINE 0xFFFFE2A8
RCANC_MSG14_t_CAN_message_buffer_DATA_WORD DEFINE 0xFFFFE2A8
RCANC_MSG14_t_CAN_message_buffer_DATA_BYTE DEFINE 0xFFFFE2A8
RCANC_MSG14_t_CAN_message_buffer_CONTROL1_WORD DEFINE 0xFFFFE2B0
RCANC_MSG14_t_CAN_message_buffer_CONTROL1_BIT_MBC DEFINE 0
RCANC_MSG14_t_CAN_message_buffer_CONTROL1_BIT_DART DEFINE 3
RCANC_MSG14_t_CAN_message_buffer_CONTROL1_BIT_ATX DEFINE 4
RCANC_MSG14_t_CAN_message_buffer_CONTROL1_BIT_NMC DEFINE 5
RCANC_MSG14_t_CAN_message_buffer_CONTROL1_BIT_DLC DEFINE 0
RCANC_MSG14_t_CAN_message_buffer_Timestamp DEFINE 0xFFFFE2B2
RCANC_MSG14_t_CAN_message_buffer_TTT DEFINE 0xFFFFE2B4
RCANC_MSG14_t_CAN_message_buffer_TTW_WORD DEFINE 0xFFFFE2B6
RCANC_MSG14_t_CAN_message_buffer_TTW_BIT_rep_factor DEFINE 0
RCANC_MSG14_t_CAN_message_buffer_TTW_BIT_Offset DEFINE 8
RCANC_MSG14_t_CAN_message_buffer_TTW_BIT_TTW DEFINE 14
RCANC_MSG14_t_CAN_message_buffer_wk DEFINE 0xFFFFE2B8
RCANC_MSG15_t_CAN_message_buffer_CONTROL0_LONG DEFINE 0xFFFFE2C0
RCANC_MSG15_t_CAN_message_buffer_CONTROL0_BIT_EXTID DEFINE 0
RCANC_MSG15_t_CAN_message_buffer_CONTROL0_BIT_STDID DEFINE 18
RCANC_MSG15_t_CAN_message_buffer_CONTROL0_BIT_RTR DEFINE 30
RCANC_MSG15_t_CAN_message_buffer_CONTROL0_BIT_IDE DEFINE 31
RCANC_MSG15_t_CAN_message_buffer_LAFM_LONG DEFINE 0xFFFFE2C4
RCANC_MSG15_t_CAN_message_buffer_LAFM_BIT_EXTID_LAFM DEFINE 0
RCANC_MSG15_t_CAN_message_buffer_LAFM_BIT_STDID_LAFM DEFINE 18
RCANC_MSG15_t_CAN_message_buffer_LAFM_BIT_IDE_LAFM DEFINE 31
RCANC_MSG15_t_CAN_message_buffer_DATA_LONG DEFINE 0xFFFFE2C8
RCANC_MSG15_t_CAN_message_buffer_DATA_WORD DEFINE 0xFFFFE2C8
RCANC_MSG15_t_CAN_message_buffer_DATA_BYTE DEFINE 0xFFFFE2C8
RCANC_MSG15_t_CAN_message_buffer_CONTROL1_WORD DEFINE 0xFFFFE2D0
RCANC_MSG15_t_CAN_message_buffer_CONTROL1_BIT_MBC DEFINE 0
RCANC_MSG15_t_CAN_message_buffer_CONTROL1_BIT_DART DEFINE 3
RCANC_MSG15_t_CAN_message_buffer_CONTROL1_BIT_ATX DEFINE 4
RCANC_MSG15_t_CAN_message_buffer_CONTROL1_BIT_NMC DEFINE 5
RCANC_MSG15_t_CAN_message_buffer_CONTROL1_BIT_DLC DEFINE 0
RCANC_MSG15_t_CAN_message_buffer_Timestamp DEFINE 0xFFFFE2D2
RCANC_MSG15_t_CAN_message_buffer_TTT DEFINE 0xFFFFE2D4
RCANC_MSG15_t_CAN_message_buffer_TTW_WORD DEFINE 0xFFFFE2D6
RCANC_MSG15_t_CAN_message_buffer_TTW_BIT_rep_factor DEFINE 0
RCANC_MSG15_t_CAN_message_buffer_TTW_BIT_Offset DEFINE 8
RCANC_MSG15_t_CAN_message_buffer_TTW_BIT_TTW DEFINE 14
RCANC_MSG15_t_CAN_message_buffer_wk DEFINE 0xFFFFE2D8
RCANC_MSG16_t_CAN_message_buffer_CONTROL0_LONG DEFINE 0xFFFFE2E0
RCANC_MSG16_t_CAN_message_buffer_CONTROL0_BIT_EXTID DEFINE 0
RCANC_MSG16_t_CAN_message_buffer_CONTROL0_BIT_STDID DEFINE 18
RCANC_MSG16_t_CAN_message_buffer_CONTROL0_BIT_RTR DEFINE 30
RCANC_MSG16_t_CAN_message_buffer_CONTROL0_BIT_IDE DEFINE 31
RCANC_MSG16_t_CAN_message_buffer_LAFM_LONG DEFINE 0xFFFFE2E4
RCANC_MSG16_t_CAN_message_buffer_LAFM_BIT_EXTID_LAFM DEFINE 0
RCANC_MSG16_t_CAN_message_buffer_LAFM_BIT_STDID_LAFM DEFINE 18
RCANC_MSG16_t_CAN_message_buffer_LAFM_BIT_IDE_LAFM DEFINE 31
RCANC_MSG16_t_CAN_message_buffer_DATA_LONG DEFINE 0xFFFFE2E8
RCANC_MSG16_t_CAN_message_buffer_DATA_WORD DEFINE 0xFFFFE2E8
RCANC_MSG16_t_CAN_message_buffer_DATA_BYTE DEFINE 0xFFFFE2E8
RCANC_MSG16_t_CAN_message_buffer_CONTROL1_WORD DEFINE 0xFFFFE2F0
RCANC_MSG16_t_CAN_message_buffer_CONTROL1_BIT_MBC DEFINE 0
RCANC_MSG16_t_CAN_message_buffer_CONTROL1_BIT_DART DEFINE 3
RCANC_MSG16_t_CAN_message_buffer_CONTROL1_BIT_ATX DEFINE 4
RCANC_MSG16_t_CAN_message_buffer_CONTROL1_BIT_NMC DEFINE 5
RCANC_MSG16_t_CAN_message_buffer_CONTROL1_BIT_DLC DEFINE 0
RCANC_MSG16_t_CAN_message_buffer_Timestamp DEFINE 0xFFFFE2F2
RCANC_MSG16_t_CAN_message_buffer_TTT DEFINE 0xFFFFE2F4
RCANC_MSG16_t_CAN_message_buffer_TTW_WORD DEFINE 0xFFFFE2F6
RCANC_MSG16_t_CAN_message_buffer_TTW_BIT_rep_factor DEFINE 0
RCANC_MSG16_t_CAN_message_buffer_TTW_BIT_Offset DEFINE 8
RCANC_MSG16_t_CAN_message_buffer_TTW_BIT_TTW DEFINE 14
RCANC_MSG16_t_CAN_message_buffer_wk DEFINE 0xFFFFE2F8
RCANC_MSG17_t_CAN_message_buffer_CONTROL0_LONG DEFINE 0xFFFFE300
RCANC_MSG17_t_CAN_message_buffer_CONTROL0_BIT_EXTID DEFINE 0
RCANC_MSG17_t_CAN_message_buffer_CONTROL0_BIT_STDID DEFINE 18
RCANC_MSG17_t_CAN_message_buffer_CONTROL0_BIT_RTR DEFINE 30
RCANC_MSG17_t_CAN_message_buffer_CONTROL0_BIT_IDE DEFINE 31
RCANC_MSG17_t_CAN_message_buffer_LAFM_LONG DEFINE 0xFFFFE304
RCANC_MSG17_t_CAN_message_buffer_LAFM_BIT_EXTID_LAFM DEFINE 0
RCANC_MSG17_t_CAN_message_buffer_LAFM_BIT_STDID_LAFM DEFINE 18
RCANC_MSG17_t_CAN_message_buffer_LAFM_BIT_IDE_LAFM DEFINE 31
RCANC_MSG17_t_CAN_message_buffer_DATA_LONG DEFINE 0xFFFFE308
RCANC_MSG17_t_CAN_message_buffer_DATA_WORD DEFINE 0xFFFFE308
RCANC_MSG17_t_CAN_message_buffer_DATA_BYTE DEFINE 0xFFFFE308
RCANC_MSG17_t_CAN_message_buffer_CONTROL1_WORD DEFINE 0xFFFFE310
RCANC_MSG17_t_CAN_message_buffer_CONTROL1_BIT_MBC DEFINE 0
RCANC_MSG17_t_CAN_message_buffer_CONTROL1_BIT_DART DEFINE 3
RCANC_MSG17_t_CAN_message_buffer_CONTROL1_BIT_ATX DEFINE 4
RCANC_MSG17_t_CAN_message_buffer_CONTROL1_BIT_NMC DEFINE 5
RCANC_MSG17_t_CAN_message_buffer_CONTROL1_BIT_DLC DEFINE 0
RCANC_MSG17_t_CAN_message_buffer_Timestamp DEFINE 0xFFFFE312
RCANC_MSG17_t_CAN_message_buffer_TTT DEFINE 0xFFFFE314
RCANC_MSG17_t_CAN_message_buffer_TTW_WORD DEFINE 0xFFFFE316
RCANC_MSG17_t_CAN_message_buffer_TTW_BIT_rep_factor DEFINE 0
RCANC_MSG17_t_CAN_message_buffer_TTW_BIT_Offset DEFINE 8
RCANC_MSG17_t_CAN_message_buffer_TTW_BIT_TTW DEFINE 14
RCANC_MSG17_t_CAN_message_buffer_wk DEFINE 0xFFFFE318
RCANC_MSG18_t_CAN_message_buffer_CONTROL0_LONG DEFINE 0xFFFFE320
RCANC_MSG18_t_CAN_message_buffer_CONTROL0_BIT_EXTID DEFINE 0
RCANC_MSG18_t_CAN_message_buffer_CONTROL0_BIT_STDID DEFINE 18
RCANC_MSG18_t_CAN_message_buffer_CONTROL0_BIT_RTR DEFINE 30
RCANC_MSG18_t_CAN_message_buffer_CONTROL0_BIT_IDE DEFINE 31
RCANC_MSG18_t_CAN_message_buffer_LAFM_LONG DEFINE 0xFFFFE324
RCANC_MSG18_t_CAN_message_buffer_LAFM_BIT_EXTID_LAFM DEFINE 0
RCANC_MSG18_t_CAN_message_buffer_LAFM_BIT_STDID_LAFM DEFINE 18
RCANC_MSG18_t_CAN_message_buffer_LAFM_BIT_IDE_LAFM DEFINE 31
RCANC_MSG18_t_CAN_message_buffer_DATA_LONG DEFINE 0xFFFFE328
RCANC_MSG18_t_CAN_message_buffer_DATA_WORD DEFINE 0xFFFFE328
RCANC_MSG18_t_CAN_message_buffer_DATA_BYTE DEFINE 0xFFFFE328
RCANC_MSG18_t_CAN_message_buffer_CONTROL1_WORD DEFINE 0xFFFFE330
RCANC_MSG18_t_CAN_message_buffer_CONTROL1_BIT_MBC DEFINE 0
RCANC_MSG18_t_CAN_message_buffer_CONTROL1_BIT_DART DEFINE 3
RCANC_MSG18_t_CAN_message_buffer_CONTROL1_BIT_ATX DEFINE 4
RCANC_MSG18_t_CAN_message_buffer_CONTROL1_BIT_NMC DEFINE 5
RCANC_MSG18_t_CAN_message_buffer_CONTROL1_BIT_DLC DEFINE 0
RCANC_MSG18_t_CAN_message_buffer_Timestamp DEFINE 0xFFFFE332
RCANC_MSG18_t_CAN_message_buffer_TTT DEFINE 0xFFFFE334
RCANC_MSG18_t_CAN_message_buffer_TTW_WORD DEFINE 0xFFFFE336
RCANC_MSG18_t_CAN_message_buffer_TTW_BIT_rep_factor DEFINE 0
RCANC_MSG18_t_CAN_message_buffer_TTW_BIT_Offset DEFINE 8
RCANC_MSG18_t_CAN_message_buffer_TTW_BIT_TTW DEFINE 14
RCANC_MSG18_t_CAN_message_buffer_wk DEFINE 0xFFFFE338
RCANC_MSG19_t_CAN_message_buffer_CONTROL0_LONG DEFINE 0xFFFFE340
RCANC_MSG19_t_CAN_message_buffer_CONTROL0_BIT_EXTID DEFINE 0
RCANC_MSG19_t_CAN_message_buffer_CONTROL0_BIT_STDID DEFINE 18
RCANC_MSG19_t_CAN_message_buffer_CONTROL0_BIT_RTR DEFINE 30
RCANC_MSG19_t_CAN_message_buffer_CONTROL0_BIT_IDE DEFINE 31
RCANC_MSG19_t_CAN_message_buffer_LAFM_LONG DEFINE 0xFFFFE344
RCANC_MSG19_t_CAN_message_buffer_LAFM_BIT_EXTID_LAFM DEFINE 0
RCANC_MSG19_t_CAN_message_buffer_LAFM_BIT_STDID_LAFM DEFINE 18
RCANC_MSG19_t_CAN_message_buffer_LAFM_BIT_IDE_LAFM DEFINE 31
RCANC_MSG19_t_CAN_message_buffer_DATA_LONG DEFINE 0xFFFFE348
RCANC_MSG19_t_CAN_message_buffer_DATA_WORD DEFINE 0xFFFFE348
RCANC_MSG19_t_CAN_message_buffer_DATA_BYTE DEFINE 0xFFFFE348
RCANC_MSG19_t_CAN_message_buffer_CONTROL1_WORD DEFINE 0xFFFFE350
RCANC_MSG19_t_CAN_message_buffer_CONTROL1_BIT_MBC DEFINE 0
RCANC_MSG19_t_CAN_message_buffer_CONTROL1_BIT_DART DEFINE 3
RCANC_MSG19_t_CAN_message_buffer_CONTROL1_BIT_ATX DEFINE 4
RCANC_MSG19_t_CAN_message_buffer_CONTROL1_BIT_NMC DEFINE 5
RCANC_MSG19_t_CAN_message_buffer_CONTROL1_BIT_DLC DEFINE 0
RCANC_MSG19_t_CAN_message_buffer_Timestamp DEFINE 0xFFFFE352
RCANC_MSG19_t_CAN_message_buffer_TTT DEFINE 0xFFFFE354
RCANC_MSG19_t_CAN_message_buffer_TTW_WORD DEFINE 0xFFFFE356
RCANC_MSG19_t_CAN_message_buffer_TTW_BIT_rep_factor DEFINE 0
RCANC_MSG19_t_CAN_message_buffer_TTW_BIT_Offset DEFINE 8
RCANC_MSG19_t_CAN_message_buffer_TTW_BIT_TTW DEFINE 14
RCANC_MSG19_t_CAN_message_buffer_wk DEFINE 0xFFFFE358
RCANC_MSG20_t_CAN_message_buffer_CONTROL0_LONG DEFINE 0xFFFFE360
RCANC_MSG20_t_CAN_message_buffer_CONTROL0_BIT_EXTID DEFINE 0
RCANC_MSG20_t_CAN_message_buffer_CONTROL0_BIT_STDID DEFINE 18
RCANC_MSG20_t_CAN_message_buffer_CONTROL0_BIT_RTR DEFINE 30
RCANC_MSG20_t_CAN_message_buffer_CONTROL0_BIT_IDE DEFINE 31
RCANC_MSG20_t_CAN_message_buffer_LAFM_LONG DEFINE 0xFFFFE364
RCANC_MSG20_t_CAN_message_buffer_LAFM_BIT_EXTID_LAFM DEFINE 0
RCANC_MSG20_t_CAN_message_buffer_LAFM_BIT_STDID_LAFM DEFINE 18
RCANC_MSG20_t_CAN_message_buffer_LAFM_BIT_IDE_LAFM DEFINE 31
RCANC_MSG20_t_CAN_message_buffer_DATA_LONG DEFINE 0xFFFFE368
RCANC_MSG20_t_CAN_message_buffer_DATA_WORD DEFINE 0xFFFFE368
RCANC_MSG20_t_CAN_message_buffer_DATA_BYTE DEFINE 0xFFFFE368
RCANC_MSG20_t_CAN_message_buffer_CONTROL1_WORD DEFINE 0xFFFFE370
RCANC_MSG20_t_CAN_message_buffer_CONTROL1_BIT_MBC DEFINE 0
RCANC_MSG20_t_CAN_message_buffer_CONTROL1_BIT_DART DEFINE 3
RCANC_MSG20_t_CAN_message_buffer_CONTROL1_BIT_ATX DEFINE 4
RCANC_MSG20_t_CAN_message_buffer_CONTROL1_BIT_NMC DEFINE 5
RCANC_MSG20_t_CAN_message_buffer_CONTROL1_BIT_DLC DEFINE 0
RCANC_MSG20_t_CAN_message_buffer_Timestamp DEFINE 0xFFFFE372
RCANC_MSG20_t_CAN_message_buffer_TTT DEFINE 0xFFFFE374
RCANC_MSG20_t_CAN_message_buffer_TTW_WORD DEFINE 0xFFFFE376
RCANC_MSG20_t_CAN_message_buffer_TTW_BIT_rep_factor DEFINE 0
RCANC_MSG20_t_CAN_message_buffer_TTW_BIT_Offset DEFINE 8
RCANC_MSG20_t_CAN_message_buffer_TTW_BIT_TTW DEFINE 14
RCANC_MSG20_t_CAN_message_buffer_wk DEFINE 0xFFFFE378
RCANC_MSG21_t_CAN_message_buffer_CONTROL0_LONG DEFINE 0xFFFFE380
RCANC_MSG21_t_CAN_message_buffer_CONTROL0_BIT_EXTID DEFINE 0
RCANC_MSG21_t_CAN_message_buffer_CONTROL0_BIT_STDID DEFINE 18
RCANC_MSG21_t_CAN_message_buffer_CONTROL0_BIT_RTR DEFINE 30
RCANC_MSG21_t_CAN_message_buffer_CONTROL0_BIT_IDE DEFINE 31
RCANC_MSG21_t_CAN_message_buffer_LAFM_LONG DEFINE 0xFFFFE384
RCANC_MSG21_t_CAN_message_buffer_LAFM_BIT_EXTID_LAFM DEFINE 0
RCANC_MSG21_t_CAN_message_buffer_LAFM_BIT_STDID_LAFM DEFINE 18
RCANC_MSG21_t_CAN_message_buffer_LAFM_BIT_IDE_LAFM DEFINE 31
RCANC_MSG21_t_CAN_message_buffer_DATA_LONG DEFINE 0xFFFFE388
RCANC_MSG21_t_CAN_message_buffer_DATA_WORD DEFINE 0xFFFFE388
RCANC_MSG21_t_CAN_message_buffer_DATA_BYTE DEFINE 0xFFFFE388
RCANC_MSG21_t_CAN_message_buffer_CONTROL1_WORD DEFINE 0xFFFFE390
RCANC_MSG21_t_CAN_message_buffer_CONTROL1_BIT_MBC DEFINE 0
RCANC_MSG21_t_CAN_message_buffer_CONTROL1_BIT_DART DEFINE 3
RCANC_MSG21_t_CAN_message_buffer_CONTROL1_BIT_ATX DEFINE 4
RCANC_MSG21_t_CAN_message_buffer_CONTROL1_BIT_NMC DEFINE 5
RCANC_MSG21_t_CAN_message_buffer_CONTROL1_BIT_DLC DEFINE 0
RCANC_MSG21_t_CAN_message_buffer_Timestamp DEFINE 0xFFFFE392
RCANC_MSG21_t_CAN_message_buffer_TTT DEFINE 0xFFFFE394
RCANC_MSG21_t_CAN_message_buffer_TTW_WORD DEFINE 0xFFFFE396
RCANC_MSG21_t_CAN_message_buffer_TTW_BIT_rep_factor DEFINE 0
RCANC_MSG21_t_CAN_message_buffer_TTW_BIT_Offset DEFINE 8
RCANC_MSG21_t_CAN_message_buffer_TTW_BIT_TTW DEFINE 14
RCANC_MSG21_t_CAN_message_buffer_wk DEFINE 0xFFFFE398
RCANC_MSG22_t_CAN_message_buffer_CONTROL0_LONG DEFINE 0xFFFFE3A0
RCANC_MSG22_t_CAN_message_buffer_CONTROL0_BIT_EXTID DEFINE 0
RCANC_MSG22_t_CAN_message_buffer_CONTROL0_BIT_STDID DEFINE 18
RCANC_MSG22_t_CAN_message_buffer_CONTROL0_BIT_RTR DEFINE 30
RCANC_MSG22_t_CAN_message_buffer_CONTROL0_BIT_IDE DEFINE 31
RCANC_MSG22_t_CAN_message_buffer_LAFM_LONG DEFINE 0xFFFFE3A4
RCANC_MSG22_t_CAN_message_buffer_LAFM_BIT_EXTID_LAFM DEFINE 0
RCANC_MSG22_t_CAN_message_buffer_LAFM_BIT_STDID_LAFM DEFINE 18
RCANC_MSG22_t_CAN_message_buffer_LAFM_BIT_IDE_LAFM DEFINE 31
RCANC_MSG22_t_CAN_message_buffer_DATA_LONG DEFINE 0xFFFFE3A8
RCANC_MSG22_t_CAN_message_buffer_DATA_WORD DEFINE 0xFFFFE3A8
RCANC_MSG22_t_CAN_message_buffer_DATA_BYTE DEFINE 0xFFFFE3A8
RCANC_MSG22_t_CAN_message_buffer_CONTROL1_WORD DEFINE 0xFFFFE3B0
RCANC_MSG22_t_CAN_message_buffer_CONTROL1_BIT_MBC DEFINE 0
RCANC_MSG22_t_CAN_message_buffer_CONTROL1_BIT_DART DEFINE 3
RCANC_MSG22_t_CAN_message_buffer_CONTROL1_BIT_ATX DEFINE 4
RCANC_MSG22_t_CAN_message_buffer_CONTROL1_BIT_NMC DEFINE 5
RCANC_MSG22_t_CAN_message_buffer_CONTROL1_BIT_DLC DEFINE 0
RCANC_MSG22_t_CAN_message_buffer_Timestamp DEFINE 0xFFFFE3B2
RCANC_MSG22_t_CAN_message_buffer_TTT DEFINE 0xFFFFE3B4
RCANC_MSG22_t_CAN_message_buffer_TTW_WORD DEFINE 0xFFFFE3B6
RCANC_MSG22_t_CAN_message_buffer_TTW_BIT_rep_factor DEFINE 0
RCANC_MSG22_t_CAN_message_buffer_TTW_BIT_Offset DEFINE 8
RCANC_MSG22_t_CAN_message_buffer_TTW_BIT_TTW DEFINE 14
RCANC_MSG22_t_CAN_message_buffer_wk DEFINE 0xFFFFE3B8
RCANC_MSG23_t_CAN_message_buffer_CONTROL0_LONG DEFINE 0xFFFFE3C0
RCANC_MSG23_t_CAN_message_buffer_CONTROL0_BIT_EXTID DEFINE 0
RCANC_MSG23_t_CAN_message_buffer_CONTROL0_BIT_STDID DEFINE 18
RCANC_MSG23_t_CAN_message_buffer_CONTROL0_BIT_RTR DEFINE 30
RCANC_MSG23_t_CAN_message_buffer_CONTROL0_BIT_IDE DEFINE 31
RCANC_MSG23_t_CAN_message_buffer_LAFM_LONG DEFINE 0xFFFFE3C4
RCANC_MSG23_t_CAN_message_buffer_LAFM_BIT_EXTID_LAFM DEFINE 0
RCANC_MSG23_t_CAN_message_buffer_LAFM_BIT_STDID_LAFM DEFINE 18
RCANC_MSG23_t_CAN_message_buffer_LAFM_BIT_IDE_LAFM DEFINE 31
RCANC_MSG23_t_CAN_message_buffer_DATA_LONG DEFINE 0xFFFFE3C8
RCANC_MSG23_t_CAN_message_buffer_DATA_WORD DEFINE 0xFFFFE3C8
RCANC_MSG23_t_CAN_message_buffer_DATA_BYTE DEFINE 0xFFFFE3C8
RCANC_MSG23_t_CAN_message_buffer_CONTROL1_WORD DEFINE 0xFFFFE3D0
RCANC_MSG23_t_CAN_message_buffer_CONTROL1_BIT_MBC DEFINE 0
RCANC_MSG23_t_CAN_message_buffer_CONTROL1_BIT_DART DEFINE 3
RCANC_MSG23_t_CAN_message_buffer_CONTROL1_BIT_ATX DEFINE 4
RCANC_MSG23_t_CAN_message_buffer_CONTROL1_BIT_NMC DEFINE 5
RCANC_MSG23_t_CAN_message_buffer_CONTROL1_BIT_DLC DEFINE 0
RCANC_MSG23_t_CAN_message_buffer_Timestamp DEFINE 0xFFFFE3D2
RCANC_MSG23_t_CAN_message_buffer_TTT DEFINE 0xFFFFE3D4
RCANC_MSG23_t_CAN_message_buffer_TTW_WORD DEFINE 0xFFFFE3D6
RCANC_MSG23_t_CAN_message_buffer_TTW_BIT_rep_factor DEFINE 0
RCANC_MSG23_t_CAN_message_buffer_TTW_BIT_Offset DEFINE 8
RCANC_MSG23_t_CAN_message_buffer_TTW_BIT_TTW DEFINE 14
RCANC_MSG23_t_CAN_message_buffer_wk DEFINE 0xFFFFE3D8
RCANC_MSG24_t_CAN_message_buffer_CONTROL0_LONG DEFINE 0xFFFFE3E0
RCANC_MSG24_t_CAN_message_buffer_CONTROL0_BIT_EXTID DEFINE 0
RCANC_MSG24_t_CAN_message_buffer_CONTROL0_BIT_STDID DEFINE 18
RCANC_MSG24_t_CAN_message_buffer_CONTROL0_BIT_RTR DEFINE 30
RCANC_MSG24_t_CAN_message_buffer_CONTROL0_BIT_IDE DEFINE 31
RCANC_MSG24_t_CAN_message_buffer_LAFM_LONG DEFINE 0xFFFFE3E4
RCANC_MSG24_t_CAN_message_buffer_LAFM_BIT_EXTID_LAFM DEFINE 0
RCANC_MSG24_t_CAN_message_buffer_LAFM_BIT_STDID_LAFM DEFINE 18
RCANC_MSG24_t_CAN_message_buffer_LAFM_BIT_IDE_LAFM DEFINE 31
RCANC_MSG24_t_CAN_message_buffer_DATA_LONG DEFINE 0xFFFFE3E8
RCANC_MSG24_t_CAN_message_buffer_DATA_WORD DEFINE 0xFFFFE3E8
RCANC_MSG24_t_CAN_message_buffer_DATA_BYTE DEFINE 0xFFFFE3E8
RCANC_MSG24_t_CAN_message_buffer_CONTROL1_WORD DEFINE 0xFFFFE3F0
RCANC_MSG24_t_CAN_message_buffer_CONTROL1_BIT_MBC DEFINE 0
RCANC_MSG24_t_CAN_message_buffer_CONTROL1_BIT_DART DEFINE 3
RCANC_MSG24_t_CAN_message_buffer_CONTROL1_BIT_ATX DEFINE 4
RCANC_MSG24_t_CAN_message_buffer_CONTROL1_BIT_NMC DEFINE 5
RCANC_MSG24_t_CAN_message_buffer_CONTROL1_BIT_DLC DEFINE 0
RCANC_MSG24_t_CAN_message_buffer_Timestamp DEFINE 0xFFFFE3F2
RCANC_MSG24_t_CAN_message_buffer_TTT DEFINE 0xFFFFE3F4
RCANC_MSG24_t_CAN_message_buffer_TTW_WORD DEFINE 0xFFFFE3F6
RCANC_MSG24_t_CAN_message_buffer_TTW_BIT_rep_factor DEFINE 0
RCANC_MSG24_t_CAN_message_buffer_TTW_BIT_Offset DEFINE 8
RCANC_MSG24_t_CAN_message_buffer_TTW_BIT_TTW DEFINE 14
RCANC_MSG24_t_CAN_message_buffer_wk DEFINE 0xFFFFE3F8
RCANC_MSG25_t_CAN_message_buffer_CONTROL0_LONG DEFINE 0xFFFFE400
RCANC_MSG25_t_CAN_message_buffer_CONTROL0_BIT_EXTID DEFINE 0
RCANC_MSG25_t_CAN_message_buffer_CONTROL0_BIT_STDID DEFINE 18
RCANC_MSG25_t_CAN_message_buffer_CONTROL0_BIT_RTR DEFINE 30
RCANC_MSG25_t_CAN_message_buffer_CONTROL0_BIT_IDE DEFINE 31
RCANC_MSG25_t_CAN_message_buffer_LAFM_LONG DEFINE 0xFFFFE404
RCANC_MSG25_t_CAN_message_buffer_LAFM_BIT_EXTID_LAFM DEFINE 0
RCANC_MSG25_t_CAN_message_buffer_LAFM_BIT_STDID_LAFM DEFINE 18
RCANC_MSG25_t_CAN_message_buffer_LAFM_BIT_IDE_LAFM DEFINE 31
RCANC_MSG25_t_CAN_message_buffer_DATA_LONG DEFINE 0xFFFFE408
RCANC_MSG25_t_CAN_message_buffer_DATA_WORD DEFINE 0xFFFFE408
RCANC_MSG25_t_CAN_message_buffer_DATA_BYTE DEFINE 0xFFFFE408
RCANC_MSG25_t_CAN_message_buffer_CONTROL1_WORD DEFINE 0xFFFFE410
RCANC_MSG25_t_CAN_message_buffer_CONTROL1_BIT_MBC DEFINE 0
RCANC_MSG25_t_CAN_message_buffer_CONTROL1_BIT_DART DEFINE 3
RCANC_MSG25_t_CAN_message_buffer_CONTROL1_BIT_ATX DEFINE 4
RCANC_MSG25_t_CAN_message_buffer_CONTROL1_BIT_NMC DEFINE 5
RCANC_MSG25_t_CAN_message_buffer_CONTROL1_BIT_DLC DEFINE 0
RCANC_MSG25_t_CAN_message_buffer_Timestamp DEFINE 0xFFFFE412
RCANC_MSG25_t_CAN_message_buffer_TTT DEFINE 0xFFFFE414
RCANC_MSG25_t_CAN_message_buffer_TTW_WORD DEFINE 0xFFFFE416
RCANC_MSG25_t_CAN_message_buffer_TTW_BIT_rep_factor DEFINE 0
RCANC_MSG25_t_CAN_message_buffer_TTW_BIT_Offset DEFINE 8
RCANC_MSG25_t_CAN_message_buffer_TTW_BIT_TTW DEFINE 14
RCANC_MSG25_t_CAN_message_buffer_wk DEFINE 0xFFFFE418
RCANC_MSG26_t_CAN_message_buffer_CONTROL0_LONG DEFINE 0xFFFFE420
RCANC_MSG26_t_CAN_message_buffer_CONTROL0_BIT_EXTID DEFINE 0
RCANC_MSG26_t_CAN_message_buffer_CONTROL0_BIT_STDID DEFINE 18
RCANC_MSG26_t_CAN_message_buffer_CONTROL0_BIT_RTR DEFINE 30
RCANC_MSG26_t_CAN_message_buffer_CONTROL0_BIT_IDE DEFINE 31
RCANC_MSG26_t_CAN_message_buffer_LAFM_LONG DEFINE 0xFFFFE424
RCANC_MSG26_t_CAN_message_buffer_LAFM_BIT_EXTID_LAFM DEFINE 0
RCANC_MSG26_t_CAN_message_buffer_LAFM_BIT_STDID_LAFM DEFINE 18
RCANC_MSG26_t_CAN_message_buffer_LAFM_BIT_IDE_LAFM DEFINE 31
RCANC_MSG26_t_CAN_message_buffer_DATA_LONG DEFINE 0xFFFFE428
RCANC_MSG26_t_CAN_message_buffer_DATA_WORD DEFINE 0xFFFFE428
RCANC_MSG26_t_CAN_message_buffer_DATA_BYTE DEFINE 0xFFFFE428
RCANC_MSG26_t_CAN_message_buffer_CONTROL1_WORD DEFINE 0xFFFFE430
RCANC_MSG26_t_CAN_message_buffer_CONTROL1_BIT_MBC DEFINE 0
RCANC_MSG26_t_CAN_message_buffer_CONTROL1_BIT_DART DEFINE 3
RCANC_MSG26_t_CAN_message_buffer_CONTROL1_BIT_ATX DEFINE 4
RCANC_MSG26_t_CAN_message_buffer_CONTROL1_BIT_NMC DEFINE 5
RCANC_MSG26_t_CAN_message_buffer_CONTROL1_BIT_DLC DEFINE 0
RCANC_MSG26_t_CAN_message_buffer_Timestamp DEFINE 0xFFFFE432
RCANC_MSG26_t_CAN_message_buffer_TTT DEFINE 0xFFFFE434
RCANC_MSG26_t_CAN_message_buffer_TTW_WORD DEFINE 0xFFFFE436
RCANC_MSG26_t_CAN_message_buffer_TTW_BIT_rep_factor DEFINE 0
RCANC_MSG26_t_CAN_message_buffer_TTW_BIT_Offset DEFINE 8
RCANC_MSG26_t_CAN_message_buffer_TTW_BIT_TTW DEFINE 14
RCANC_MSG26_t_CAN_message_buffer_wk DEFINE 0xFFFFE438
RCANC_MSG27_t_CAN_message_buffer_CONTROL0_LONG DEFINE 0xFFFFE440
RCANC_MSG27_t_CAN_message_buffer_CONTROL0_BIT_EXTID DEFINE 0
RCANC_MSG27_t_CAN_message_buffer_CONTROL0_BIT_STDID DEFINE 18
RCANC_MSG27_t_CAN_message_buffer_CONTROL0_BIT_RTR DEFINE 30
RCANC_MSG27_t_CAN_message_buffer_CONTROL0_BIT_IDE DEFINE 31
RCANC_MSG27_t_CAN_message_buffer_LAFM_LONG DEFINE 0xFFFFE444
RCANC_MSG27_t_CAN_message_buffer_LAFM_BIT_EXTID_LAFM DEFINE 0
RCANC_MSG27_t_CAN_message_buffer_LAFM_BIT_STDID_LAFM DEFINE 18
RCANC_MSG27_t_CAN_message_buffer_LAFM_BIT_IDE_LAFM DEFINE 31
RCANC_MSG27_t_CAN_message_buffer_DATA_LONG DEFINE 0xFFFFE448
RCANC_MSG27_t_CAN_message_buffer_DATA_WORD DEFINE 0xFFFFE448
RCANC_MSG27_t_CAN_message_buffer_DATA_BYTE DEFINE 0xFFFFE448
RCANC_MSG27_t_CAN_message_buffer_CONTROL1_WORD DEFINE 0xFFFFE450
RCANC_MSG27_t_CAN_message_buffer_CONTROL1_BIT_MBC DEFINE 0
RCANC_MSG27_t_CAN_message_buffer_CONTROL1_BIT_DART DEFINE 3
RCANC_MSG27_t_CAN_message_buffer_CONTROL1_BIT_ATX DEFINE 4
RCANC_MSG27_t_CAN_message_buffer_CONTROL1_BIT_NMC DEFINE 5
RCANC_MSG27_t_CAN_message_buffer_CONTROL1_BIT_DLC DEFINE 0
RCANC_MSG27_t_CAN_message_buffer_Timestamp DEFINE 0xFFFFE452
RCANC_MSG27_t_CAN_message_buffer_TTT DEFINE 0xFFFFE454
RCANC_MSG27_t_CAN_message_buffer_TTW_WORD DEFINE 0xFFFFE456
RCANC_MSG27_t_CAN_message_buffer_TTW_BIT_rep_factor DEFINE 0
RCANC_MSG27_t_CAN_message_buffer_TTW_BIT_Offset DEFINE 8
RCANC_MSG27_t_CAN_message_buffer_TTW_BIT_TTW DEFINE 14
RCANC_MSG27_t_CAN_message_buffer_wk DEFINE 0xFFFFE458
RCANC_MSG28_t_CAN_message_buffer_CONTROL0_LONG DEFINE 0xFFFFE460
RCANC_MSG28_t_CAN_message_buffer_CONTROL0_BIT_EXTID DEFINE 0
RCANC_MSG28_t_CAN_message_buffer_CONTROL0_BIT_STDID DEFINE 18
RCANC_MSG28_t_CAN_message_buffer_CONTROL0_BIT_RTR DEFINE 30
RCANC_MSG28_t_CAN_message_buffer_CONTROL0_BIT_IDE DEFINE 31
RCANC_MSG28_t_CAN_message_buffer_LAFM_LONG DEFINE 0xFFFFE464
RCANC_MSG28_t_CAN_message_buffer_LAFM_BIT_EXTID_LAFM DEFINE 0
RCANC_MSG28_t_CAN_message_buffer_LAFM_BIT_STDID_LAFM DEFINE 18
RCANC_MSG28_t_CAN_message_buffer_LAFM_BIT_IDE_LAFM DEFINE 31
RCANC_MSG28_t_CAN_message_buffer_DATA_LONG DEFINE 0xFFFFE468
RCANC_MSG28_t_CAN_message_buffer_DATA_WORD DEFINE 0xFFFFE468
RCANC_MSG28_t_CAN_message_buffer_DATA_BYTE DEFINE 0xFFFFE468
RCANC_MSG28_t_CAN_message_buffer_CONTROL1_WORD DEFINE 0xFFFFE470
RCANC_MSG28_t_CAN_message_buffer_CONTROL1_BIT_MBC DEFINE 0
RCANC_MSG28_t_CAN_message_buffer_CONTROL1_BIT_DART DEFINE 3
RCANC_MSG28_t_CAN_message_buffer_CONTROL1_BIT_ATX DEFINE 4
RCANC_MSG28_t_CAN_message_buffer_CONTROL1_BIT_NMC DEFINE 5
RCANC_MSG28_t_CAN_message_buffer_CONTROL1_BIT_DLC DEFINE 0
RCANC_MSG28_t_CAN_message_buffer_Timestamp DEFINE 0xFFFFE472
RCANC_MSG28_t_CAN_message_buffer_TTT DEFINE 0xFFFFE474
RCANC_MSG28_t_CAN_message_buffer_TTW_WORD DEFINE 0xFFFFE476
RCANC_MSG28_t_CAN_message_buffer_TTW_BIT_rep_factor DEFINE 0
RCANC_MSG28_t_CAN_message_buffer_TTW_BIT_Offset DEFINE 8
RCANC_MSG28_t_CAN_message_buffer_TTW_BIT_TTW DEFINE 14
RCANC_MSG28_t_CAN_message_buffer_wk DEFINE 0xFFFFE478
RCANC_MSG29_t_CAN_message_buffer_CONTROL0_LONG DEFINE 0xFFFFE480
RCANC_MSG29_t_CAN_message_buffer_CONTROL0_BIT_EXTID DEFINE 0
RCANC_MSG29_t_CAN_message_buffer_CONTROL0_BIT_STDID DEFINE 18
RCANC_MSG29_t_CAN_message_buffer_CONTROL0_BIT_RTR DEFINE 30
RCANC_MSG29_t_CAN_message_buffer_CONTROL0_BIT_IDE DEFINE 31
RCANC_MSG29_t_CAN_message_buffer_LAFM_LONG DEFINE 0xFFFFE484
RCANC_MSG29_t_CAN_message_buffer_LAFM_BIT_EXTID_LAFM DEFINE 0
RCANC_MSG29_t_CAN_message_buffer_LAFM_BIT_STDID_LAFM DEFINE 18
RCANC_MSG29_t_CAN_message_buffer_LAFM_BIT_IDE_LAFM DEFINE 31
RCANC_MSG29_t_CAN_message_buffer_DATA_LONG DEFINE 0xFFFFE488
RCANC_MSG29_t_CAN_message_buffer_DATA_WORD DEFINE 0xFFFFE488
RCANC_MSG29_t_CAN_message_buffer_DATA_BYTE DEFINE 0xFFFFE488
RCANC_MSG29_t_CAN_message_buffer_CONTROL1_WORD DEFINE 0xFFFFE490
RCANC_MSG29_t_CAN_message_buffer_CONTROL1_BIT_MBC DEFINE 0
RCANC_MSG29_t_CAN_message_buffer_CONTROL1_BIT_DART DEFINE 3
RCANC_MSG29_t_CAN_message_buffer_CONTROL1_BIT_ATX DEFINE 4
RCANC_MSG29_t_CAN_message_buffer_CONTROL1_BIT_NMC DEFINE 5
RCANC_MSG29_t_CAN_message_buffer_CONTROL1_BIT_DLC DEFINE 0
RCANC_MSG29_t_CAN_message_buffer_Timestamp DEFINE 0xFFFFE492
RCANC_MSG29_t_CAN_message_buffer_TTT DEFINE 0xFFFFE494
RCANC_MSG29_t_CAN_message_buffer_TTW_WORD DEFINE 0xFFFFE496
RCANC_MSG29_t_CAN_message_buffer_TTW_BIT_rep_factor DEFINE 0
RCANC_MSG29_t_CAN_message_buffer_TTW_BIT_Offset DEFINE 8
RCANC_MSG29_t_CAN_message_buffer_TTW_BIT_TTW DEFINE 14
RCANC_MSG29_t_CAN_message_buffer_wk DEFINE 0xFFFFE498
RCANC_MSG30_t_CAN_message_buffer_CONTROL0_LONG DEFINE 0xFFFFE4A0
RCANC_MSG30_t_CAN_message_buffer_CONTROL0_BIT_EXTID DEFINE 0
RCANC_MSG30_t_CAN_message_buffer_CONTROL0_BIT_STDID DEFINE 18
RCANC_MSG30_t_CAN_message_buffer_CONTROL0_BIT_RTR DEFINE 30
RCANC_MSG30_t_CAN_message_buffer_CONTROL0_BIT_IDE DEFINE 31
RCANC_MSG30_t_CAN_message_buffer_LAFM_LONG DEFINE 0xFFFFE4A4
RCANC_MSG30_t_CAN_message_buffer_LAFM_BIT_EXTID_LAFM DEFINE 0
RCANC_MSG30_t_CAN_message_buffer_LAFM_BIT_STDID_LAFM DEFINE 18
RCANC_MSG30_t_CAN_message_buffer_LAFM_BIT_IDE_LAFM DEFINE 31
RCANC_MSG30_t_CAN_message_buffer_DATA_LONG DEFINE 0xFFFFE4A8
RCANC_MSG30_t_CAN_message_buffer_DATA_WORD DEFINE 0xFFFFE4A8
RCANC_MSG30_t_CAN_message_buffer_DATA_BYTE DEFINE 0xFFFFE4A8
RCANC_MSG30_t_CAN_message_buffer_CONTROL1_WORD DEFINE 0xFFFFE4B0
RCANC_MSG30_t_CAN_message_buffer_CONTROL1_BIT_MBC DEFINE 0
RCANC_MSG30_t_CAN_message_buffer_CONTROL1_BIT_DART DEFINE 3
RCANC_MSG30_t_CAN_message_buffer_CONTROL1_BIT_ATX DEFINE 4
RCANC_MSG30_t_CAN_message_buffer_CONTROL1_BIT_NMC DEFINE 5
RCANC_MSG30_t_CAN_message_buffer_CONTROL1_BIT_DLC DEFINE 0
RCANC_MSG30_t_CAN_message_buffer_Timestamp DEFINE 0xFFFFE4B2
RCANC_MSG30_t_CAN_message_buffer_TTT DEFINE 0xFFFFE4B4
RCANC_MSG30_t_CAN_message_buffer_TTW_WORD DEFINE 0xFFFFE4B6
RCANC_MSG30_t_CAN_message_buffer_TTW_BIT_rep_factor DEFINE 0
RCANC_MSG30_t_CAN_message_buffer_TTW_BIT_Offset DEFINE 8
RCANC_MSG30_t_CAN_message_buffer_TTW_BIT_TTW DEFINE 14
RCANC_MSG30_t_CAN_message_buffer_wk DEFINE 0xFFFFE4B8
RCANC_MSG31_t_CAN_message_buffer_CONTROL0_LONG DEFINE 0xFFFFE4C0
RCANC_MSG31_t_CAN_message_buffer_CONTROL0_BIT_EXTID DEFINE 0
RCANC_MSG31_t_CAN_message_buffer_CONTROL0_BIT_STDID DEFINE 18
RCANC_MSG31_t_CAN_message_buffer_CONTROL0_BIT_RTR DEFINE 30
RCANC_MSG31_t_CAN_message_buffer_CONTROL0_BIT_IDE DEFINE 31
RCANC_MSG31_t_CAN_message_buffer_LAFM_LONG DEFINE 0xFFFFE4C4
RCANC_MSG31_t_CAN_message_buffer_LAFM_BIT_EXTID_LAFM DEFINE 0
RCANC_MSG31_t_CAN_message_buffer_LAFM_BIT_STDID_LAFM DEFINE 18
RCANC_MSG31_t_CAN_message_buffer_LAFM_BIT_IDE_LAFM DEFINE 31
RCANC_MSG31_t_CAN_message_buffer_DATA_LONG DEFINE 0xFFFFE4C8
RCANC_MSG31_t_CAN_message_buffer_DATA_WORD DEFINE 0xFFFFE4C8
RCANC_MSG31_t_CAN_message_buffer_DATA_BYTE DEFINE 0xFFFFE4C8
RCANC_MSG31_t_CAN_message_buffer_CONTROL1_WORD DEFINE 0xFFFFE4D0
RCANC_MSG31_t_CAN_message_buffer_CONTROL1_BIT_MBC DEFINE 0
RCANC_MSG31_t_CAN_message_buffer_CONTROL1_BIT_DART DEFINE 3
RCANC_MSG31_t_CAN_message_buffer_CONTROL1_BIT_ATX DEFINE 4
RCANC_MSG31_t_CAN_message_buffer_CONTROL1_BIT_NMC DEFINE 5
RCANC_MSG31_t_CAN_message_buffer_CONTROL1_BIT_DLC DEFINE 0
RCANC_MSG31_t_CAN_message_buffer_Timestamp DEFINE 0xFFFFE4D2
RCANC_MSG31_t_CAN_message_buffer_TTT DEFINE 0xFFFFE4D4
RCANC_MSG31_t_CAN_message_buffer_TTW_WORD DEFINE 0xFFFFE4D6
RCANC_MSG31_t_CAN_message_buffer_TTW_BIT_rep_factor DEFINE 0
RCANC_MSG31_t_CAN_message_buffer_TTW_BIT_Offset DEFINE 8
RCANC_MSG31_t_CAN_message_buffer_TTW_BIT_TTW DEFINE 14
RCANC_MSG31_t_CAN_message_buffer_wk DEFINE 0xFFFFE4D8
RCANC_MSG32_t_CAN_message_buffer_CONTROL0_LONG DEFINE 0xFFFFE4E0
RCANC_MSG32_t_CAN_message_buffer_CONTROL0_BIT_EXTID DEFINE 0
RCANC_MSG32_t_CAN_message_buffer_CONTROL0_BIT_STDID DEFINE 18
RCANC_MSG32_t_CAN_message_buffer_CONTROL0_BIT_RTR DEFINE 30
RCANC_MSG32_t_CAN_message_buffer_CONTROL0_BIT_IDE DEFINE 31
RCANC_MSG32_t_CAN_message_buffer_LAFM_LONG DEFINE 0xFFFFE4E4
RCANC_MSG32_t_CAN_message_buffer_LAFM_BIT_EXTID_LAFM DEFINE 0
RCANC_MSG32_t_CAN_message_buffer_LAFM_BIT_STDID_LAFM DEFINE 18
RCANC_MSG32_t_CAN_message_buffer_LAFM_BIT_IDE_LAFM DEFINE 31
RCANC_MSG32_t_CAN_message_buffer_DATA_LONG DEFINE 0xFFFFE4E8
RCANC_MSG32_t_CAN_message_buffer_DATA_WORD DEFINE 0xFFFFE4E8
RCANC_MSG32_t_CAN_message_buffer_DATA_BYTE DEFINE 0xFFFFE4E8
RCANC_MSG32_t_CAN_message_buffer_CONTROL1_WORD DEFINE 0xFFFFE4F0
RCANC_MSG32_t_CAN_message_buffer_CONTROL1_BIT_MBC DEFINE 0
RCANC_MSG32_t_CAN_message_buffer_CONTROL1_BIT_DART DEFINE 3
RCANC_MSG32_t_CAN_message_buffer_CONTROL1_BIT_ATX DEFINE 4
RCANC_MSG32_t_CAN_message_buffer_CONTROL1_BIT_NMC DEFINE 5
RCANC_MSG32_t_CAN_message_buffer_CONTROL1_BIT_DLC DEFINE 0
RCANC_MSG32_t_CAN_message_buffer_Timestamp DEFINE 0xFFFFE4F2
RCANC_MSG32_t_CAN_message_buffer_TTT DEFINE 0xFFFFE4F4
RCANC_MSG32_t_CAN_message_buffer_TTW_WORD DEFINE 0xFFFFE4F6
RCANC_MSG32_t_CAN_message_buffer_TTW_BIT_rep_factor DEFINE 0
RCANC_MSG32_t_CAN_message_buffer_TTW_BIT_Offset DEFINE 8
RCANC_MSG32_t_CAN_message_buffer_TTW_BIT_TTW DEFINE 14
RCANC_MSG32_t_CAN_message_buffer_wk DEFINE 0xFFFFE4F8
RCANC_wk18 DEFINE 0xFFFFE500
RCANC_MBESR_WORD DEFINE 0xFFFFE600
RCANC_MBESR_BIT_MBEF DEFINE 0
RCANC_MBECR_WORD DEFINE 0xFFFFE602
RCANC_MBECR_BIT_MBIM DEFINE 0

/* ADC Converter A                              */
ADCA_ADCSR_BYTE DEFINE 0xFFFFE800
ADCA_ADCSR_BIT_EXTRG DEFINE 0
ADCA_ADCSR_BIT_TRGE DEFINE 1
ADCA_ADCSR_BIT_ADIE DEFINE 4
ADCA_ADCSR_BIT_ADCS DEFINE 6
ADCA_ADCSR_BIT_ADST DEFINE 7
ADCA_wk1 DEFINE 0xFFFFE801
ADCA_ADREF_BYTE DEFINE 0xFFFFE802
ADCA_ADREF_BIT_ADF DEFINE 0
ADCA_ADREF_BIT_ADITACT DEFINE 6
ADCA_ADREF_BIT_ADSCACT DEFINE 7
ADCA_wk2 DEFINE 0xFFFFE803
ADCA_ADTRE_WORD DEFINE 0xFFFFE804
ADCA_ADTRE_BIT_ADTRGE0 DEFINE 0
ADCA_ADTRE_BIT_ADTRGE1 DEFINE 1
ADCA_ADTRE_BIT_ADTRGE2 DEFINE 2
ADCA_ADTRE_BIT_ADTRGE3 DEFINE 3
ADCA_ADTRE_BIT_ADTRGE4 DEFINE 4
ADCA_ADTRE_BIT_ADTRGE5 DEFINE 5
ADCA_ADTRE_BIT_ADTRGE6 DEFINE 6
ADCA_ADTRE_BIT_ADTRGE7 DEFINE 7
ADCA_ADTRE_BIT_ADTRGE8 DEFINE 8
ADCA_ADTRE_BIT_ADTRGE9 DEFINE 9
ADCA_ADTRE_BIT_ADTRGE10 DEFINE 10
ADCA_ADTRE_BIT_ADTRGE11 DEFINE 11
ADCA_ADTRE_BIT_ADTRGE12 DEFINE 12
ADCA_ADTRE_BIT_ADTRGE13 DEFINE 13
ADCA_ADTRE_BIT_ADTRGE14 DEFINE 14
ADCA_ADTRE_BIT_ADTRGE15 DEFINE 15
ADCA_ADTRF_WORD DEFINE 0xFFFFE806
ADCA_ADTRF_BIT_ADTF0 DEFINE 0
ADCA_ADTRF_BIT_ADTF1 DEFINE 1
ADCA_ADTRF_BIT_ADTF2 DEFINE 2
ADCA_ADTRF_BIT_ADTF3 DEFINE 3
ADCA_ADTRF_BIT_ADTF4 DEFINE 4
ADCA_ADTRF_BIT_ADTF5 DEFINE 5
ADCA_ADTRF_BIT_ADTF6 DEFINE 6
ADCA_ADTRF_BIT_ADTF7 DEFINE 7
ADCA_ADTRF_BIT_ADTF8 DEFINE 8
ADCA_ADTRF_BIT_ADTF9 DEFINE 9
ADCA_ADTRF_BIT_ADTF10 DEFINE 10
ADCA_ADTRF_BIT_ADTF11 DEFINE 11
ADCA_ADTRF_BIT_ADTF12 DEFINE 12
ADCA_ADTRF_BIT_ADTF13 DEFINE 13
ADCA_ADTRF_BIT_ADTF14 DEFINE 14
ADCA_ADTRF_BIT_ADTF15 DEFINE 15
ADCA_ADTRS_WORD DEFINE 0xFFFFE808
ADCA_ADTRS_BIT_ADTRS0 DEFINE 0
ADCA_ADTRS_BIT_ADTRS1 DEFINE 1
ADCA_ADTRS_BIT_ADTRS2 DEFINE 2
ADCA_ADTRS_BIT_ADTRS3 DEFINE 3
ADCA_ADTRS_BIT_ADTRS4 DEFINE 4
ADCA_ADTRS_BIT_ADTRS5 DEFINE 5
ADCA_ADTRS_BIT_ADTRS6 DEFINE 6
ADCA_ADTRS_BIT_ADTRS7 DEFINE 7
ADCA_ADTRS_BIT_ADTRS8 DEFINE 8
ADCA_ADTRS_BIT_ADTRS9 DEFINE 9
ADCA_ADTRS_BIT_ADTRS10 DEFINE 10
ADCA_ADTRS_BIT_ADTRS11 DEFINE 11
ADCA_ADTRS_BIT_ADTRS12 DEFINE 12
ADCA_ADTRS_BIT_ADTRS13 DEFINE 13
ADCA_ADTRS_BIT_ADTRS14 DEFINE 14
ADCA_ADTRS_BIT_ADTRS15 DEFINE 15
ADCA_ADSTRG_WORD DEFINE 0xFFFFE80A
ADCA_ADSTRG_BIT_ADSTRG0 DEFINE 0
ADCA_ADSTRG_BIT_ADSTRG1 DEFINE 1
ADCA_ADSTRG_BIT_ADSTRG2 DEFINE 2
ADCA_ADSTRG_BIT_ADSTRG3 DEFINE 3
ADCA_ADSTRG_BIT_ADSTRG4 DEFINE 4
ADCA_ADSTRG_BIT_ADSTRG5 DEFINE 5
ADCA_ADSTRG_BIT_ADSTRG6 DEFINE 6
ADCA_ADSTRG_BIT_ADSTRG7 DEFINE 7
ADCA_ADSTRG_BIT_ADSTRG8 DEFINE 8
ADCA_ADSTRG_BIT_ADSTRG9 DEFINE 9
ADCA_ADSTRG_BIT_ADSTRG10 DEFINE 10
ADCA_ADSTRG_BIT_ADSTRG11 DEFINE 11
ADCA_ADSTRG_BIT_ADSTRG12 DEFINE 12
ADCA_ADSTRG_BIT_ADSTRG13 DEFINE 13
ADCA_ADSTRG_BIT_ADSTRG14 DEFINE 14
ADCA_ADSTRG_BIT_ADSTRG15 DEFINE 15
ADCA_ADTRD_WORD DEFINE 0xFFFFE80C
ADCA_ADTRD_BIT_ADIDE0 DEFINE 0
ADCA_ADTRD_BIT_ADIDE1 DEFINE 1
ADCA_ADTRD_BIT_ADIDE2 DEFINE 2
ADCA_ADTRD_BIT_ADIDE3 DEFINE 3
ADCA_ADTRD_BIT_ADIDE4 DEFINE 4
ADCA_ADTRD_BIT_ADIDE5 DEFINE 5
ADCA_ADTRD_BIT_ADIDE6 DEFINE 6
ADCA_ADTRD_BIT_ADIDE7 DEFINE 7
ADCA_ADTRD_BIT_ADIDE8 DEFINE 8
ADCA_ADTRD_BIT_ADIDE9 DEFINE 9
ADCA_ADTRD_BIT_ADIDE10 DEFINE 10
ADCA_ADTRD_BIT_ADIDE11 DEFINE 11
ADCA_ADTRD_BIT_ADIDE12 DEFINE 12
ADCA_ADTRD_BIT_ADIDE13 DEFINE 13
ADCA_ADTRD_BIT_ADIDE14 DEFINE 14
ADCA_ADTRD_BIT_ADIDE15 DEFINE 15
ADCA_wk3 DEFINE 0xFFFFE80E
ADCA_ADADS_BYTE DEFINE 0xFFFFE81C
ADCA_ADADS_BIT_ADS0 DEFINE 0
ADCA_ADADS_BIT_ADS1 DEFINE 1
ADCA_ADADS_BIT_ADS2 DEFINE 2
ADCA_ADADS_BIT_ADS3 DEFINE 3
ADCA_ADADS_BIT_ADS4 DEFINE 4
ADCA_ADADS_BIT_ADS5 DEFINE 5
ADCA_ADADS_BIT_ADS6 DEFINE 6
ADCA_ADADS_BIT_ADS7 DEFINE 7
ADCA_wk4 DEFINE 0xFFFFE81D
ADCA_ADADC_BYTE DEFINE 0xFFFFE81E
ADCA_ADADC_BIT_ADC DEFINE 0
ADCA_wk5 DEFINE 0xFFFFE81F
ADCA_ADANS0_WORD DEFINE 0xFFFFE820
ADCA_ADANS0_BIT_ANS0 DEFINE 0
ADCA_ADANS0_BIT_ANS1 DEFINE 1
ADCA_ADANS0_BIT_ANS2 DEFINE 2
ADCA_ADANS0_BIT_ANS3 DEFINE 3
ADCA_ADANS0_BIT_ANS4 DEFINE 4
ADCA_ADANS0_BIT_ANS5 DEFINE 5
ADCA_ADANS0_BIT_ANS6 DEFINE 6
ADCA_ADANS0_BIT_ANS7 DEFINE 7
ADCA_ADANS0_BIT_ANS8 DEFINE 8
ADCA_ADANS0_BIT_ANS9 DEFINE 9
ADCA_ADANS0_BIT_ANS10 DEFINE 10
ADCA_ADANS0_BIT_ANS11 DEFINE 11
ADCA_ADANS0_BIT_ANS12 DEFINE 12
ADCA_ADANS0_BIT_ANS13 DEFINE 13
ADCA_ADANS0_BIT_ANS14 DEFINE 14
ADCA_ADANS0_BIT_ANS15 DEFINE 15
ADCA_ADANS1_WORD DEFINE 0xFFFFE822
ADCA_ADANS1_BIT_ANS16 DEFINE 0
ADCA_ADANS1_BIT_ANS17 DEFINE 1
ADCA_ADANS1_BIT_ANS18 DEFINE 2
ADCA_ADANS1_BIT_ANS19 DEFINE 3
ADCA_ADANS1_BIT_ANS20 DEFINE 4
ADCA_ADANS1_BIT_ANS21 DEFINE 5
ADCA_ADANS1_BIT_ANS22 DEFINE 6
ADCA_ADANS1_BIT_ANS23 DEFINE 7
ADCA_ADANS1_BIT_ANS24 DEFINE 8
ADCA_ADANS1_BIT_ANS25 DEFINE 9
ADCA_ADANS1_BIT_ANS26 DEFINE 10
ADCA_ADANS1_BIT_ANS27 DEFINE 11
ADCA_wk7 DEFINE 0xFFFFE824
ADCA_ADCER_WORD DEFINE 0xFFFFE830
ADCA_ADCER_BIT_ITTRGS DEFINE 0
ADCA_ADCER_BIT_CKS DEFINE 7
ADCA_ADCER_BIT_DIAGVAL DEFINE 8
ADCA_ADCER_BIT_DIAGLD DEFINE 10
ADCA_ADCER_BIT_DIAGM DEFINE 11
ADCA_ADCER_BIT_ADRFMT DEFINE 15
ADCA_wk8 DEFINE 0xFFFFE832
ADCA_ADRD DEFINE 0xFFFFE83E
ADCA_ADR0 DEFINE 0xFFFFE840
ADCA_ADR1 DEFINE 0xFFFFE842
ADCA_ADR2 DEFINE 0xFFFFE844
ADCA_ADR3 DEFINE 0xFFFFE846
ADCA_ADR4 DEFINE 0xFFFFE848
ADCA_ADR5 DEFINE 0xFFFFE84A
ADCA_ADR6 DEFINE 0xFFFFE84C
ADCA_ADR7 DEFINE 0xFFFFE84E
ADCA_ADR8 DEFINE 0xFFFFE850
ADCA_ADR9 DEFINE 0xFFFFE852
ADCA_ADR10 DEFINE 0xFFFFE854
ADCA_ADR11 DEFINE 0xFFFFE856
ADCA_ADR12 DEFINE 0xFFFFE858
ADCA_ADR13 DEFINE 0xFFFFE85A
ADCA_ADR14 DEFINE 0xFFFFE85C
ADCA_ADR15 DEFINE 0xFFFFE85E
ADCA_ADR16 DEFINE 0xFFFFE860
ADCA_ADR17 DEFINE 0xFFFFE862
ADCA_ADR18 DEFINE 0xFFFFE864
ADCA_ADR19 DEFINE 0xFFFFE866
ADCA_ADR20 DEFINE 0xFFFFE868
ADCA_ADR21 DEFINE 0xFFFFE86A
ADCA_ADR22 DEFINE 0xFFFFE86C
ADCA_ADR23 DEFINE 0xFFFFE86E
ADCA_ADR24 DEFINE 0xFFFFE870
ADCA_ADR25 DEFINE 0xFFFFE872
ADCA_ADR26 DEFINE 0xFFFFE874
ADCA_ADR27 DEFINE 0xFFFFE876

/* ADC Converter B                              */
ADCB_ADCSR_BYTE DEFINE 0xFFFFEC00
ADCB_ADCSR_BIT_EXTRG DEFINE 0
ADCB_ADCSR_BIT_TRGE DEFINE 1
ADCB_ADCSR_BIT_ADIE DEFINE 4
ADCB_ADCSR_BIT_ADCS DEFINE 6
ADCB_ADCSR_BIT_ADST DEFINE 7
ADCB_wk1 DEFINE 0xFFFFEC01
ADCB_ADREF_BYTE DEFINE 0xFFFFEC02
ADCB_ADREF_BIT_ADF DEFINE 0
ADCB_ADREF_BIT_ADITACT DEFINE 6
ADCB_ADREF_BIT_ADSCACT DEFINE 7
ADCB_wk2 DEFINE 0xFFFFEC03
ADCB_ADTRE_BYTE DEFINE 0xFFFFEC10
ADCB_ADTRE_BIT_ADTRGE40 DEFINE 0
ADCB_ADTRE_BIT_ADTRGE41 DEFINE 1
ADCB_ADTRE_BIT_ADTRGE42 DEFINE 2
ADCB_ADTRE_BIT_ADTRGE43 DEFINE 3
ADCB_ADTRE_BIT_ADTRGE44 DEFINE 4
ADCB_ADTRE_BIT_ADTRGE45 DEFINE 5
ADCB_ADTRE_BIT_ADTRGE46 DEFINE 6
ADCB_ADTRE_BIT_ADTRGE47 DEFINE 7
ADCB_wk3 DEFINE 0xFFFFEC11
ADCB_ADTRF_BYTE DEFINE 0xFFFFEC12
ADCB_ADTRF_BIT_ADTF40 DEFINE 0
ADCB_ADTRF_BIT_ADTF41 DEFINE 1
ADCB_ADTRF_BIT_ADTF42 DEFINE 2
ADCB_ADTRF_BIT_ADTF43 DEFINE 3
ADCB_ADTRF_BIT_ADTF44 DEFINE 4
ADCB_ADTRF_BIT_ADTF45 DEFINE 5
ADCB_ADTRF_BIT_ADTF46 DEFINE 6
ADCB_ADTRF_BIT_ADTF47 DEFINE 7
ADCB_wk4 DEFINE 0xFFFFEC13
ADCB_ADTRS_BYTE DEFINE 0xFFFFEC14
ADCB_ADTRS_BIT_ADTRS40 DEFINE 0
ADCB_ADTRS_BIT_ADTRS41 DEFINE 1
ADCB_ADTRS_BIT_ADTRS42 DEFINE 2
ADCB_ADTRS_BIT_ADTRS43 DEFINE 3
ADCB_ADTRS_BIT_ADTRS44 DEFINE 4
ADCB_ADTRS_BIT_ADTRS45 DEFINE 5
ADCB_ADTRS_BIT_ADTRS46 DEFINE 6
ADCB_ADTRS_BIT_ADTRS47 DEFINE 7
ADCB_wk5 DEFINE 0xFFFFEC15
ADCB_ADSTRG_BYTE DEFINE 0xFFFFEC16
ADCB_ADSTRG_BIT_ADSTRG40 DEFINE 0
ADCB_ADSTRG_BIT_ADSTRG41 DEFINE 1
ADCB_ADSTRG_BIT_ADSTRG42 DEFINE 2
ADCB_ADSTRG_BIT_ADSTRG43 DEFINE 3
ADCB_ADSTRG_BIT_ADSTRG44 DEFINE 4
ADCB_ADSTRG_BIT_ADSTRG45 DEFINE 5
ADCB_ADSTRG_BIT_ADSTRG46 DEFINE 6
ADCB_ADSTRG_BIT_ADSTRG47 DEFINE 7
ADCB_wk6 DEFINE 0xFFFFEC17
ADCB_ADTRD_BYTE DEFINE 0xFFFFEC18
ADCB_ADTRD_BIT_ADIDE40 DEFINE 0
ADCB_ADTRD_BIT_ADIDE41 DEFINE 1
ADCB_ADTRD_BIT_ADIDE42 DEFINE 2
ADCB_ADTRD_BIT_ADIDE43 DEFINE 3
ADCB_ADTRD_BIT_ADIDE44 DEFINE 4
ADCB_ADTRD_BIT_ADIDE45 DEFINE 5
ADCB_ADTRD_BIT_ADIDE46 DEFINE 6
ADCB_ADTRD_BIT_ADIDE47 DEFINE 7
ADCB_wk7 DEFINE 0xFFFFEC19
ADCB_ADADS_BYTE DEFINE 0xFFFFEC1C
ADCB_ADADS_BIT_ADS40 DEFINE 0
ADCB_ADADS_BIT_ADS41 DEFINE 1
ADCB_ADADS_BIT_ADS42 DEFINE 2
ADCB_ADADS_BIT_ADS43 DEFINE 3
ADCB_ADADS_BIT_ADS44 DEFINE 4
ADCB_ADADS_BIT_ADS45 DEFINE 5
ADCB_ADADS_BIT_ADS46 DEFINE 6
ADCB_ADADS_BIT_ADS47 DEFINE 7
ADCB_wk8 DEFINE 0xFFFFEC1D
ADCB_ADADC_BYTE DEFINE 0xFFFFEC1E
ADCB_ADADC_BIT_ADC DEFINE 0
ADCB_wk9 DEFINE 0xFFFFEC1F
ADCB_ADANS3_WORD DEFINE 0xFFFFEC20
ADCB_ADANS3_BIT_ANS40 DEFINE 0
ADCB_ADANS3_BIT_ANS41 DEFINE 1
ADCB_ADANS3_BIT_ANS42 DEFINE 2
ADCB_ADANS3_BIT_ANS43 DEFINE 3
ADCB_ADANS3_BIT_ANS44 DEFINE 4
ADCB_ADANS3_BIT_ANS45 DEFINE 5
ADCB_ADANS3_BIT_ANS46 DEFINE 6
ADCB_ADANS3_BIT_ANS47 DEFINE 7
ADCB_ADANS3_BIT_ANS48 DEFINE 8
ADCB_wk10 DEFINE 0xFFFFEC22
ADCB_ADCER_WORD DEFINE 0xFFFFEC30
ADCB_ADCER_BIT_CKS DEFINE 7
ADCB_ADCER_BIT_DIAGVAL DEFINE 8
ADCB_ADCER_BIT_DIAGLD DEFINE 10
ADCB_ADCER_BIT_DIAGM DEFINE 11
ADCB_ADCER_BIT_ADRFMT DEFINE 15
ADCB_wk11 DEFINE 0xFFFFEC32
ADCB_ADRD DEFINE 0xFFFFEC3E
ADCB_ADR40 DEFINE 0xFFFFEC40
ADCB_ADR41 DEFINE 0xFFFFEC42
ADCB_ADR42 DEFINE 0xFFFFEC44
ADCB_ADR43 DEFINE 0xFFFFEC46
ADCB_ADR44 DEFINE 0xFFFFEC48
ADCB_ADR45 DEFINE 0xFFFFEC4A
ADCB_ADR46 DEFINE 0xFFFFEC4C
ADCB_ADR47 DEFINE 0xFFFFEC4E
ADCB_ADR48 DEFINE 0xFFFFEC50

/* Advanced User Debugger II                    */
AUD_AUCSR_WORD DEFINE 0xFFFC0C00
AUD_AUCSR_BIT_BR DEFINE 0
AUD_AUCSR_BIT_OC DEFINE 2
AUD_AUCSR_BIT_BW DEFINE 4
AUD_AUCSR_BIT_CLK DEFINE 6
AUD_AUCSR_BIT_EN DEFINE 0
AUD_AUCSR_BIT_TM DEFINE 2
AUD_AUCSR_BIT_WB DEFINE 4
AUD_AUCSR_BIT_WA DEFINE 6
AUD_wk1 DEFINE 0xFFFC0C02
AUD_AUWASR DEFINE 0xFFFC0C04
AUD_AUWAER DEFINE 0xFFFC0C08
AUD_AUWBSR DEFINE 0xFFFC0C0C
AUD_AUWBER DEFINE 0xFFFC0C10
AUD_AUECSR_WORD DEFINE 0xFFFC0C14
AUD_AUECSR_BIT_TRSB DEFINE 0
AUD_AUECSR_BIT_TREX DEFINE 1
AUD_AUECSR_BIT_WB0B DEFINE 2
AUD_AUECSR_BIT_WA0B DEFINE 5
AUD_AUECSR_BIT_TRGN DEFINE 7

/* PORT A (PORT and PFC Structures).            */
PORTA_wk1 DEFINE 0xFFFE3800
PORTA_DR_t_PORT_DR_WORD DEFINE 0xFFFE3802
PORTA_DR_t_PORT_DR_BIT_DR8 DEFINE 0
PORTA_DR_t_PORT_DR_BIT_DR9 DEFINE 1
PORTA_DR_t_PORT_DR_BIT_DR10 DEFINE 2
PORTA_DR_t_PORT_DR_BIT_DR11 DEFINE 3
PORTA_DR_t_PORT_DR_BIT_DR12 DEFINE 4
PORTA_DR_t_PORT_DR_BIT_DR13 DEFINE 5
PORTA_DR_t_PORT_DR_BIT_DR14 DEFINE 6
PORTA_DR_t_PORT_DR_BIT_DR15 DEFINE 7
PORTA_DR_t_PORT_DR_BIT_DR0 DEFINE 0
PORTA_DR_t_PORT_DR_BIT_DR1 DEFINE 1
PORTA_DR_t_PORT_DR_BIT_DR2 DEFINE 2
PORTA_DR_t_PORT_DR_BIT_DR3 DEFINE 3
PORTA_DR_t_PORT_DR_BIT_DR4 DEFINE 4
PORTA_DR_t_PORT_DR_BIT_DR5 DEFINE 5
PORTA_DR_t_PORT_DR_BIT_DR6 DEFINE 6
PORTA_DR_t_PORT_DR_BIT_DR7 DEFINE 7
PORTA_wk2 DEFINE 0xFFFE3804
PORTA_IOR_t_PORT_IOR_WORD DEFINE 0xFFFE3806
PORTA_IOR_t_PORT_IOR_BIT_IOR8 DEFINE 0
PORTA_IOR_t_PORT_IOR_BIT_IOR9 DEFINE 1
PORTA_IOR_t_PORT_IOR_BIT_IOR10 DEFINE 2
PORTA_IOR_t_PORT_IOR_BIT_IOR11 DEFINE 3
PORTA_IOR_t_PORT_IOR_BIT_IOR12 DEFINE 4
PORTA_IOR_t_PORT_IOR_BIT_IOR13 DEFINE 5
PORTA_IOR_t_PORT_IOR_BIT_IOR14 DEFINE 6
PORTA_IOR_t_PORT_IOR_BIT_IOR15 DEFINE 7
PORTA_IOR_t_PORT_IOR_BIT_IOR0 DEFINE 0
PORTA_IOR_t_PORT_IOR_BIT_IOR1 DEFINE 1
PORTA_IOR_t_PORT_IOR_BIT_IOR2 DEFINE 2
PORTA_IOR_t_PORT_IOR_BIT_IOR3 DEFINE 3
PORTA_IOR_t_PORT_IOR_BIT_IOR4 DEFINE 4
PORTA_IOR_t_PORT_IOR_BIT_IOR5 DEFINE 5
PORTA_IOR_t_PORT_IOR_BIT_IOR6 DEFINE 6
PORTA_IOR_t_PORT_IOR_BIT_IOR7 DEFINE 7
PORTA_wk3 DEFINE 0xFFFE3808
PORTA_CR4_WORD DEFINE 0xFFFE3810
PORTA_CR4_BIT_MD14 DEFINE 0
PORTA_CR4_BIT_MD15 DEFINE 4
PORTA_CR4_BIT_MD12 DEFINE 0
PORTA_CR4_BIT_MD13 DEFINE 4
PORTA_CR3_WORD DEFINE 0xFFFE3812
PORTA_CR3_BIT_MD10 DEFINE 0
PORTA_CR3_BIT_MD11 DEFINE 4
PORTA_CR3_BIT_MD8 DEFINE 0
PORTA_CR3_BIT_MD9 DEFINE 4
PORTA_CR2_WORD DEFINE 0xFFFE3814
PORTA_CR2_BIT_MD6 DEFINE 0
PORTA_CR2_BIT_MD7 DEFINE 4
PORTA_CR2_BIT_MD4 DEFINE 0
PORTA_CR2_BIT_MD5 DEFINE 4
PORTA_CR1_WORD DEFINE 0xFFFE3816
PORTA_CR1_BIT_MD2 DEFINE 0
PORTA_CR1_BIT_MD3 DEFINE 4
PORTA_CR1_BIT_MD0 DEFINE 0
PORTA_CR1_BIT_MD1 DEFINE 4
PORTA_wk4 DEFINE 0xFFFE3818
PORTA_PR_t_PORT_PR_WORD DEFINE 0xFFFE381E
PORTA_PR_t_PORT_PR_BIT_PR8 DEFINE 0
PORTA_PR_t_PORT_PR_BIT_PR9 DEFINE 1
PORTA_PR_t_PORT_PR_BIT_PR10 DEFINE 2
PORTA_PR_t_PORT_PR_BIT_PR11 DEFINE 3
PORTA_PR_t_PORT_PR_BIT_PR12 DEFINE 4
PORTA_PR_t_PORT_PR_BIT_PR13 DEFINE 5
PORTA_PR_t_PORT_PR_BIT_PR14 DEFINE 6
PORTA_PR_t_PORT_PR_BIT_PR15 DEFINE 7
PORTA_PR_t_PORT_PR_BIT_PR0 DEFINE 0
PORTA_PR_t_PORT_PR_BIT_PR1 DEFINE 1
PORTA_PR_t_PORT_PR_BIT_PR2 DEFINE 2
PORTA_PR_t_PORT_PR_BIT_PR3 DEFINE 3
PORTA_PR_t_PORT_PR_BIT_PR4 DEFINE 4
PORTA_PR_t_PORT_PR_BIT_PR5 DEFINE 5
PORTA_PR_t_PORT_PR_BIT_PR6 DEFINE 6
PORTA_PR_t_PORT_PR_BIT_PR7 DEFINE 7

/* PORT B (PORT and PFC Structures).            */
PORTB_wk1 DEFINE 0xFFFE3880
PORTB_DR_t_PORT_DR_WORD DEFINE 0xFFFE3882
PORTB_DR_t_PORT_DR_BIT_DR8 DEFINE 0
PORTB_DR_t_PORT_DR_BIT_DR9 DEFINE 1
PORTB_DR_t_PORT_DR_BIT_DR10 DEFINE 2
PORTB_DR_t_PORT_DR_BIT_DR11 DEFINE 3
PORTB_DR_t_PORT_DR_BIT_DR12 DEFINE 4
PORTB_DR_t_PORT_DR_BIT_DR13 DEFINE 5
PORTB_DR_t_PORT_DR_BIT_DR14 DEFINE 6
PORTB_DR_t_PORT_DR_BIT_DR15 DEFINE 7
PORTB_DR_t_PORT_DR_BIT_DR0 DEFINE 0
PORTB_DR_t_PORT_DR_BIT_DR1 DEFINE 1
PORTB_DR_t_PORT_DR_BIT_DR2 DEFINE 2
PORTB_DR_t_PORT_DR_BIT_DR3 DEFINE 3
PORTB_DR_t_PORT_DR_BIT_DR4 DEFINE 4
PORTB_DR_t_PORT_DR_BIT_DR5 DEFINE 5
PORTB_DR_t_PORT_DR_BIT_DR6 DEFINE 6
PORTB_DR_t_PORT_DR_BIT_DR7 DEFINE 7
PORTB_wk2 DEFINE 0xFFFE3884
PORTB_IOR_t_PORT_IOR_WORD DEFINE 0xFFFE3886
PORTB_IOR_t_PORT_IOR_BIT_IOR8 DEFINE 0
PORTB_IOR_t_PORT_IOR_BIT_IOR9 DEFINE 1
PORTB_IOR_t_PORT_IOR_BIT_IOR10 DEFINE 2
PORTB_IOR_t_PORT_IOR_BIT_IOR11 DEFINE 3
PORTB_IOR_t_PORT_IOR_BIT_IOR12 DEFINE 4
PORTB_IOR_t_PORT_IOR_BIT_IOR13 DEFINE 5
PORTB_IOR_t_PORT_IOR_BIT_IOR14 DEFINE 6
PORTB_IOR_t_PORT_IOR_BIT_IOR15 DEFINE 7
PORTB_IOR_t_PORT_IOR_BIT_IOR0 DEFINE 0
PORTB_IOR_t_PORT_IOR_BIT_IOR1 DEFINE 1
PORTB_IOR_t_PORT_IOR_BIT_IOR2 DEFINE 2
PORTB_IOR_t_PORT_IOR_BIT_IOR3 DEFINE 3
PORTB_IOR_t_PORT_IOR_BIT_IOR4 DEFINE 4
PORTB_IOR_t_PORT_IOR_BIT_IOR5 DEFINE 5
PORTB_IOR_t_PORT_IOR_BIT_IOR6 DEFINE 6
PORTB_IOR_t_PORT_IOR_BIT_IOR7 DEFINE 7
PORTB_wk3 DEFINE 0xFFFE3888
PORTB_CR4_WORD DEFINE 0xFFFE3890
PORTB_CR4_BIT_MD14 DEFINE 0
PORTB_CR4_BIT_MD12 DEFINE 0
PORTB_CR4_BIT_MD13 DEFINE 4
PORTB_CR3_WORD DEFINE 0xFFFE3892
PORTB_CR3_BIT_MD10 DEFINE 0
PORTB_CR3_BIT_MD11 DEFINE 4
PORTB_CR3_BIT_MD8 DEFINE 0
PORTB_CR3_BIT_MD9 DEFINE 4
PORTB_CR2_WORD DEFINE 0xFFFE3894
PORTB_CR2_BIT_MD6 DEFINE 0
PORTB_CR2_BIT_MD7 DEFINE 4
PORTB_CR2_BIT_MD4 DEFINE 0
PORTB_CR2_BIT_MD5 DEFINE 4
PORTB_CR1_WORD DEFINE 0xFFFE3896
PORTB_CR1_BIT_MD2 DEFINE 0
PORTB_CR1_BIT_MD3 DEFINE 4
PORTB_CR1_BIT_MD0 DEFINE 0
PORTB_CR1_BIT_MD1 DEFINE 4
PORTB_IR_t_PORT_IR_WORD DEFINE 0xFFFE3898
PORTB_IR_t_PORT_IR_BIT_IR8 DEFINE 0
PORTB_IR_t_PORT_IR_BIT_IR9 DEFINE 1
PORTB_IR_t_PORT_IR_BIT_IR10 DEFINE 2
PORTB_IR_t_PORT_IR_BIT_IR11 DEFINE 3
PORTB_IR_t_PORT_IR_BIT_IR12 DEFINE 4
PORTB_IR_t_PORT_IR_BIT_IR13 DEFINE 5
PORTB_IR_t_PORT_IR_BIT_IR14 DEFINE 6
PORTB_IR_t_PORT_IR_BIT_IR15 DEFINE 7
PORTB_IR_t_PORT_IR_BIT_IR0 DEFINE 0
PORTB_IR_t_PORT_IR_BIT_IR1 DEFINE 1
PORTB_IR_t_PORT_IR_BIT_IR2 DEFINE 2
PORTB_IR_t_PORT_IR_BIT_IR3 DEFINE 3
PORTB_IR_t_PORT_IR_BIT_IR4 DEFINE 4
PORTB_IR_t_PORT_IR_BIT_IR5 DEFINE 5
PORTB_IR_t_PORT_IR_BIT_IR6 DEFINE 6
PORTB_IR_t_PORT_IR_BIT_IR7 DEFINE 7
PORTB_DSR_t_PORT_DSR_WORD DEFINE 0xFFFE389A
PORTB_DSR_t_PORT_DSR_BIT_DSR8 DEFINE 0
PORTB_DSR_t_PORT_DSR_BIT_DSR9 DEFINE 1
PORTB_DSR_t_PORT_DSR_BIT_DSR10 DEFINE 2
PORTB_DSR_t_PORT_DSR_BIT_DSR11 DEFINE 3
PORTB_DSR_t_PORT_DSR_BIT_DSR12 DEFINE 4
PORTB_DSR_t_PORT_DSR_BIT_DSR13 DEFINE 5
PORTB_DSR_t_PORT_DSR_BIT_DSR14 DEFINE 6
PORTB_DSR_t_PORT_DSR_BIT_DSR15 DEFINE 7
PORTB_DSR_t_PORT_DSR_BIT_DSR0 DEFINE 0
PORTB_DSR_t_PORT_DSR_BIT_DSR1 DEFINE 1
PORTB_DSR_t_PORT_DSR_BIT_DSR2 DEFINE 2
PORTB_DSR_t_PORT_DSR_BIT_DSR3 DEFINE 3
PORTB_DSR_t_PORT_DSR_BIT_DSR4 DEFINE 4
PORTB_DSR_t_PORT_DSR_BIT_DSR5 DEFINE 5
PORTB_DSR_t_PORT_DSR_BIT_DSR6 DEFINE 6
PORTB_DSR_t_PORT_DSR_BIT_DSR7 DEFINE 7
PORTB_PSR_t_PORT_PSR_WORD DEFINE 0xFFFE389C
PORTB_PSR_t_PORT_PSR_BIT_PSR8 DEFINE 0
PORTB_PSR_t_PORT_PSR_BIT_PSR9 DEFINE 1
PORTB_PSR_t_PORT_PSR_BIT_PSR10 DEFINE 2
PORTB_PSR_t_PORT_PSR_BIT_PSR11 DEFINE 3
PORTB_PSR_t_PORT_PSR_BIT_PSR12 DEFINE 4
PORTB_PSR_t_PORT_PSR_BIT_PSR13 DEFINE 5
PORTB_PSR_t_PORT_PSR_BIT_PSR14 DEFINE 6
PORTB_PSR_t_PORT_PSR_BIT_PSR15 DEFINE 7
PORTB_PSR_t_PORT_PSR_BIT_PSR0 DEFINE 0
PORTB_PSR_t_PORT_PSR_BIT_PSR1 DEFINE 1
PORTB_PSR_t_PORT_PSR_BIT_PSR2 DEFINE 2
PORTB_PSR_t_PORT_PSR_BIT_PSR3 DEFINE 3
PORTB_PSR_t_PORT_PSR_BIT_PSR4 DEFINE 4
PORTB_PSR_t_PORT_PSR_BIT_PSR5 DEFINE 5
PORTB_PSR_t_PORT_PSR_BIT_PSR6 DEFINE 6
PORTB_PSR_t_PORT_PSR_BIT_PSR7 DEFINE 7
PORTB_PR_t_PORT_PR_WORD DEFINE 0xFFFE389E
PORTB_PR_t_PORT_PR_BIT_PR8 DEFINE 0
PORTB_PR_t_PORT_PR_BIT_PR9 DEFINE 1
PORTB_PR_t_PORT_PR_BIT_PR10 DEFINE 2
PORTB_PR_t_PORT_PR_BIT_PR11 DEFINE 3
PORTB_PR_t_PORT_PR_BIT_PR12 DEFINE 4
PORTB_PR_t_PORT_PR_BIT_PR13 DEFINE 5
PORTB_PR_t_PORT_PR_BIT_PR14 DEFINE 6
PORTB_PR_t_PORT_PR_BIT_PR15 DEFINE 7
PORTB_PR_t_PORT_PR_BIT_PR0 DEFINE 0
PORTB_PR_t_PORT_PR_BIT_PR1 DEFINE 1
PORTB_PR_t_PORT_PR_BIT_PR2 DEFINE 2
PORTB_PR_t_PORT_PR_BIT_PR3 DEFINE 3
PORTB_PR_t_PORT_PR_BIT_PR4 DEFINE 4
PORTB_PR_t_PORT_PR_BIT_PR5 DEFINE 5
PORTB_PR_t_PORT_PR_BIT_PR6 DEFINE 6
PORTB_PR_t_PORT_PR_BIT_PR7 DEFINE 7

/* PORT C (PORT and PFC Structures).            */
PORTC_wk1 DEFINE 0xFFFE3900
PORTC_DR_t_PORT_DR_WORD DEFINE 0xFFFE3902
PORTC_DR_t_PORT_DR_BIT_DR8 DEFINE 0
PORTC_DR_t_PORT_DR_BIT_DR9 DEFINE 1
PORTC_DR_t_PORT_DR_BIT_DR10 DEFINE 2
PORTC_DR_t_PORT_DR_BIT_DR11 DEFINE 3
PORTC_DR_t_PORT_DR_BIT_DR12 DEFINE 4
PORTC_DR_t_PORT_DR_BIT_DR13 DEFINE 5
PORTC_DR_t_PORT_DR_BIT_DR14 DEFINE 6
PORTC_DR_t_PORT_DR_BIT_DR15 DEFINE 7
PORTC_DR_t_PORT_DR_BIT_DR0 DEFINE 0
PORTC_DR_t_PORT_DR_BIT_DR1 DEFINE 1
PORTC_DR_t_PORT_DR_BIT_DR2 DEFINE 2
PORTC_DR_t_PORT_DR_BIT_DR3 DEFINE 3
PORTC_DR_t_PORT_DR_BIT_DR4 DEFINE 4
PORTC_DR_t_PORT_DR_BIT_DR5 DEFINE 5
PORTC_DR_t_PORT_DR_BIT_DR6 DEFINE 6
PORTC_DR_t_PORT_DR_BIT_DR7 DEFINE 7
PORTC_wk2 DEFINE 0xFFFE3904
PORTC_IOR_t_PORT_IOR_WORD DEFINE 0xFFFE3906
PORTC_IOR_t_PORT_IOR_BIT_IOR8 DEFINE 0
PORTC_IOR_t_PORT_IOR_BIT_IOR9 DEFINE 1
PORTC_IOR_t_PORT_IOR_BIT_IOR10 DEFINE 2
PORTC_IOR_t_PORT_IOR_BIT_IOR11 DEFINE 3
PORTC_IOR_t_PORT_IOR_BIT_IOR12 DEFINE 4
PORTC_IOR_t_PORT_IOR_BIT_IOR13 DEFINE 5
PORTC_IOR_t_PORT_IOR_BIT_IOR14 DEFINE 6
PORTC_IOR_t_PORT_IOR_BIT_IOR15 DEFINE 7
PORTC_IOR_t_PORT_IOR_BIT_IOR0 DEFINE 0
PORTC_IOR_t_PORT_IOR_BIT_IOR1 DEFINE 1
PORTC_IOR_t_PORT_IOR_BIT_IOR2 DEFINE 2
PORTC_IOR_t_PORT_IOR_BIT_IOR3 DEFINE 3
PORTC_IOR_t_PORT_IOR_BIT_IOR4 DEFINE 4
PORTC_IOR_t_PORT_IOR_BIT_IOR5 DEFINE 5
PORTC_IOR_t_PORT_IOR_BIT_IOR6 DEFINE 6
PORTC_IOR_t_PORT_IOR_BIT_IOR7 DEFINE 7
PORTC_wk3 DEFINE 0xFFFE3908
PORTC_CR4_WORD DEFINE 0xFFFE3910
PORTC_CR4_BIT_MD14 DEFINE 0
PORTC_CR4_BIT_MD15 DEFINE 4
PORTC_CR4_BIT_MD12 DEFINE 0
PORTC_CR4_BIT_MD13 DEFINE 4
PORTC_CR3_WORD DEFINE 0xFFFE3912
PORTC_CR3_BIT_MD10 DEFINE 0
PORTC_CR3_BIT_MD11 DEFINE 4
PORTC_CR3_BIT_MD8 DEFINE 0
PORTC_CR3_BIT_MD9 DEFINE 4
PORTC_CR2_WORD DEFINE 0xFFFE3914
PORTC_CR2_BIT_MD6 DEFINE 0
PORTC_CR2_BIT_MD7 DEFINE 4
PORTC_CR2_BIT_MD4 DEFINE 0
PORTC_CR2_BIT_MD5 DEFINE 4
PORTC_CR1_WORD DEFINE 0xFFFE3916
PORTC_CR1_BIT_MD2 DEFINE 0
PORTC_CR1_BIT_MD3 DEFINE 4
PORTC_CR1_BIT_MD0 DEFINE 0
PORTC_CR1_BIT_MD1 DEFINE 4
PORTC_wk4 DEFINE 0xFFFE3918
PORTC_PR_t_PORT_PR_WORD DEFINE 0xFFFE391E
PORTC_PR_t_PORT_PR_BIT_PR8 DEFINE 0
PORTC_PR_t_PORT_PR_BIT_PR9 DEFINE 1
PORTC_PR_t_PORT_PR_BIT_PR10 DEFINE 2
PORTC_PR_t_PORT_PR_BIT_PR11 DEFINE 3
PORTC_PR_t_PORT_PR_BIT_PR12 DEFINE 4
PORTC_PR_t_PORT_PR_BIT_PR13 DEFINE 5
PORTC_PR_t_PORT_PR_BIT_PR14 DEFINE 6
PORTC_PR_t_PORT_PR_BIT_PR15 DEFINE 7
PORTC_PR_t_PORT_PR_BIT_PR0 DEFINE 0
PORTC_PR_t_PORT_PR_BIT_PR1 DEFINE 1
PORTC_PR_t_PORT_PR_BIT_PR2 DEFINE 2
PORTC_PR_t_PORT_PR_BIT_PR3 DEFINE 3
PORTC_PR_t_PORT_PR_BIT_PR4 DEFINE 4
PORTC_PR_t_PORT_PR_BIT_PR5 DEFINE 5
PORTC_PR_t_PORT_PR_BIT_PR6 DEFINE 6
PORTC_PR_t_PORT_PR_BIT_PR7 DEFINE 7

/* PORT D (PORT and PFC Structures).            */
PORTD_DR_t_PORT_DR_WORD DEFINE 0xFFFFC800
PORTD_DR_t_PORT_DR_BIT_DR8 DEFINE 0
PORTD_DR_t_PORT_DR_BIT_DR9 DEFINE 1
PORTD_DR_t_PORT_DR_BIT_DR10 DEFINE 2
PORTD_DR_t_PORT_DR_BIT_DR11 DEFINE 3
PORTD_DR_t_PORT_DR_BIT_DR12 DEFINE 4
PORTD_DR_t_PORT_DR_BIT_DR13 DEFINE 5
PORTD_DR_t_PORT_DR_BIT_DR14 DEFINE 6
PORTD_DR_t_PORT_DR_BIT_DR15 DEFINE 7
PORTD_DR_t_PORT_DR_BIT_DR0 DEFINE 0
PORTD_DR_t_PORT_DR_BIT_DR1 DEFINE 1
PORTD_DR_t_PORT_DR_BIT_DR2 DEFINE 2
PORTD_DR_t_PORT_DR_BIT_DR3 DEFINE 3
PORTD_DR_t_PORT_DR_BIT_DR4 DEFINE 4
PORTD_DR_t_PORT_DR_BIT_DR5 DEFINE 5
PORTD_DR_t_PORT_DR_BIT_DR6 DEFINE 6
PORTD_DR_t_PORT_DR_BIT_DR7 DEFINE 7
PORTD_PR_t_PORT_PR_WORD DEFINE 0xFFFFC802
PORTD_PR_t_PORT_PR_BIT_PR8 DEFINE 0
PORTD_PR_t_PORT_PR_BIT_PR9 DEFINE 1
PORTD_PR_t_PORT_PR_BIT_PR10 DEFINE 2
PORTD_PR_t_PORT_PR_BIT_PR11 DEFINE 3
PORTD_PR_t_PORT_PR_BIT_PR12 DEFINE 4
PORTD_PR_t_PORT_PR_BIT_PR13 DEFINE 5
PORTD_PR_t_PORT_PR_BIT_PR14 DEFINE 6
PORTD_PR_t_PORT_PR_BIT_PR15 DEFINE 7
PORTD_PR_t_PORT_PR_BIT_PR0 DEFINE 0
PORTD_PR_t_PORT_PR_BIT_PR1 DEFINE 1
PORTD_PR_t_PORT_PR_BIT_PR2 DEFINE 2
PORTD_PR_t_PORT_PR_BIT_PR3 DEFINE 3
PORTD_PR_t_PORT_PR_BIT_PR4 DEFINE 4
PORTD_PR_t_PORT_PR_BIT_PR5 DEFINE 5
PORTD_PR_t_PORT_PR_BIT_PR6 DEFINE 6
PORTD_PR_t_PORT_PR_BIT_PR7 DEFINE 7
PORTD_IR_t_PORT_IR_WORD DEFINE 0xFFFFC804
PORTD_IR_t_PORT_IR_BIT_IR8 DEFINE 0
PORTD_IR_t_PORT_IR_BIT_IR9 DEFINE 1
PORTD_IR_t_PORT_IR_BIT_IR10 DEFINE 2
PORTD_IR_t_PORT_IR_BIT_IR11 DEFINE 3
PORTD_IR_t_PORT_IR_BIT_IR12 DEFINE 4
PORTD_IR_t_PORT_IR_BIT_IR13 DEFINE 5
PORTD_IR_t_PORT_IR_BIT_IR14 DEFINE 6
PORTD_IR_t_PORT_IR_BIT_IR15 DEFINE 7
PORTD_IR_t_PORT_IR_BIT_IR0 DEFINE 0
PORTD_IR_t_PORT_IR_BIT_IR1 DEFINE 1
PORTD_IR_t_PORT_IR_BIT_IR2 DEFINE 2
PORTD_IR_t_PORT_IR_BIT_IR3 DEFINE 3
PORTD_IR_t_PORT_IR_BIT_IR4 DEFINE 4
PORTD_IR_t_PORT_IR_BIT_IR5 DEFINE 5
PORTD_IR_t_PORT_IR_BIT_IR6 DEFINE 6
PORTD_IR_t_PORT_IR_BIT_IR7 DEFINE 7
PORTD_wk1 DEFINE 0xFFFFC806
PORTD_IOR_t_PORT_IOR_WORD DEFINE 0xFFFFC808
PORTD_IOR_t_PORT_IOR_BIT_IOR8 DEFINE 0
PORTD_IOR_t_PORT_IOR_BIT_IOR9 DEFINE 1
PORTD_IOR_t_PORT_IOR_BIT_IOR10 DEFINE 2
PORTD_IOR_t_PORT_IOR_BIT_IOR11 DEFINE 3
PORTD_IOR_t_PORT_IOR_BIT_IOR12 DEFINE 4
PORTD_IOR_t_PORT_IOR_BIT_IOR13 DEFINE 5
PORTD_IOR_t_PORT_IOR_BIT_IOR14 DEFINE 6
PORTD_IOR_t_PORT_IOR_BIT_IOR15 DEFINE 7
PORTD_IOR_t_PORT_IOR_BIT_IOR0 DEFINE 0
PORTD_IOR_t_PORT_IOR_BIT_IOR1 DEFINE 1
PORTD_IOR_t_PORT_IOR_BIT_IOR2 DEFINE 2
PORTD_IOR_t_PORT_IOR_BIT_IOR3 DEFINE 3
PORTD_IOR_t_PORT_IOR_BIT_IOR4 DEFINE 4
PORTD_IOR_t_PORT_IOR_BIT_IOR5 DEFINE 5
PORTD_IOR_t_PORT_IOR_BIT_IOR6 DEFINE 6
PORTD_IOR_t_PORT_IOR_BIT_IOR7 DEFINE 7
PORTD_wk2 DEFINE 0xFFFFC80A
PORTD_CR2_WORD DEFINE 0xFFFFC80C
PORTD_CR2_BIT_MD12 DEFINE 0
PORTD_CR2_BIT_MD13 DEFINE 2
PORTD_CR2_BIT_MD8 DEFINE 0
PORTD_CR2_BIT_MD9 DEFINE 2
PORTD_CR2_BIT_MD10 DEFINE 4
PORTD_CR2_BIT_MD11 DEFINE 6
PORTD_CR1_WORD DEFINE 0xFFFFC80E
PORTD_CR1_BIT_MD4 DEFINE 0
PORTD_CR1_BIT_MD5 DEFINE 2
PORTD_CR1_BIT_MD6 DEFINE 4
PORTD_CR1_BIT_MD7 DEFINE 6
PORTD_CR1_BIT_MD0 DEFINE 0
PORTD_CR1_BIT_MD1 DEFINE 2
PORTD_CR1_BIT_MD2 DEFINE 4
PORTD_CR1_BIT_MD3 DEFINE 6

/* PORT E (PORT and PFC Structures).            */
PORTE_DR_t_PORT_DR_WORD DEFINE 0xFFFFC810
PORTE_DR_t_PORT_DR_BIT_DR8 DEFINE 0
PORTE_DR_t_PORT_DR_BIT_DR9 DEFINE 1
PORTE_DR_t_PORT_DR_BIT_DR10 DEFINE 2
PORTE_DR_t_PORT_DR_BIT_DR11 DEFINE 3
PORTE_DR_t_PORT_DR_BIT_DR12 DEFINE 4
PORTE_DR_t_PORT_DR_BIT_DR13 DEFINE 5
PORTE_DR_t_PORT_DR_BIT_DR14 DEFINE 6
PORTE_DR_t_PORT_DR_BIT_DR15 DEFINE 7
PORTE_DR_t_PORT_DR_BIT_DR0 DEFINE 0
PORTE_DR_t_PORT_DR_BIT_DR1 DEFINE 1
PORTE_DR_t_PORT_DR_BIT_DR2 DEFINE 2
PORTE_DR_t_PORT_DR_BIT_DR3 DEFINE 3
PORTE_DR_t_PORT_DR_BIT_DR4 DEFINE 4
PORTE_DR_t_PORT_DR_BIT_DR5 DEFINE 5
PORTE_DR_t_PORT_DR_BIT_DR6 DEFINE 6
PORTE_DR_t_PORT_DR_BIT_DR7 DEFINE 7
PORTE_PR_t_PORT_PR_WORD DEFINE 0xFFFFC812
PORTE_PR_t_PORT_PR_BIT_PR8 DEFINE 0
PORTE_PR_t_PORT_PR_BIT_PR9 DEFINE 1
PORTE_PR_t_PORT_PR_BIT_PR10 DEFINE 2
PORTE_PR_t_PORT_PR_BIT_PR11 DEFINE 3
PORTE_PR_t_PORT_PR_BIT_PR12 DEFINE 4
PORTE_PR_t_PORT_PR_BIT_PR13 DEFINE 5
PORTE_PR_t_PORT_PR_BIT_PR14 DEFINE 6
PORTE_PR_t_PORT_PR_BIT_PR15 DEFINE 7
PORTE_PR_t_PORT_PR_BIT_PR0 DEFINE 0
PORTE_PR_t_PORT_PR_BIT_PR1 DEFINE 1
PORTE_PR_t_PORT_PR_BIT_PR2 DEFINE 2
PORTE_PR_t_PORT_PR_BIT_PR3 DEFINE 3
PORTE_PR_t_PORT_PR_BIT_PR4 DEFINE 4
PORTE_PR_t_PORT_PR_BIT_PR5 DEFINE 5
PORTE_PR_t_PORT_PR_BIT_PR6 DEFINE 6
PORTE_PR_t_PORT_PR_BIT_PR7 DEFINE 7
PORTE_IR_t_PORT_IR_WORD DEFINE 0xFFFFC814
PORTE_IR_t_PORT_IR_BIT_IR8 DEFINE 0
PORTE_IR_t_PORT_IR_BIT_IR9 DEFINE 1
PORTE_IR_t_PORT_IR_BIT_IR10 DEFINE 2
PORTE_IR_t_PORT_IR_BIT_IR11 DEFINE 3
PORTE_IR_t_PORT_IR_BIT_IR12 DEFINE 4
PORTE_IR_t_PORT_IR_BIT_IR13 DEFINE 5
PORTE_IR_t_PORT_IR_BIT_IR14 DEFINE 6
PORTE_IR_t_PORT_IR_BIT_IR15 DEFINE 7
PORTE_IR_t_PORT_IR_BIT_IR0 DEFINE 0
PORTE_IR_t_PORT_IR_BIT_IR1 DEFINE 1
PORTE_IR_t_PORT_IR_BIT_IR2 DEFINE 2
PORTE_IR_t_PORT_IR_BIT_IR3 DEFINE 3
PORTE_IR_t_PORT_IR_BIT_IR4 DEFINE 4
PORTE_IR_t_PORT_IR_BIT_IR5 DEFINE 5
PORTE_IR_t_PORT_IR_BIT_IR6 DEFINE 6
PORTE_IR_t_PORT_IR_BIT_IR7 DEFINE 7
PORTE_DSR_t_PORT_DSR_WORD DEFINE 0xFFFFC816
PORTE_DSR_t_PORT_DSR_BIT_DSR8 DEFINE 0
PORTE_DSR_t_PORT_DSR_BIT_DSR9 DEFINE 1
PORTE_DSR_t_PORT_DSR_BIT_DSR10 DEFINE 2
PORTE_DSR_t_PORT_DSR_BIT_DSR11 DEFINE 3
PORTE_DSR_t_PORT_DSR_BIT_DSR12 DEFINE 4
PORTE_DSR_t_PORT_DSR_BIT_DSR13 DEFINE 5
PORTE_DSR_t_PORT_DSR_BIT_DSR14 DEFINE 6
PORTE_DSR_t_PORT_DSR_BIT_DSR15 DEFINE 7
PORTE_DSR_t_PORT_DSR_BIT_DSR0 DEFINE 0
PORTE_DSR_t_PORT_DSR_BIT_DSR1 DEFINE 1
PORTE_DSR_t_PORT_DSR_BIT_DSR2 DEFINE 2
PORTE_DSR_t_PORT_DSR_BIT_DSR3 DEFINE 3
PORTE_DSR_t_PORT_DSR_BIT_DSR4 DEFINE 4
PORTE_DSR_t_PORT_DSR_BIT_DSR5 DEFINE 5
PORTE_DSR_t_PORT_DSR_BIT_DSR6 DEFINE 6
PORTE_DSR_t_PORT_DSR_BIT_DSR7 DEFINE 7
PORTE_IOR_t_PORT_IOR_WORD DEFINE 0xFFFFC818
PORTE_IOR_t_PORT_IOR_BIT_IOR8 DEFINE 0
PORTE_IOR_t_PORT_IOR_BIT_IOR9 DEFINE 1
PORTE_IOR_t_PORT_IOR_BIT_IOR10 DEFINE 2
PORTE_IOR_t_PORT_IOR_BIT_IOR11 DEFINE 3
PORTE_IOR_t_PORT_IOR_BIT_IOR12 DEFINE 4
PORTE_IOR_t_PORT_IOR_BIT_IOR13 DEFINE 5
PORTE_IOR_t_PORT_IOR_BIT_IOR14 DEFINE 6
PORTE_IOR_t_PORT_IOR_BIT_IOR15 DEFINE 7
PORTE_IOR_t_PORT_IOR_BIT_IOR0 DEFINE 0
PORTE_IOR_t_PORT_IOR_BIT_IOR1 DEFINE 1
PORTE_IOR_t_PORT_IOR_BIT_IOR2 DEFINE 2
PORTE_IOR_t_PORT_IOR_BIT_IOR3 DEFINE 3
PORTE_IOR_t_PORT_IOR_BIT_IOR4 DEFINE 4
PORTE_IOR_t_PORT_IOR_BIT_IOR5 DEFINE 5
PORTE_IOR_t_PORT_IOR_BIT_IOR6 DEFINE 6
PORTE_IOR_t_PORT_IOR_BIT_IOR7 DEFINE 7
PORTE_wk DEFINE 0xFFFFC81A
PORTE_CR2_WORD DEFINE 0xFFFFC81C
PORTE_CR2_BIT_MD12 DEFINE 0
PORTE_CR2_BIT_MD13 DEFINE 2
PORTE_CR2_BIT_MD8 DEFINE 0
PORTE_CR2_BIT_MD9 DEFINE 2
PORTE_CR2_BIT_MD10 DEFINE 4
PORTE_CR2_BIT_MD11 DEFINE 6
PORTE_CR1_WORD DEFINE 0xFFFFC81E
PORTE_CR1_BIT_MD4 DEFINE 0
PORTE_CR1_BIT_MD5 DEFINE 2
PORTE_CR1_BIT_MD6 DEFINE 4
PORTE_CR1_BIT_MD7 DEFINE 6
PORTE_CR1_BIT_MD0 DEFINE 0
PORTE_CR1_BIT_MD1 DEFINE 2
PORTE_CR1_BIT_MD2 DEFINE 4
PORTE_CR1_BIT_MD3 DEFINE 6

/* PORT F (PORT and PFC Structures).            */
PORTF_DR_t_PORT_DR_WORD DEFINE 0xFFFFC820
PORTF_DR_t_PORT_DR_BIT_DR8 DEFINE 0
PORTF_DR_t_PORT_DR_BIT_DR9 DEFINE 1
PORTF_DR_t_PORT_DR_BIT_DR10 DEFINE 2
PORTF_DR_t_PORT_DR_BIT_DR11 DEFINE 3
PORTF_DR_t_PORT_DR_BIT_DR12 DEFINE 4
PORTF_DR_t_PORT_DR_BIT_DR13 DEFINE 5
PORTF_DR_t_PORT_DR_BIT_DR14 DEFINE 6
PORTF_DR_t_PORT_DR_BIT_DR15 DEFINE 7
PORTF_DR_t_PORT_DR_BIT_DR0 DEFINE 0
PORTF_DR_t_PORT_DR_BIT_DR1 DEFINE 1
PORTF_DR_t_PORT_DR_BIT_DR2 DEFINE 2
PORTF_DR_t_PORT_DR_BIT_DR3 DEFINE 3
PORTF_DR_t_PORT_DR_BIT_DR4 DEFINE 4
PORTF_DR_t_PORT_DR_BIT_DR5 DEFINE 5
PORTF_DR_t_PORT_DR_BIT_DR6 DEFINE 6
PORTF_DR_t_PORT_DR_BIT_DR7 DEFINE 7
PORTF_PR_t_PORT_PR_WORD DEFINE 0xFFFFC822
PORTF_PR_t_PORT_PR_BIT_PR8 DEFINE 0
PORTF_PR_t_PORT_PR_BIT_PR9 DEFINE 1
PORTF_PR_t_PORT_PR_BIT_PR10 DEFINE 2
PORTF_PR_t_PORT_PR_BIT_PR11 DEFINE 3
PORTF_PR_t_PORT_PR_BIT_PR12 DEFINE 4
PORTF_PR_t_PORT_PR_BIT_PR13 DEFINE 5
PORTF_PR_t_PORT_PR_BIT_PR14 DEFINE 6
PORTF_PR_t_PORT_PR_BIT_PR15 DEFINE 7
PORTF_PR_t_PORT_PR_BIT_PR0 DEFINE 0
PORTF_PR_t_PORT_PR_BIT_PR1 DEFINE 1
PORTF_PR_t_PORT_PR_BIT_PR2 DEFINE 2
PORTF_PR_t_PORT_PR_BIT_PR3 DEFINE 3
PORTF_PR_t_PORT_PR_BIT_PR4 DEFINE 4
PORTF_PR_t_PORT_PR_BIT_PR5 DEFINE 5
PORTF_PR_t_PORT_PR_BIT_PR6 DEFINE 6
PORTF_PR_t_PORT_PR_BIT_PR7 DEFINE 7
PORTF_IR_t_PORT_IR_WORD DEFINE 0xFFFFC824
PORTF_IR_t_PORT_IR_BIT_IR8 DEFINE 0
PORTF_IR_t_PORT_IR_BIT_IR9 DEFINE 1
PORTF_IR_t_PORT_IR_BIT_IR10 DEFINE 2
PORTF_IR_t_PORT_IR_BIT_IR11 DEFINE 3
PORTF_IR_t_PORT_IR_BIT_IR12 DEFINE 4
PORTF_IR_t_PORT_IR_BIT_IR13 DEFINE 5
PORTF_IR_t_PORT_IR_BIT_IR14 DEFINE 6
PORTF_IR_t_PORT_IR_BIT_IR15 DEFINE 7
PORTF_IR_t_PORT_IR_BIT_IR0 DEFINE 0
PORTF_IR_t_PORT_IR_BIT_IR1 DEFINE 1
PORTF_IR_t_PORT_IR_BIT_IR2 DEFINE 2
PORTF_IR_t_PORT_IR_BIT_IR3 DEFINE 3
PORTF_IR_t_PORT_IR_BIT_IR4 DEFINE 4
PORTF_IR_t_PORT_IR_BIT_IR5 DEFINE 5
PORTF_IR_t_PORT_IR_BIT_IR6 DEFINE 6
PORTF_IR_t_PORT_IR_BIT_IR7 DEFINE 7
PORTF_DSR_t_PORT_DSR_WORD DEFINE 0xFFFFC826
PORTF_DSR_t_PORT_DSR_BIT_DSR8 DEFINE 0
PORTF_DSR_t_PORT_DSR_BIT_DSR9 DEFINE 1
PORTF_DSR_t_PORT_DSR_BIT_DSR10 DEFINE 2
PORTF_DSR_t_PORT_DSR_BIT_DSR11 DEFINE 3
PORTF_DSR_t_PORT_DSR_BIT_DSR12 DEFINE 4
PORTF_DSR_t_PORT_DSR_BIT_DSR13 DEFINE 5
PORTF_DSR_t_PORT_DSR_BIT_DSR14 DEFINE 6
PORTF_DSR_t_PORT_DSR_BIT_DSR15 DEFINE 7
PORTF_DSR_t_PORT_DSR_BIT_DSR0 DEFINE 0
PORTF_DSR_t_PORT_DSR_BIT_DSR1 DEFINE 1
PORTF_DSR_t_PORT_DSR_BIT_DSR2 DEFINE 2
PORTF_DSR_t_PORT_DSR_BIT_DSR3 DEFINE 3
PORTF_DSR_t_PORT_DSR_BIT_DSR4 DEFINE 4
PORTF_DSR_t_PORT_DSR_BIT_DSR5 DEFINE 5
PORTF_DSR_t_PORT_DSR_BIT_DSR6 DEFINE 6
PORTF_DSR_t_PORT_DSR_BIT_DSR7 DEFINE 7
PORTF_PSR_t_PORT_PSR_WORD DEFINE 0xFFFFC828
PORTF_PSR_t_PORT_PSR_BIT_PSR8 DEFINE 0
PORTF_PSR_t_PORT_PSR_BIT_PSR9 DEFINE 1
PORTF_PSR_t_PORT_PSR_BIT_PSR10 DEFINE 2
PORTF_PSR_t_PORT_PSR_BIT_PSR11 DEFINE 3
PORTF_PSR_t_PORT_PSR_BIT_PSR12 DEFINE 4
PORTF_PSR_t_PORT_PSR_BIT_PSR13 DEFINE 5
PORTF_PSR_t_PORT_PSR_BIT_PSR14 DEFINE 6
PORTF_PSR_t_PORT_PSR_BIT_PSR15 DEFINE 7
PORTF_PSR_t_PORT_PSR_BIT_PSR0 DEFINE 0
PORTF_PSR_t_PORT_PSR_BIT_PSR1 DEFINE 1
PORTF_PSR_t_PORT_PSR_BIT_PSR2 DEFINE 2
PORTF_PSR_t_PORT_PSR_BIT_PSR3 DEFINE 3
PORTF_PSR_t_PORT_PSR_BIT_PSR4 DEFINE 4
PORTF_PSR_t_PORT_PSR_BIT_PSR5 DEFINE 5
PORTF_PSR_t_PORT_PSR_BIT_PSR6 DEFINE 6
PORTF_PSR_t_PORT_PSR_BIT_PSR7 DEFINE 7
PORTF_IOR_t_PORT_IOR_WORD DEFINE 0xFFFFC82A
PORTF_IOR_t_PORT_IOR_BIT_IOR8 DEFINE 0
PORTF_IOR_t_PORT_IOR_BIT_IOR9 DEFINE 1
PORTF_IOR_t_PORT_IOR_BIT_IOR10 DEFINE 2
PORTF_IOR_t_PORT_IOR_BIT_IOR11 DEFINE 3
PORTF_IOR_t_PORT_IOR_BIT_IOR12 DEFINE 4
PORTF_IOR_t_PORT_IOR_BIT_IOR13 DEFINE 5
PORTF_IOR_t_PORT_IOR_BIT_IOR14 DEFINE 6
PORTF_IOR_t_PORT_IOR_BIT_IOR15 DEFINE 7
PORTF_IOR_t_PORT_IOR_BIT_IOR0 DEFINE 0
PORTF_IOR_t_PORT_IOR_BIT_IOR1 DEFINE 1
PORTF_IOR_t_PORT_IOR_BIT_IOR2 DEFINE 2
PORTF_IOR_t_PORT_IOR_BIT_IOR3 DEFINE 3
PORTF_IOR_t_PORT_IOR_BIT_IOR4 DEFINE 4
PORTF_IOR_t_PORT_IOR_BIT_IOR5 DEFINE 5
PORTF_IOR_t_PORT_IOR_BIT_IOR6 DEFINE 6
PORTF_IOR_t_PORT_IOR_BIT_IOR7 DEFINE 7
PORTF_CR2_WORD DEFINE 0xFFFFC82C
PORTF_CR2_BIT_MD12 DEFINE 0
PORTF_CR2_BIT_MD13 DEFINE 2
PORTF_CR2_BIT_MD14 DEFINE 4
PORTF_CR2_BIT_MD15 DEFINE 6
PORTF_CR2_BIT_MD8 DEFINE 0
PORTF_CR2_BIT_MD9 DEFINE 2
PORTF_CR2_BIT_MD10 DEFINE 4
PORTF_CR2_BIT_MD11 DEFINE 6
PORTF_CR1_WORD DEFINE 0xFFFFC82E
PORTF_CR1_BIT_MD4 DEFINE 0
PORTF_CR1_BIT_MD5 DEFINE 2
PORTF_CR1_BIT_MD6 DEFINE 4
PORTF_CR1_BIT_MD7 DEFINE 6
PORTF_CR1_BIT_MD0 DEFINE 0
PORTF_CR1_BIT_MD1 DEFINE 2
PORTF_CR1_BIT_MD2 DEFINE 4
PORTF_CR1_BIT_MD3 DEFINE 6

/* PORT G (PORT and PFC Structures).            */
PORTG_DR_t_PORT_DR_WORD DEFINE 0xFFFFC830
PORTG_DR_t_PORT_DR_BIT_DR8 DEFINE 0
PORTG_DR_t_PORT_DR_BIT_DR9 DEFINE 1
PORTG_DR_t_PORT_DR_BIT_DR10 DEFINE 2
PORTG_DR_t_PORT_DR_BIT_DR11 DEFINE 3
PORTG_DR_t_PORT_DR_BIT_DR12 DEFINE 4
PORTG_DR_t_PORT_DR_BIT_DR13 DEFINE 5
PORTG_DR_t_PORT_DR_BIT_DR14 DEFINE 6
PORTG_DR_t_PORT_DR_BIT_DR15 DEFINE 7
PORTG_DR_t_PORT_DR_BIT_DR0 DEFINE 0
PORTG_DR_t_PORT_DR_BIT_DR1 DEFINE 1
PORTG_DR_t_PORT_DR_BIT_DR2 DEFINE 2
PORTG_DR_t_PORT_DR_BIT_DR3 DEFINE 3
PORTG_DR_t_PORT_DR_BIT_DR4 DEFINE 4
PORTG_DR_t_PORT_DR_BIT_DR5 DEFINE 5
PORTG_DR_t_PORT_DR_BIT_DR6 DEFINE 6
PORTG_DR_t_PORT_DR_BIT_DR7 DEFINE 7
PORTG_PR_t_PORT_PR_WORD DEFINE 0xFFFFC832
PORTG_PR_t_PORT_PR_BIT_PR8 DEFINE 0
PORTG_PR_t_PORT_PR_BIT_PR9 DEFINE 1
PORTG_PR_t_PORT_PR_BIT_PR10 DEFINE 2
PORTG_PR_t_PORT_PR_BIT_PR11 DEFINE 3
PORTG_PR_t_PORT_PR_BIT_PR12 DEFINE 4
PORTG_PR_t_PORT_PR_BIT_PR13 DEFINE 5
PORTG_PR_t_PORT_PR_BIT_PR14 DEFINE 6
PORTG_PR_t_PORT_PR_BIT_PR15 DEFINE 7
PORTG_PR_t_PORT_PR_BIT_PR0 DEFINE 0
PORTG_PR_t_PORT_PR_BIT_PR1 DEFINE 1
PORTG_PR_t_PORT_PR_BIT_PR2 DEFINE 2
PORTG_PR_t_PORT_PR_BIT_PR3 DEFINE 3
PORTG_PR_t_PORT_PR_BIT_PR4 DEFINE 4
PORTG_PR_t_PORT_PR_BIT_PR5 DEFINE 5
PORTG_PR_t_PORT_PR_BIT_PR6 DEFINE 6
PORTG_PR_t_PORT_PR_BIT_PR7 DEFINE 7
PORTG_IR_t_PORT_IR_WORD DEFINE 0xFFFFC834
PORTG_IR_t_PORT_IR_BIT_IR8 DEFINE 0
PORTG_IR_t_PORT_IR_BIT_IR9 DEFINE 1
PORTG_IR_t_PORT_IR_BIT_IR10 DEFINE 2
PORTG_IR_t_PORT_IR_BIT_IR11 DEFINE 3
PORTG_IR_t_PORT_IR_BIT_IR12 DEFINE 4
PORTG_IR_t_PORT_IR_BIT_IR13 DEFINE 5
PORTG_IR_t_PORT_IR_BIT_IR14 DEFINE 6
PORTG_IR_t_PORT_IR_BIT_IR15 DEFINE 7
PORTG_IR_t_PORT_IR_BIT_IR0 DEFINE 0
PORTG_IR_t_PORT_IR_BIT_IR1 DEFINE 1
PORTG_IR_t_PORT_IR_BIT_IR2 DEFINE 2
PORTG_IR_t_PORT_IR_BIT_IR3 DEFINE 3
PORTG_IR_t_PORT_IR_BIT_IR4 DEFINE 4
PORTG_IR_t_PORT_IR_BIT_IR5 DEFINE 5
PORTG_IR_t_PORT_IR_BIT_IR6 DEFINE 6
PORTG_IR_t_PORT_IR_BIT_IR7 DEFINE 7
PORTG_DSR_t_PORT_DSR_WORD DEFINE 0xFFFFC836
PORTG_DSR_t_PORT_DSR_BIT_DSR8 DEFINE 0
PORTG_DSR_t_PORT_DSR_BIT_DSR9 DEFINE 1
PORTG_DSR_t_PORT_DSR_BIT_DSR10 DEFINE 2
PORTG_DSR_t_PORT_DSR_BIT_DSR11 DEFINE 3
PORTG_DSR_t_PORT_DSR_BIT_DSR12 DEFINE 4
PORTG_DSR_t_PORT_DSR_BIT_DSR13 DEFINE 5
PORTG_DSR_t_PORT_DSR_BIT_DSR14 DEFINE 6
PORTG_DSR_t_PORT_DSR_BIT_DSR15 DEFINE 7
PORTG_DSR_t_PORT_DSR_BIT_DSR0 DEFINE 0
PORTG_DSR_t_PORT_DSR_BIT_DSR1 DEFINE 1
PORTG_DSR_t_PORT_DSR_BIT_DSR2 DEFINE 2
PORTG_DSR_t_PORT_DSR_BIT_DSR3 DEFINE 3
PORTG_DSR_t_PORT_DSR_BIT_DSR4 DEFINE 4
PORTG_DSR_t_PORT_DSR_BIT_DSR5 DEFINE 5
PORTG_DSR_t_PORT_DSR_BIT_DSR6 DEFINE 6
PORTG_DSR_t_PORT_DSR_BIT_DSR7 DEFINE 7
PORTG_ER_t_PORT_ER_WORD DEFINE 0xFFFFC838
PORTG_ER_t_PORT_ER_BIT_HES DEFINE 0
PORTG_ER_t_PORT_ER_BIT_LES DEFINE 0
PORTG_wk1 DEFINE 0xFFFFC83A
PORTG_IOR_t_PORT_IOR_WORD DEFINE 0xFFFFC83C
PORTG_IOR_t_PORT_IOR_BIT_IOR8 DEFINE 0
PORTG_IOR_t_PORT_IOR_BIT_IOR9 DEFINE 1
PORTG_IOR_t_PORT_IOR_BIT_IOR10 DEFINE 2
PORTG_IOR_t_PORT_IOR_BIT_IOR11 DEFINE 3
PORTG_IOR_t_PORT_IOR_BIT_IOR12 DEFINE 4
PORTG_IOR_t_PORT_IOR_BIT_IOR13 DEFINE 5
PORTG_IOR_t_PORT_IOR_BIT_IOR14 DEFINE 6
PORTG_IOR_t_PORT_IOR_BIT_IOR15 DEFINE 7
PORTG_IOR_t_PORT_IOR_BIT_IOR0 DEFINE 0
PORTG_IOR_t_PORT_IOR_BIT_IOR1 DEFINE 1
PORTG_IOR_t_PORT_IOR_BIT_IOR2 DEFINE 2
PORTG_IOR_t_PORT_IOR_BIT_IOR3 DEFINE 3
PORTG_IOR_t_PORT_IOR_BIT_IOR4 DEFINE 4
PORTG_IOR_t_PORT_IOR_BIT_IOR5 DEFINE 5
PORTG_IOR_t_PORT_IOR_BIT_IOR6 DEFINE 6
PORTG_IOR_t_PORT_IOR_BIT_IOR7 DEFINE 7
PORTG_wk2 DEFINE 0xFFFFC83E
PORTG_CR2_WORD DEFINE 0xFFFFC840
PORTG_CR2_BIT_MD12 DEFINE 0
PORTG_CR2_BIT_MD13 DEFINE 2
PORTG_CR2_BIT_MD14 DEFINE 4
PORTG_CR2_BIT_MD15 DEFINE 6
PORTG_CR2_BIT_MD8 DEFINE 0
PORTG_CR2_BIT_MD9 DEFINE 2
PORTG_CR2_BIT_MD10 DEFINE 4
PORTG_CR2_BIT_MD11 DEFINE 6
PORTG_CR1_WORD DEFINE 0xFFFFC842
PORTG_CR1_BIT_MD4 DEFINE 0
PORTG_CR1_BIT_MD5 DEFINE 2
PORTG_CR1_BIT_MD6 DEFINE 4
PORTG_CR1_BIT_MD7 DEFINE 6
PORTG_CR1_BIT_MD0 DEFINE 0
PORTG_CR1_BIT_MD1 DEFINE 2
PORTG_CR1_BIT_MD2 DEFINE 4
PORTG_CR1_BIT_MD3 DEFINE 6

/* PORT H (PORT and PFC Structures).            */
PORTH_DR_t_PORT_DR_WORD DEFINE 0xFFFFC850
PORTH_DR_t_PORT_DR_BIT_DR8 DEFINE 0
PORTH_DR_t_PORT_DR_BIT_DR9 DEFINE 1
PORTH_DR_t_PORT_DR_BIT_DR10 DEFINE 2
PORTH_DR_t_PORT_DR_BIT_DR11 DEFINE 3
PORTH_DR_t_PORT_DR_BIT_DR12 DEFINE 4
PORTH_DR_t_PORT_DR_BIT_DR13 DEFINE 5
PORTH_DR_t_PORT_DR_BIT_DR14 DEFINE 6
PORTH_DR_t_PORT_DR_BIT_DR15 DEFINE 7
PORTH_DR_t_PORT_DR_BIT_DR0 DEFINE 0
PORTH_DR_t_PORT_DR_BIT_DR1 DEFINE 1
PORTH_DR_t_PORT_DR_BIT_DR2 DEFINE 2
PORTH_DR_t_PORT_DR_BIT_DR3 DEFINE 3
PORTH_DR_t_PORT_DR_BIT_DR4 DEFINE 4
PORTH_DR_t_PORT_DR_BIT_DR5 DEFINE 5
PORTH_DR_t_PORT_DR_BIT_DR6 DEFINE 6
PORTH_DR_t_PORT_DR_BIT_DR7 DEFINE 7
PORTH_PR_t_PORT_PR_WORD DEFINE 0xFFFFC852
PORTH_PR_t_PORT_PR_BIT_PR8 DEFINE 0
PORTH_PR_t_PORT_PR_BIT_PR9 DEFINE 1
PORTH_PR_t_PORT_PR_BIT_PR10 DEFINE 2
PORTH_PR_t_PORT_PR_BIT_PR11 DEFINE 3
PORTH_PR_t_PORT_PR_BIT_PR12 DEFINE 4
PORTH_PR_t_PORT_PR_BIT_PR13 DEFINE 5
PORTH_PR_t_PORT_PR_BIT_PR14 DEFINE 6
PORTH_PR_t_PORT_PR_BIT_PR15 DEFINE 7
PORTH_PR_t_PORT_PR_BIT_PR0 DEFINE 0
PORTH_PR_t_PORT_PR_BIT_PR1 DEFINE 1
PORTH_PR_t_PORT_PR_BIT_PR2 DEFINE 2
PORTH_PR_t_PORT_PR_BIT_PR3 DEFINE 3
PORTH_PR_t_PORT_PR_BIT_PR4 DEFINE 4
PORTH_PR_t_PORT_PR_BIT_PR5 DEFINE 5
PORTH_PR_t_PORT_PR_BIT_PR6 DEFINE 6
PORTH_PR_t_PORT_PR_BIT_PR7 DEFINE 7
PORTH_IOR_t_PORT_IOR_WORD DEFINE 0xFFFFC854
PORTH_IOR_t_PORT_IOR_BIT_IOR8 DEFINE 0
PORTH_IOR_t_PORT_IOR_BIT_IOR9 DEFINE 1
PORTH_IOR_t_PORT_IOR_BIT_IOR10 DEFINE 2
PORTH_IOR_t_PORT_IOR_BIT_IOR11 DEFINE 3
PORTH_IOR_t_PORT_IOR_BIT_IOR12 DEFINE 4
PORTH_IOR_t_PORT_IOR_BIT_IOR13 DEFINE 5
PORTH_IOR_t_PORT_IOR_BIT_IOR14 DEFINE 6
PORTH_IOR_t_PORT_IOR_BIT_IOR15 DEFINE 7
PORTH_IOR_t_PORT_IOR_BIT_IOR0 DEFINE 0
PORTH_IOR_t_PORT_IOR_BIT_IOR1 DEFINE 1
PORTH_IOR_t_PORT_IOR_BIT_IOR2 DEFINE 2
PORTH_IOR_t_PORT_IOR_BIT_IOR3 DEFINE 3
PORTH_IOR_t_PORT_IOR_BIT_IOR4 DEFINE 4
PORTH_IOR_t_PORT_IOR_BIT_IOR5 DEFINE 5
PORTH_IOR_t_PORT_IOR_BIT_IOR6 DEFINE 6
PORTH_IOR_t_PORT_IOR_BIT_IOR7 DEFINE 7
PORTH_wk1 DEFINE 0xFFFFC856
PORTH_CR_WORD DEFINE 0xFFFFC858
PORTH_CR_BIT_MD4 DEFINE 0
PORTH_CR_BIT_MD5 DEFINE 2
PORTH_CR_BIT_MD0 DEFINE 0
PORTH_CR_BIT_MD1 DEFINE 2
PORTH_CR_BIT_MD2 DEFINE 4
PORTH_CR_BIT_MD3 DEFINE 6

/* PORT J (PORT and PFC Structures).            */
PORTJ_DR_t_PORT_DR_WORD DEFINE 0xFFFFC860
PORTJ_DR_t_PORT_DR_BIT_DR8 DEFINE 0
PORTJ_DR_t_PORT_DR_BIT_DR9 DEFINE 1
PORTJ_DR_t_PORT_DR_BIT_DR10 DEFINE 2
PORTJ_DR_t_PORT_DR_BIT_DR11 DEFINE 3
PORTJ_DR_t_PORT_DR_BIT_DR12 DEFINE 4
PORTJ_DR_t_PORT_DR_BIT_DR13 DEFINE 5
PORTJ_DR_t_PORT_DR_BIT_DR14 DEFINE 6
PORTJ_DR_t_PORT_DR_BIT_DR15 DEFINE 7
PORTJ_DR_t_PORT_DR_BIT_DR0 DEFINE 0
PORTJ_DR_t_PORT_DR_BIT_DR1 DEFINE 1
PORTJ_DR_t_PORT_DR_BIT_DR2 DEFINE 2
PORTJ_DR_t_PORT_DR_BIT_DR3 DEFINE 3
PORTJ_DR_t_PORT_DR_BIT_DR4 DEFINE 4
PORTJ_DR_t_PORT_DR_BIT_DR5 DEFINE 5
PORTJ_DR_t_PORT_DR_BIT_DR6 DEFINE 6
PORTJ_DR_t_PORT_DR_BIT_DR7 DEFINE 7
PORTJ_PR_t_PORT_PR_WORD DEFINE 0xFFFFC862
PORTJ_PR_t_PORT_PR_BIT_PR8 DEFINE 0
PORTJ_PR_t_PORT_PR_BIT_PR9 DEFINE 1
PORTJ_PR_t_PORT_PR_BIT_PR10 DEFINE 2
PORTJ_PR_t_PORT_PR_BIT_PR11 DEFINE 3
PORTJ_PR_t_PORT_PR_BIT_PR12 DEFINE 4
PORTJ_PR_t_PORT_PR_BIT_PR13 DEFINE 5
PORTJ_PR_t_PORT_PR_BIT_PR14 DEFINE 6
PORTJ_PR_t_PORT_PR_BIT_PR15 DEFINE 7
PORTJ_PR_t_PORT_PR_BIT_PR0 DEFINE 0
PORTJ_PR_t_PORT_PR_BIT_PR1 DEFINE 1
PORTJ_PR_t_PORT_PR_BIT_PR2 DEFINE 2
PORTJ_PR_t_PORT_PR_BIT_PR3 DEFINE 3
PORTJ_PR_t_PORT_PR_BIT_PR4 DEFINE 4
PORTJ_PR_t_PORT_PR_BIT_PR5 DEFINE 5
PORTJ_PR_t_PORT_PR_BIT_PR6 DEFINE 6
PORTJ_PR_t_PORT_PR_BIT_PR7 DEFINE 7
PORTJ_IR_t_PORT_IR_WORD DEFINE 0xFFFFC864
PORTJ_IR_t_PORT_IR_BIT_IR8 DEFINE 0
PORTJ_IR_t_PORT_IR_BIT_IR9 DEFINE 1
PORTJ_IR_t_PORT_IR_BIT_IR10 DEFINE 2
PORTJ_IR_t_PORT_IR_BIT_IR11 DEFINE 3
PORTJ_IR_t_PORT_IR_BIT_IR12 DEFINE 4
PORTJ_IR_t_PORT_IR_BIT_IR13 DEFINE 5
PORTJ_IR_t_PORT_IR_BIT_IR14 DEFINE 6
PORTJ_IR_t_PORT_IR_BIT_IR15 DEFINE 7
PORTJ_IR_t_PORT_IR_BIT_IR0 DEFINE 0
PORTJ_IR_t_PORT_IR_BIT_IR1 DEFINE 1
PORTJ_IR_t_PORT_IR_BIT_IR2 DEFINE 2
PORTJ_IR_t_PORT_IR_BIT_IR3 DEFINE 3
PORTJ_IR_t_PORT_IR_BIT_IR4 DEFINE 4
PORTJ_IR_t_PORT_IR_BIT_IR5 DEFINE 5
PORTJ_IR_t_PORT_IR_BIT_IR6 DEFINE 6
PORTJ_IR_t_PORT_IR_BIT_IR7 DEFINE 7
PORTJ_DSR_t_PORT_DSR_WORD DEFINE 0xFFFFC866
PORTJ_DSR_t_PORT_DSR_BIT_DSR8 DEFINE 0
PORTJ_DSR_t_PORT_DSR_BIT_DSR9 DEFINE 1
PORTJ_DSR_t_PORT_DSR_BIT_DSR10 DEFINE 2
PORTJ_DSR_t_PORT_DSR_BIT_DSR11 DEFINE 3
PORTJ_DSR_t_PORT_DSR_BIT_DSR12 DEFINE 4
PORTJ_DSR_t_PORT_DSR_BIT_DSR13 DEFINE 5
PORTJ_DSR_t_PORT_DSR_BIT_DSR14 DEFINE 6
PORTJ_DSR_t_PORT_DSR_BIT_DSR15 DEFINE 7
PORTJ_DSR_t_PORT_DSR_BIT_DSR0 DEFINE 0
PORTJ_DSR_t_PORT_DSR_BIT_DSR1 DEFINE 1
PORTJ_DSR_t_PORT_DSR_BIT_DSR2 DEFINE 2
PORTJ_DSR_t_PORT_DSR_BIT_DSR3 DEFINE 3
PORTJ_DSR_t_PORT_DSR_BIT_DSR4 DEFINE 4
PORTJ_DSR_t_PORT_DSR_BIT_DSR5 DEFINE 5
PORTJ_DSR_t_PORT_DSR_BIT_DSR6 DEFINE 6
PORTJ_DSR_t_PORT_DSR_BIT_DSR7 DEFINE 7
PORTJ_PSR_t_PORT_PSR_WORD DEFINE 0xFFFFC868
PORTJ_PSR_t_PORT_PSR_BIT_PSR8 DEFINE 0
PORTJ_PSR_t_PORT_PSR_BIT_PSR9 DEFINE 1
PORTJ_PSR_t_PORT_PSR_BIT_PSR10 DEFINE 2
PORTJ_PSR_t_PORT_PSR_BIT_PSR11 DEFINE 3
PORTJ_PSR_t_PORT_PSR_BIT_PSR12 DEFINE 4
PORTJ_PSR_t_PORT_PSR_BIT_PSR13 DEFINE 5
PORTJ_PSR_t_PORT_PSR_BIT_PSR14 DEFINE 6
PORTJ_PSR_t_PORT_PSR_BIT_PSR15 DEFINE 7
PORTJ_PSR_t_PORT_PSR_BIT_PSR0 DEFINE 0
PORTJ_PSR_t_PORT_PSR_BIT_PSR1 DEFINE 1
PORTJ_PSR_t_PORT_PSR_BIT_PSR2 DEFINE 2
PORTJ_PSR_t_PORT_PSR_BIT_PSR3 DEFINE 3
PORTJ_PSR_t_PORT_PSR_BIT_PSR4 DEFINE 4
PORTJ_PSR_t_PORT_PSR_BIT_PSR5 DEFINE 5
PORTJ_PSR_t_PORT_PSR_BIT_PSR6 DEFINE 6
PORTJ_PSR_t_PORT_PSR_BIT_PSR7 DEFINE 7
PORTJ_wk1 DEFINE 0xFFFFC86A
PORTJ_IOR_t_PORT_IOR_WORD DEFINE 0xFFFFC86C
PORTJ_IOR_t_PORT_IOR_BIT_IOR8 DEFINE 0
PORTJ_IOR_t_PORT_IOR_BIT_IOR9 DEFINE 1
PORTJ_IOR_t_PORT_IOR_BIT_IOR10 DEFINE 2
PORTJ_IOR_t_PORT_IOR_BIT_IOR11 DEFINE 3
PORTJ_IOR_t_PORT_IOR_BIT_IOR12 DEFINE 4
PORTJ_IOR_t_PORT_IOR_BIT_IOR13 DEFINE 5
PORTJ_IOR_t_PORT_IOR_BIT_IOR14 DEFINE 6
PORTJ_IOR_t_PORT_IOR_BIT_IOR15 DEFINE 7
PORTJ_IOR_t_PORT_IOR_BIT_IOR0 DEFINE 0
PORTJ_IOR_t_PORT_IOR_BIT_IOR1 DEFINE 1
PORTJ_IOR_t_PORT_IOR_BIT_IOR2 DEFINE 2
PORTJ_IOR_t_PORT_IOR_BIT_IOR3 DEFINE 3
PORTJ_IOR_t_PORT_IOR_BIT_IOR4 DEFINE 4
PORTJ_IOR_t_PORT_IOR_BIT_IOR5 DEFINE 5
PORTJ_IOR_t_PORT_IOR_BIT_IOR6 DEFINE 6
PORTJ_IOR_t_PORT_IOR_BIT_IOR7 DEFINE 7
PORTJ_wk2 DEFINE 0xFFFFC86E
PORTJ_CR2_WORD DEFINE 0xFFFFC870
PORTJ_CR2_BIT_MD8 DEFINE 0
PORTJ_CR2_BIT_MD9 DEFINE 2
PORTJ_CR1_WORD DEFINE 0xFFFFC872
PORTJ_CR1_BIT_MD4 DEFINE 0
PORTJ_CR1_BIT_MD5 DEFINE 2
PORTJ_CR1_BIT_MD6 DEFINE 4
PORTJ_CR1_BIT_MD7 DEFINE 6
PORTJ_CR1_BIT_MD0 DEFINE 0
PORTJ_CR1_BIT_MD1 DEFINE 2
PORTJ_CR1_BIT_MD2 DEFINE 4
PORTJ_CR1_BIT_MD3 DEFINE 6

/* PORT K (PORT and PFC Structures).            */
PORTK_DR_t_PORT_DR_WORD DEFINE 0xFFFFC880
PORTK_DR_t_PORT_DR_BIT_DR8 DEFINE 0
PORTK_DR_t_PORT_DR_BIT_DR9 DEFINE 1
PORTK_DR_t_PORT_DR_BIT_DR10 DEFINE 2
PORTK_DR_t_PORT_DR_BIT_DR11 DEFINE 3
PORTK_DR_t_PORT_DR_BIT_DR12 DEFINE 4
PORTK_DR_t_PORT_DR_BIT_DR13 DEFINE 5
PORTK_DR_t_PORT_DR_BIT_DR14 DEFINE 6
PORTK_DR_t_PORT_DR_BIT_DR15 DEFINE 7
PORTK_DR_t_PORT_DR_BIT_DR0 DEFINE 0
PORTK_DR_t_PORT_DR_BIT_DR1 DEFINE 1
PORTK_DR_t_PORT_DR_BIT_DR2 DEFINE 2
PORTK_DR_t_PORT_DR_BIT_DR3 DEFINE 3
PORTK_DR_t_PORT_DR_BIT_DR4 DEFINE 4
PORTK_DR_t_PORT_DR_BIT_DR5 DEFINE 5
PORTK_DR_t_PORT_DR_BIT_DR6 DEFINE 6
PORTK_DR_t_PORT_DR_BIT_DR7 DEFINE 7
PORTK_PR_t_PORT_PR_WORD DEFINE 0xFFFFC882
PORTK_PR_t_PORT_PR_BIT_PR8 DEFINE 0
PORTK_PR_t_PORT_PR_BIT_PR9 DEFINE 1
PORTK_PR_t_PORT_PR_BIT_PR10 DEFINE 2
PORTK_PR_t_PORT_PR_BIT_PR11 DEFINE 3
PORTK_PR_t_PORT_PR_BIT_PR12 DEFINE 4
PORTK_PR_t_PORT_PR_BIT_PR13 DEFINE 5
PORTK_PR_t_PORT_PR_BIT_PR14 DEFINE 6
PORTK_PR_t_PORT_PR_BIT_PR15 DEFINE 7
PORTK_PR_t_PORT_PR_BIT_PR0 DEFINE 0
PORTK_PR_t_PORT_PR_BIT_PR1 DEFINE 1
PORTK_PR_t_PORT_PR_BIT_PR2 DEFINE 2
PORTK_PR_t_PORT_PR_BIT_PR3 DEFINE 3
PORTK_PR_t_PORT_PR_BIT_PR4 DEFINE 4
PORTK_PR_t_PORT_PR_BIT_PR5 DEFINE 5
PORTK_PR_t_PORT_PR_BIT_PR6 DEFINE 6
PORTK_PR_t_PORT_PR_BIT_PR7 DEFINE 7
PORTK_IR_t_PORT_IR_WORD DEFINE 0xFFFFC884
PORTK_IR_t_PORT_IR_BIT_IR8 DEFINE 0
PORTK_IR_t_PORT_IR_BIT_IR9 DEFINE 1
PORTK_IR_t_PORT_IR_BIT_IR10 DEFINE 2
PORTK_IR_t_PORT_IR_BIT_IR11 DEFINE 3
PORTK_IR_t_PORT_IR_BIT_IR12 DEFINE 4
PORTK_IR_t_PORT_IR_BIT_IR13 DEFINE 5
PORTK_IR_t_PORT_IR_BIT_IR14 DEFINE 6
PORTK_IR_t_PORT_IR_BIT_IR15 DEFINE 7
PORTK_IR_t_PORT_IR_BIT_IR0 DEFINE 0
PORTK_IR_t_PORT_IR_BIT_IR1 DEFINE 1
PORTK_IR_t_PORT_IR_BIT_IR2 DEFINE 2
PORTK_IR_t_PORT_IR_BIT_IR3 DEFINE 3
PORTK_IR_t_PORT_IR_BIT_IR4 DEFINE 4
PORTK_IR_t_PORT_IR_BIT_IR5 DEFINE 5
PORTK_IR_t_PORT_IR_BIT_IR6 DEFINE 6
PORTK_IR_t_PORT_IR_BIT_IR7 DEFINE 7
PORTK_DSR_t_PORT_DSR_WORD DEFINE 0xFFFFC886
PORTK_DSR_t_PORT_DSR_BIT_DSR8 DEFINE 0
PORTK_DSR_t_PORT_DSR_BIT_DSR9 DEFINE 1
PORTK_DSR_t_PORT_DSR_BIT_DSR10 DEFINE 2
PORTK_DSR_t_PORT_DSR_BIT_DSR11 DEFINE 3
PORTK_DSR_t_PORT_DSR_BIT_DSR12 DEFINE 4
PORTK_DSR_t_PORT_DSR_BIT_DSR13 DEFINE 5
PORTK_DSR_t_PORT_DSR_BIT_DSR14 DEFINE 6
PORTK_DSR_t_PORT_DSR_BIT_DSR15 DEFINE 7
PORTK_DSR_t_PORT_DSR_BIT_DSR0 DEFINE 0
PORTK_DSR_t_PORT_DSR_BIT_DSR1 DEFINE 1
PORTK_DSR_t_PORT_DSR_BIT_DSR2 DEFINE 2
PORTK_DSR_t_PORT_DSR_BIT_DSR3 DEFINE 3
PORTK_DSR_t_PORT_DSR_BIT_DSR4 DEFINE 4
PORTK_DSR_t_PORT_DSR_BIT_DSR5 DEFINE 5
PORTK_DSR_t_PORT_DSR_BIT_DSR6 DEFINE 6
PORTK_DSR_t_PORT_DSR_BIT_DSR7 DEFINE 7
PORTK_PSR_t_PORT_PSR_WORD DEFINE 0xFFFFC888
PORTK_PSR_t_PORT_PSR_BIT_PSR8 DEFINE 0
PORTK_PSR_t_PORT_PSR_BIT_PSR9 DEFINE 1
PORTK_PSR_t_PORT_PSR_BIT_PSR10 DEFINE 2
PORTK_PSR_t_PORT_PSR_BIT_PSR11 DEFINE 3
PORTK_PSR_t_PORT_PSR_BIT_PSR12 DEFINE 4
PORTK_PSR_t_PORT_PSR_BIT_PSR13 DEFINE 5
PORTK_PSR_t_PORT_PSR_BIT_PSR14 DEFINE 6
PORTK_PSR_t_PORT_PSR_BIT_PSR15 DEFINE 7
PORTK_PSR_t_PORT_PSR_BIT_PSR0 DEFINE 0
PORTK_PSR_t_PORT_PSR_BIT_PSR1 DEFINE 1
PORTK_PSR_t_PORT_PSR_BIT_PSR2 DEFINE 2
PORTK_PSR_t_PORT_PSR_BIT_PSR3 DEFINE 3
PORTK_PSR_t_PORT_PSR_BIT_PSR4 DEFINE 4
PORTK_PSR_t_PORT_PSR_BIT_PSR5 DEFINE 5
PORTK_PSR_t_PORT_PSR_BIT_PSR6 DEFINE 6
PORTK_PSR_t_PORT_PSR_BIT_PSR7 DEFINE 7
PORTK_wk1 DEFINE 0xFFFFC88A
PORTK_IOR_t_PORT_IOR_WORD DEFINE 0xFFFFC88C
PORTK_IOR_t_PORT_IOR_BIT_IOR8 DEFINE 0
PORTK_IOR_t_PORT_IOR_BIT_IOR9 DEFINE 1
PORTK_IOR_t_PORT_IOR_BIT_IOR10 DEFINE 2
PORTK_IOR_t_PORT_IOR_BIT_IOR11 DEFINE 3
PORTK_IOR_t_PORT_IOR_BIT_IOR12 DEFINE 4
PORTK_IOR_t_PORT_IOR_BIT_IOR13 DEFINE 5
PORTK_IOR_t_PORT_IOR_BIT_IOR14 DEFINE 6
PORTK_IOR_t_PORT_IOR_BIT_IOR15 DEFINE 7
PORTK_IOR_t_PORT_IOR_BIT_IOR0 DEFINE 0
PORTK_IOR_t_PORT_IOR_BIT_IOR1 DEFINE 1
PORTK_IOR_t_PORT_IOR_BIT_IOR2 DEFINE 2
PORTK_IOR_t_PORT_IOR_BIT_IOR3 DEFINE 3
PORTK_IOR_t_PORT_IOR_BIT_IOR4 DEFINE 4
PORTK_IOR_t_PORT_IOR_BIT_IOR5 DEFINE 5
PORTK_IOR_t_PORT_IOR_BIT_IOR6 DEFINE 6
PORTK_IOR_t_PORT_IOR_BIT_IOR7 DEFINE 7
PORTK_wk2 DEFINE 0xFFFFC88E
PORTK_CR2_WORD DEFINE 0xFFFFC890
PORTK_CR2_BIT_MD8 DEFINE 0
PORTK_CR2_BIT_MD9 DEFINE 2
PORTK_CR2_BIT_MD10 DEFINE 4
PORTK_CR2_BIT_MD11 DEFINE 6
PORTK_CR1_WORD DEFINE 0xFFFFC892
PORTK_CR1_BIT_MD4 DEFINE 0
PORTK_CR1_BIT_MD5 DEFINE 2
PORTK_CR1_BIT_MD6 DEFINE 4
PORTK_CR1_BIT_MD7 DEFINE 6
PORTK_CR1_BIT_MD0 DEFINE 0
PORTK_CR1_BIT_MD1 DEFINE 2
PORTK_CR1_BIT_MD2 DEFINE 4
PORTK_CR1_BIT_MD3 DEFINE 6

/* PORT L (PORT and PFC Structures).            */
PORTL_DR_t_PORT_DR_WORD DEFINE 0xFFFFC8A0
PORTL_DR_t_PORT_DR_BIT_DR8 DEFINE 0
PORTL_DR_t_PORT_DR_BIT_DR9 DEFINE 1
PORTL_DR_t_PORT_DR_BIT_DR10 DEFINE 2
PORTL_DR_t_PORT_DR_BIT_DR11 DEFINE 3
PORTL_DR_t_PORT_DR_BIT_DR12 DEFINE 4
PORTL_DR_t_PORT_DR_BIT_DR13 DEFINE 5
PORTL_DR_t_PORT_DR_BIT_DR14 DEFINE 6
PORTL_DR_t_PORT_DR_BIT_DR15 DEFINE 7
PORTL_DR_t_PORT_DR_BIT_DR0 DEFINE 0
PORTL_DR_t_PORT_DR_BIT_DR1 DEFINE 1
PORTL_DR_t_PORT_DR_BIT_DR2 DEFINE 2
PORTL_DR_t_PORT_DR_BIT_DR3 DEFINE 3
PORTL_DR_t_PORT_DR_BIT_DR4 DEFINE 4
PORTL_DR_t_PORT_DR_BIT_DR5 DEFINE 5
PORTL_DR_t_PORT_DR_BIT_DR6 DEFINE 6
PORTL_DR_t_PORT_DR_BIT_DR7 DEFINE 7
PORTL_PR_t_PORT_PR_WORD DEFINE 0xFFFFC8A2
PORTL_PR_t_PORT_PR_BIT_PR8 DEFINE 0
PORTL_PR_t_PORT_PR_BIT_PR9 DEFINE 1
PORTL_PR_t_PORT_PR_BIT_PR10 DEFINE 2
PORTL_PR_t_PORT_PR_BIT_PR11 DEFINE 3
PORTL_PR_t_PORT_PR_BIT_PR12 DEFINE 4
PORTL_PR_t_PORT_PR_BIT_PR13 DEFINE 5
PORTL_PR_t_PORT_PR_BIT_PR14 DEFINE 6
PORTL_PR_t_PORT_PR_BIT_PR15 DEFINE 7
PORTL_PR_t_PORT_PR_BIT_PR0 DEFINE 0
PORTL_PR_t_PORT_PR_BIT_PR1 DEFINE 1
PORTL_PR_t_PORT_PR_BIT_PR2 DEFINE 2
PORTL_PR_t_PORT_PR_BIT_PR3 DEFINE 3
PORTL_PR_t_PORT_PR_BIT_PR4 DEFINE 4
PORTL_PR_t_PORT_PR_BIT_PR5 DEFINE 5
PORTL_PR_t_PORT_PR_BIT_PR6 DEFINE 6
PORTL_PR_t_PORT_PR_BIT_PR7 DEFINE 7
PORTL_IR_t_PORT_IR_WORD DEFINE 0xFFFFC8A4
PORTL_IR_t_PORT_IR_BIT_IR8 DEFINE 0
PORTL_IR_t_PORT_IR_BIT_IR9 DEFINE 1
PORTL_IR_t_PORT_IR_BIT_IR10 DEFINE 2
PORTL_IR_t_PORT_IR_BIT_IR11 DEFINE 3
PORTL_IR_t_PORT_IR_BIT_IR12 DEFINE 4
PORTL_IR_t_PORT_IR_BIT_IR13 DEFINE 5
PORTL_IR_t_PORT_IR_BIT_IR14 DEFINE 6
PORTL_IR_t_PORT_IR_BIT_IR15 DEFINE 7
PORTL_IR_t_PORT_IR_BIT_IR0 DEFINE 0
PORTL_IR_t_PORT_IR_BIT_IR1 DEFINE 1
PORTL_IR_t_PORT_IR_BIT_IR2 DEFINE 2
PORTL_IR_t_PORT_IR_BIT_IR3 DEFINE 3
PORTL_IR_t_PORT_IR_BIT_IR4 DEFINE 4
PORTL_IR_t_PORT_IR_BIT_IR5 DEFINE 5
PORTL_IR_t_PORT_IR_BIT_IR6 DEFINE 6
PORTL_IR_t_PORT_IR_BIT_IR7 DEFINE 7
PORTL_wk1 DEFINE 0xFFFFC8A6
PORTL_IOR_t_PORT_IOR_WORD DEFINE 0xFFFFC8A8
PORTL_IOR_t_PORT_IOR_BIT_IOR8 DEFINE 0
PORTL_IOR_t_PORT_IOR_BIT_IOR9 DEFINE 1
PORTL_IOR_t_PORT_IOR_BIT_IOR10 DEFINE 2
PORTL_IOR_t_PORT_IOR_BIT_IOR11 DEFINE 3
PORTL_IOR_t_PORT_IOR_BIT_IOR12 DEFINE 4
PORTL_IOR_t_PORT_IOR_BIT_IOR13 DEFINE 5
PORTL_IOR_t_PORT_IOR_BIT_IOR14 DEFINE 6
PORTL_IOR_t_PORT_IOR_BIT_IOR15 DEFINE 7
PORTL_IOR_t_PORT_IOR_BIT_IOR0 DEFINE 0
PORTL_IOR_t_PORT_IOR_BIT_IOR1 DEFINE 1
PORTL_IOR_t_PORT_IOR_BIT_IOR2 DEFINE 2
PORTL_IOR_t_PORT_IOR_BIT_IOR3 DEFINE 3
PORTL_IOR_t_PORT_IOR_BIT_IOR4 DEFINE 4
PORTL_IOR_t_PORT_IOR_BIT_IOR5 DEFINE 5
PORTL_IOR_t_PORT_IOR_BIT_IOR6 DEFINE 6
PORTL_IOR_t_PORT_IOR_BIT_IOR7 DEFINE 7
PORTL_wk2 DEFINE 0xFFFFC8AA
PORTL_CR2_WORD DEFINE 0xFFFFC8AC
PORTL_CR2_BIT_MD8 DEFINE 0
PORTL_CR1_WORD DEFINE 0xFFFFC8AE
PORTL_CR1_BIT_MD4 DEFINE 0
PORTL_CR1_BIT_MD5 DEFINE 2
PORTL_CR1_BIT_MD6 DEFINE 4
PORTL_CR1_BIT_MD7 DEFINE 6
PORTL_CR1_BIT_MD0 DEFINE 0
PORTL_CR1_BIT_MD1 DEFINE 2
PORTL_CR1_BIT_MD2 DEFINE 4
PORTL_CR1_BIT_MD3 DEFINE 6

/* Port CK Control Register                     */
PORTCTRL_CKCR_WORD DEFINE 0xFFFFC920
PORTCTRL_CKCR_BIT_CKOE DEFINE 0

/* Multi-Input Signature Generator MISRCDR      */
MISRCDR DEFINE 0xFFF7FFFCu

/* Multi-Input Signature Generator              */
MISG_MISRCR_BYTE DEFINE 0xFFFC1C00
MISG_MISRCR_BIT_MISREN DEFINE 0
MISG_wk2 DEFINE 0xFFFC1C01
MISG_MISR DEFINE 0xFFFC1C04

/* Read-Only Memory Cache                       */
ROMC_RCCR_LONG DEFINE 0xFFFC1400
ROMC_RCCR_BIT_RCE DEFINE 0
ROMC_RCCR_BIT_RCFD DEFINE 1
ROMC_RCCR_BIT_RCFI DEFINE 2
ROMC_RCCR_BIT_RCF DEFINE 3
ROMC_wk DEFINE 0xFFFC1404
ROMC_RCCR2_LONG DEFINE 0xFFFC1408
ROMC_RCCR2_BIT_PCE0 DEFINE 0
ROMC_RCCR2_BIT_PCE2 DEFINE 2
ROMC_RCCR2_BIT_PFE DEFINE 4
ROMC_RCCR2_BIT_PFECF DEFINE 5
ROMC_RCCR2_BIT_PFENB DEFINE 6
ROMC_RCCR2_BIT_PFECB DEFINE 7

/* Random-Access Memory                         */
RAM_RAMEN_WORD DEFINE 0xFFFF0800
RAM_RAMEN_BIT_RAME0 DEFINE 0
RAM_RAMEN_BIT_RAME1 DEFINE 1
RAM_RAMEN_BIT_RAME2 DEFINE 2
RAM_RAMEN_BIT_RAME3 DEFINE 3
RAM_RAMEN_BIT_RAME4 DEFINE 4
RAM_RAMEN_BIT_RAME5 DEFINE 5
RAM_RAMEN_BIT_RAME6 DEFINE 6
RAM_RAMEN_BIT_RAME7 DEFINE 7
RAM_RAMEN_BIT_RNKEY DEFINE 8
RAM_RAMWEN_WORD DEFINE 0xFFFF0802
RAM_RAMWEN_BIT_RAMWE0 DEFINE 0
RAM_RAMWEN_BIT_RAMWE1 DEFINE 1
RAM_RAMWEN_BIT_RAMWE2 DEFINE 2
RAM_RAMWEN_BIT_RAMWE3 DEFINE 3
RAM_RAMWEN_BIT_RAMWE4 DEFINE 4
RAM_RAMWEN_BIT_RAMWE5 DEFINE 5
RAM_RAMWEN_BIT_RAMWE6 DEFINE 6
RAM_RAMWEN_BIT_RAMWE7 DEFINE 7
RAM_RAMWEN_BIT_RWNKEY DEFINE 8
RAM_RAMECC_WORD DEFINE 0xFFFF0804
RAM_RAMECC_BIT_RECCA DEFINE 0
RAM_RAMECC_BIT_REKEY DEFINE 8
RAM_RAMERR_BYTE DEFINE 0xFFFF0806
RAM_RAMERR_BIT_RCRCT DEFINE 0
RAM_RAMERR_BIT_RDTCT DEFINE 1
RAM_RAMERR_BIT_RPARI DEFINE 4
RAM_wk1 DEFINE 0xFFFF0807
RAM_wk2 DEFINE 0xFFFF080C
RAM_RAMINT_BYTE DEFINE 0xFFFF0810
RAM_RAMINT_BIT_RECIE DEFINE 0
RAM_RAMINT_BIT_REDIE DEFINE 1
RAM_RAMINT_BIT_RPEIE DEFINE 4
RAM_wk3 DEFINE 0xFFFF0811
RAM_RAMACYC_WORD DEFINE 0xFFFF0812
RAM_RAMACYC_BIT_RDCYC DEFINE 0
RAM_RAMACYC_BIT_WRCYC DEFINE 4
RAM_RAMACYC_BIT_RAKEY DEFINE 8

/* Read-Only Memory                             */
ROM_FPMON_BYTE DEFINE 0xFFFFA800
ROM_FPMON_BIT_FWE DEFINE 7
ROM_wk1 DEFINE 0xFFFFA801
ROM_FMODR_BYTE DEFINE 0xFFFFA802
ROM_FMODR_BIT_FRDMD DEFINE 4
ROM_wk2 DEFINE 0xFFFFA803
ROM_FASTAT_BYTE DEFINE 0xFFFFA810
ROM_FASTAT_BIT_EEPWPE DEFINE 0
ROM_FASTAT_BIT_EEPRPE DEFINE 1
ROM_FASTAT_BIT_EEPIFE DEFINE 2
ROM_FASTAT_BIT_EEPAE DEFINE 3
ROM_FASTAT_BIT_CMDLK DEFINE 4
ROM_FASTAT_BIT_ROMAE DEFINE 7
ROM_FAEINT_BYTE DEFINE 0xFFFFA811
ROM_FAEINT_BIT_EEPWPEIE DEFINE 0
ROM_FAEINT_BIT_EEPRPEIE DEFINE 1
ROM_FAEINT_BIT_EEPIFEIE DEFINE 2
ROM_FAEINT_BIT_EEPAEIE DEFINE 3
ROM_FAEINT_BIT_CMDLKIE DEFINE 4
ROM_FAEINT_BIT_ROMAEIE DEFINE 7
ROM_wk3 DEFINE 0xFFFFA812
ROM_ROMMAT_WORD DEFINE 0xFFFFA820
ROM_ROMMAT_BIT_ROMSEL DEFINE 0
ROM_ROMMAT_BIT_KEY DEFINE 8
ROM_wk4 DEFINE 0xFFFFA822
ROM_FCURAME_WORD DEFINE 0xFFFFA854
ROM_FCURAME_BIT_FCRME DEFINE 0
ROM_FCURAME_BIT_KEY DEFINE 8
ROM_wk5 DEFINE 0xFFFFA856
ROM_FSTATR0_BYTE DEFINE 0xFFFFA900
ROM_FSTATR0_BIT_PRGSPD DEFINE 0
ROM_FSTATR0_BIT_ERSSPD DEFINE 1
ROM_FSTATR0_BIT_SUSRDY DEFINE 3
ROM_FSTATR0_BIT_PRGERR DEFINE 4
ROM_FSTATR0_BIT_ERSERR DEFINE 5
ROM_FSTATR0_BIT_ILGLERR DEFINE 6
ROM_FSTATR0_BIT_FRDY DEFINE 7
ROM_FSTATR1_BYTE DEFINE 0xFFFFA901
ROM_FSTATR1_BIT_FRCRCT DEFINE 0
ROM_FSTATR1_BIT_FRDTCT DEFINE 1
ROM_FSTATR1_BIT_FLOCKST DEFINE 4
ROM_FSTATR1_BIT_FCUERR DEFINE 7
ROM_FENTRYR_WORD DEFINE 0xFFFFA902
ROM_FENTRYR_BIT_FEKEY DEFINE 0
ROM_FENTRYR_BIT_FENTRY0 DEFINE 0
ROM_FENTRYR_BIT_FENTRY1 DEFINE 1
ROM_FENTRYR_BIT_FENTRY3 DEFINE 3
ROM_FENTRYR_BIT_FENTRY4 DEFINE 4
ROM_FENTRYR_BIT_FENTRYD DEFINE 7
ROM_FPROTR_WORD DEFINE 0xFFFFA904
ROM_FPROTR_BIT_FPKEY DEFINE 0
ROM_FPROTR_BIT_FPROTCN DEFINE 0
ROM_FRESETR_WORD DEFINE 0xFFFFA906
ROM_FRESETR_BIT_FRKEY DEFINE 0
ROM_FRESETR_BIT_FRESET DEFINE 0
ROM_wk6 DEFINE 0xFFFFA908
ROM_FCMDR_WORD DEFINE 0xFFFFA90A
ROM_FCMDR_BIT_PCMDR DEFINE 0
ROM_FCMDR_BIT_CMDR DEFINE 8
ROM_FRAMECCR_BYTE DEFINE 0xFFFFA90C
ROM_FRAMECCR_BIT_FRCCLE DEFINE 0
ROM_FRAMECCR_BIT_FRDCLE DEFINE 1
ROM_wk7 DEFINE 0xFFFFA90D
ROM_FCPSR_WORD DEFINE 0xFFFFA918
ROM_FCPSR_BIT_ESUSPMD DEFINE 0
ROM_wk8 DEFINE 0xFFFFA91A
ROM_FPESTAT_WORD DEFINE 0xFFFFA91C
ROM_FPESTAT_BIT_PEERRST DEFINE 0

/* Electrical Erase/Program Read Only Memory    */
EEPROM_EEPRE0_WORD DEFINE 0xFFFFA840
EEPROM_EEPRE0_BIT_DBRE00 DEFINE 0
EEPROM_EEPRE0_BIT_DBRE01 DEFINE 1
EEPROM_EEPRE0_BIT_DBRE02 DEFINE 2
EEPROM_EEPRE0_BIT_DBRE03 DEFINE 3
EEPROM_EEPRE0_BIT_DBRE04 DEFINE 4
EEPROM_EEPRE0_BIT_DBRE05 DEFINE 5
EEPROM_EEPRE0_BIT_DBRE06 DEFINE 6
EEPROM_EEPRE0_BIT_DBRE07 DEFINE 7
EEPROM_EEPRE0_BIT_KEY DEFINE 8
EEPROM_EEPRE1_WORD DEFINE 0xFFFFA842
EEPROM_EEPRE1_BIT_DBRE08 DEFINE 0
EEPROM_EEPRE1_BIT_DBRE09 DEFINE 1
EEPROM_EEPRE1_BIT_DBRE10 DEFINE 2
EEPROM_EEPRE1_BIT_DBRE11 DEFINE 3
EEPROM_EEPRE1_BIT_DBRE12 DEFINE 4
EEPROM_EEPRE1_BIT_DBRE13 DEFINE 5
EEPROM_EEPRE1_BIT_DBRE14 DEFINE 6
EEPROM_EEPRE1_BIT_DBRE15 DEFINE 7
EEPROM_EEPRE1_BIT_KEY DEFINE 8
EEPROM_wk3 DEFINE 0xFFFFA844
EEPROM_EEPWE0_WORD DEFINE 0xFFFFA850
EEPROM_EEPWE0_BIT_DBWE00 DEFINE 0
EEPROM_EEPWE0_BIT_DBWE01 DEFINE 1
EEPROM_EEPWE0_BIT_DBWE02 DEFINE 2
EEPROM_EEPWE0_BIT_DBWE03 DEFINE 3
EEPROM_EEPWE0_BIT_DBWE04 DEFINE 4
EEPROM_EEPWE0_BIT_DBWE05 DEFINE 5
EEPROM_EEPWE0_BIT_DBWE06 DEFINE 6
EEPROM_EEPWE0_BIT_DBWE07 DEFINE 7
EEPROM_EEPWE0_BIT_KEY DEFINE 8
EEPROM_EEPWE1_WORD DEFINE 0xFFFFA852
EEPROM_EEPWE1_BIT_DBWE08 DEFINE 0
EEPROM_EEPWE1_BIT_DBWE09 DEFINE 1
EEPROM_EEPWE1_BIT_DBWE10 DEFINE 2
EEPROM_EEPWE1_BIT_DBWE11 DEFINE 3
EEPROM_EEPWE1_BIT_DBWE12 DEFINE 4
EEPROM_EEPWE1_BIT_DBWE13 DEFINE 5
EEPROM_EEPWE1_BIT_DBWE14 DEFINE 6
EEPROM_EEPWE1_BIT_DBWE15 DEFINE 7
EEPROM_EEPWE1_BIT_KEY DEFINE 8
EEPROM_wk4 DEFINE 0xFFFFA854
EEPROM_EEPBCCNT_WORD DEFINE 0xFFFFA91A
EEPROM_EEPBCCNT_BIT_BCSIZE DEFINE 0
EEPROM_EEPBCCNT_BIT_BCADR DEFINE 3
EEPROM_wk5 DEFINE 0xFFFFA91C
EEPROM_EEPBCSTAT_WORD DEFINE 0xFFFFA91E
EEPROM_EEPBCSTAT_BIT_BCST DEFINE 0
EEPROM_wk6 DEFINE 0xFFFFA920
EEPROM_EEPMAT_WORD DEFINE 0xFFFFAB00
EEPROM_EEPMAT_BIT_EEPSEL DEFINE 0
EEPROM_EEPMAT_BIT_KEY DEFINE 8

/* Power-Down Modes                             */
STBY_STBCR_WORD DEFINE 0xFFFE0400
STBY_STBCR_BIT_MSTP0 DEFINE 0
STBY_STBCR_BIT_MSTP1 DEFINE 1
STBY_STBCR_BIT_MSTP2 DEFINE 2
STBY_STBCR_BIT_MSTP3 DEFINE 3
STBY_STBCR_BIT_MSTP4 DEFINE 4
STBY_STBCR_BIT_STBCRKEY DEFINE 8

#endif  /* __IAR_SYSTEMS_ASM__  */

/**************************************************
 *   Interupt vector definitions
 *   (Common for compiler and assembler)
 **************************************************/


/* Illegal code */
#define Illegal_code 4

/* Illegal slot */
#define Illegal_slot 6

/* CPU Address error */
#define CPU_Address 9

/* DMAC Address error */
#define DMAC_Address 10

/* NMI */
#define NMI 11

/* User breakpoint trap */
#define User_Break 12

/* INT_FPU */
#define FPU 13

/* Bank Overflow */
#define Bank_Overflow 15

/* Bank Underflow */
#define Bank_Underflow 16

/* Divide by zero */
#define Divide_by_Zero 17

/* Divide Overflow */
#define Divide_Overflow 18

/* Interrupt IRQ0 */
#define IRQ0 64

/* Interrupt IRQ1 */
#define IRQ1 65

/* Interrupt IRQ2 */
#define IRQ2 66

/* Interrupt IRQ3 */
#define IRQ3 67

/* Interrupt IRQ4 */
#define IRQ4 68

/* Interrupt IRQ5 */
#define IRQ5 69

/* Interrupt IRQ6 */
#define IRQ6 70

/* Interrupt IRQ7 */
#define IRQ7 71

/* RAM/ROM RAME */
#define RAMROM_RAME 79

/* RAM/ROM FIFE */
#define RAMROM_FIFE 82

/* SINT SINT15 */
#define SINT_SINT15 93

/* SINT SINT14 */
#define SINT_SINT14 94

/* SINT SINT13 */
#define SINT_SINT13 95

/* SINT SINT12 */
#define SINT_SINT12 96

/* SINT SINT11 */
#define SINT_SINT11 97

/* SINT SINT10 */
#define SINT_SINT10 98

/* SINT SINT9 */
#define SINT_SINT9 99

/* SINT SINT8 */
#define SINT_SINT8 100

/* SINT SINT7 */
#define SINT_SINT7 101

/* SINT SINT6 */
#define SINT_SINT6 102

/* SINT SINT5 */
#define SINT_SINT5 103

/* SINT SINT4 */
#define SINT_SINT4 104

/* SINT SINT3 */
#define SINT_SINT3 105

/* SINT SINT2 */
#define SINT_SINT2 106

/* SINT SINT1 */
#define SINT_SINT1 107

/* DMAC0 DEI0 */
#define DMAC0_DEI0 108

/* DMAC0 HEI0 */
#define DMAC0_HEI0 109

/* DMAC1 DEI1 */
#define DMAC1_DEI1 112

/* DMAC1 HEI1 */
#define DMAC1_HEI1 113

/* DMAC2 DEI2 */
#define DMAC2_DEI2 116

/* DMAC2 HEI2 */
#define DMAC2_HEI2 117

/* DMAC3 DEI3 */
#define DMAC3_DEI3 120

/* DMAC3 HEI3 */
#define DMAC3_HEI3 121

/* DMAC4 DEI4 */
#define DMAC4_DEI4 124

/* DMAC4 HEI4 */
#define DMAC4_HEI4 125

/* DMAC5 DEI5 */
#define DMAC5_DEI5 128

/* DMAC5 HEI5 */
#define DMAC5_HEI5 129

/* DMAC6 DEI6 */
#define DMAC6_DEI6 132

/* DMAC6 HEI6 */
#define DMAC6_HEI6 133

/* DMAC7 DEI7 */
#define DMAC7_DEI7 136

/* DMAC7 HEI7 */
#define DMAC7_HEI7 137

/* CMT CMI0 */
#define CMT_CMI0 140

/* CMT CMI1 */
#define CMT_CMI1 144

/* WDT ITI */
#define WDT_ITI 148

/* ATU-A ICIA0 */
#define ATUA_ICIA0 152

/* ATU-A ICIA1 */
#define ATUA_ICIA1 153

/* ATU-A ICIA2 */
#define ATUA_ICIA2 156

/* ATU-A ICIA3 */
#define ATUA_ICIA3 157

/* ATU-A ICIA4 */
#define ATUA_ICIA4 160

/* ATU-A ICIA5 */
#define ATUA_ICIA5 161

/* ATU-A OVIA */
#define ATUA_OVIA 164

/* ATU-B CMIB0 */
#define ATUB_CMIB0 168

/* ATU-B CMIB1 */
#define ATUB_CMIB1 169

/* ATU-B CMIB6 */
#define ATUB_CMIB6 172

/* ATU-B ICIB0 */
#define ATUB_ICIB0 173

/* ATU-C0 IMIC00 */
#define ATUC0_IMIC00 176

/* ATU-C0 IMIC01 */
#define ATUC0_IMIC01 177

/* ATU-C0 IMIC02 */
#define ATUC0_IMIC02 178

/* ATU-C0 IMIC03 */
#define ATUC0_IMIC03 179

/* ATU-C0 OVIC0 */
#define ATUC0_OVIC0 180

/* ATU-C1 IMIC10 */
#define ATUC1_IMIC10 184

/* ATU-C1 IMIC11 */
#define ATUC1_IMIC11 185

/* ATU-C1 IMIC12 */
#define ATUC1_IMIC12 186

/* ATU-C1 IMIC13 */
#define ATUC1_IMIC13 187

/* ATU-C1 OVIC1 */
#define ATUC1_OVIC1 188

/* ATU-C2 IMIC20 */
#define ATUC2_IMIC20 192

/* ATU-C2 IMIC21 */
#define ATUC2_IMIC21 193

/* ATU-C2 IMIC22 */
#define ATUC2_IMIC22 194

/* ATU-C2 IMIC23 */
#define ATUC2_IMIC23 195

/* ATU-C2 OVIC2 */
#define ATUC2_OVIC2 196

/* ATU-C3 IMIC30 */
#define ATUC3_IMIC30 200

/* ATU-C3 IMIC31 */
#define ATUC3_IMIC31 201

/* ATU-C3 IMIC32 */
#define ATUC3_IMIC32 202

/* ATU-C3 IMIC33 */
#define ATUC3_IMIC33 203

/* ATU-C3 OVIC3 */
#define ATUC3_OVIC3 204

/* ATU-C4 IMIC40 */
#define ATUC4_IMIC40 208

/* ATU-C4 IMIC41 */
#define ATUC4_IMIC41 209

/* ATU-C4 IMIC42 */
#define ATUC4_IMIC42 210

/* ATU-C4 IMIC43 */
#define ATUC4_IMIC43 211

/* ATU-C4 OVIC4 */
#define ATUC4_OVIC4 212

/* ATU-D0 CMID00 */
#define ATUD0_CMID00 216

/* ATU-D0 CMID01 */
#define ATUD0_CMID01 217

/* ATU-D0 CMID02 */
#define ATUD0_CMID02 218

/* ATU-D0 CMID03 */
#define ATUD0_CMID03 219

/* ATU-D0 OVI1D0 */
#define ATUD0_OVI1D0 220

/* ATU-D0 OVI2D0 */
#define ATUD0_OVI2D0 221

/* ATU-D0 UDID00 */
#define ATUD0_UDID00 224

/* ATU-D0 UDID01 */
#define ATUD0_UDID01 225

/* ATU-D0 UDID02 */
#define ATUD0_UDID02 226

/* ATU-D0 UDID03 */
#define ATUD0_UDID03 227

/* ATU-D1 CMID10 */
#define ATUD1_CMID10 228

/* ATU-D1 CMID11 */
#define ATUD1_CMID11 229

/* ATU-D1 CMID12 */
#define ATUD1_CMID12 230

/* ATU-D1 CMID13 */
#define ATUD1_CMID13 231

/* ATU-D1 OVI1D1 */
#define ATUD1_OVI1D1 232

/* ATU-D1 OVI2D1 */
#define ATUD1_OVI2D1 233

/* ATU-D1 UDID10 */
#define ATUD1_UDID10 236

/* ATU-D1 UDID11 */
#define ATUD1_UDID11 237

/* ATU-D1 UDID12 */
#define ATUD1_UDID12 238

/* ATU-D1 UDID13 */
#define ATUD1_UDID13 239

/* ATU-D2 CMID20 */
#define ATUD2_CMID20 240

/* ATU-D2 CMID21 */
#define ATUD2_CMID21 241

/* ATU-D2 CMID22 */
#define ATUD2_CMID22 242

/* ATU-D2 CMID23 */
#define ATUD2_CMID23 243

/* ATU-D2 OVI1D2 */
#define ATUD2_OVI1D2 244

/* ATU-D2 OVI2D2 */
#define ATUD2_OVI2D2 245

/* ATU-D2 UDID20 */
#define ATUD2_UDID20 248

/* ATU-D2 UDID21 */
#define ATUD2_UDID21 249

/* ATU-D2 UDID22 */
#define ATUD2_UDID22 250

/* ATU-D2 UDID23 */
#define ATUD2_UDID23 251

/* ATU-D3 CMID30 */
#define ATUD3_CMID30 252

/* ATU-D3 CMID31 */
#define ATUD3_CMID31 253

/* ATU-D3 CMID32 */
#define ATUD3_CMID32 254

/* ATU-D3 CMID33 */
#define ATUD3_CMID33 255

/* ATU-D3 OVI1D3 */
#define ATUD3_OVI1D3 256

/* ATU-D3 OVI2D3 */
#define ATUD3_OVI2D3 257

/* ATU-D3 UDID30 */
#define ATUD3_UDID30 260

/* ATU-D3 UDID31 */
#define ATUD3_UDID31 261

/* ATU-D3 UDID32 */
#define ATUD3_UDID32 262

/* ATU-D3 UDID33 */
#define ATUD3_UDID33 263

/* ATU-E0 CMIE00 */
#define ATUE0_CMIE00 288

/* ATU-E0 CMIE01 */
#define ATUE0_CMIE01 289

/* ATU-E0 CMIE02 */
#define ATUE0_CMIE02 290

/* ATU-E0 CMIE03 */
#define ATUE0_CMIE03 291

/* ATU-E1 CMIE10 */
#define ATUE1_CMIE10 292

/* ATU-E1 CMIE11 */
#define ATUE1_CMIE11 293

/* ATU-E1 CMIE12 */
#define ATUE1_CMIE12 294

/* ATU-E1 CMIE13 */
#define ATUE1_CMIE13 295

/* ATU-E2 CMIE20 */
#define ATUE2_CMIE20 296

/* ATU-E2 CMIE21 */
#define ATUE2_CMIE21 297

/* ATU-E2 CMIE22 */
#define ATUE2_CMIE22 298

/* ATU-E2 CMIE23 */
#define ATUE2_CMIE23 299

/* ATU-E3 CMIE30 */
#define ATUE3_CMIE30 300

/* ATU-E3 CMIE31 */
#define ATUE3_CMIE31 301

/* ATU-E3 CMIE32 */
#define ATUE3_CMIE32 302

/* ATU-E3 CMIE33 */
#define ATUE3_CMIE33 303

/* ATU-E4 CMIE40 */
#define ATUE4_CMIE40 304

/* ATU-E4 CMIE41 */
#define ATUE4_CMIE41 305

/* ATU-E4 CMIE42 */
#define ATUE4_CMIE42 306

/* ATU-E4 CMIE43 */
#define ATUE4_CMIE43 307

/* ATU-E5 CMIE50 */
#define ATUE5_CMIE50 308

/* ATU-E5 CMIE51 */
#define ATUE5_CMIE51 309

/* ATU-E5 CMIE52 */
#define ATUE5_CMIE52 310

/* ATU-E5 CMIE53 */
#define ATUE5_CMIE53 311

/* ATU-F ICIF0 */
#define ATUF_ICIF0 312

/* ATU-F ICIF1 */
#define ATUF_ICIF1 313

/* ATU-F ICIF2 */
#define ATUF_ICIF2 314

/* ATU-F ICIF3 */
#define ATUF_ICIF3 315

/* ATU-F ICIF4 */
#define ATUF_ICIF4 316

/* ATU-F ICIF5 */
#define ATUF_ICIF5 317

/* ATU-F ICIF6 */
#define ATUF_ICIF6 318

/* ATU-F ICIF7 */
#define ATUF_ICIF7 319

/* ATU-F ICIF8 */
#define ATUF_ICIF8 320

/* ATU-F ICIF9 */
#define ATUF_ICIF9 321

/* ATU-F ICIF10 */
#define ATUF_ICIF10 322

/* ATU-F ICIF11 */
#define ATUF_ICIF11 323

/* ATU-F ICIF12 */
#define ATUF_ICIF12 324

/* ATU-F ICIF13 */
#define ATUF_ICIF13 325

/* ATU-F ICIF14 */
#define ATUF_ICIF14 326

/* ATU-F ICIF15 */
#define ATUF_ICIF15 327

/* ATU-F ICIF16 */
#define ATUF_ICIF16 328

/* ATU-F ICIF17 */
#define ATUF_ICIF17 329

/* ATU-F ICIF18 */
#define ATUF_ICIF18 330

/* ATU-F ICIF19 */
#define ATUF_ICIF19 331

/* ATU-F OVIF0 */
#define ATUF_OVIF0 340

/* ATU-F OVIF1 */
#define ATUF_OVIF1 341

/* ATU-F OVIF2 */
#define ATUF_OVIF2 342

/* ATU-F OVIF3 */
#define ATUF_OVIF3 343

/* ATU-F OVIF4 */
#define ATUF_OVIF4 344

/* ATU-F OVIF5 */
#define ATUF_OVIF5 345

/* ATU-F OVIF6 */
#define ATUF_OVIF6 346

/* ATU-F OVIF7 */
#define ATUF_OVIF7 347

/* ATU-F OVIF8 */
#define ATUF_OVIF8 348

/* ATU-F OVIF9 */
#define ATUF_OVIF9 349

/* ATU-F OVIF10 */
#define ATUF_OVIF10 350

/* ATU-F OVIF11 */
#define ATUF_OVIF11 351

/* ATU-F OVIF12 */
#define ATUF_OVIF12 352

/* ATU-F OVIF13 */
#define ATUF_OVIF13 353

/* ATU-F OVIF14 */
#define ATUF_OVIF14 354

/* ATU-F OVIF15 */
#define ATUF_OVIF15 355

/* ATU-F OVIF16 */
#define ATUF_OVIF16 356

/* ATU-F OVIF17 */
#define ATUF_OVIF17 357

/* ATU-F OVIF18 */
#define ATUF_OVIF18 358

/* ATU-F OVIF19 */
#define ATUF_OVIF19 359

/* ATU-G CMIG0 */
#define ATUG_CMIG0 368

/* ATU-G CMIG1 */
#define ATUG_CMIG1 369

/* ATU-G CMIG2 */
#define ATUG_CMIG2 370

/* ATU-G CMIG3 */
#define ATUG_CMIG3 371

/* ATU-G CMIG4 */
#define ATUG_CMIG4 372

/* ATU-G CMIG5 */
#define ATUG_CMIG5 373

/* ATU-H CMIH */
#define ATUH_CMIH 376

/* ATU-J DFIJ0 */
#define ATUJ_DFIJ0 380

/* ATU-J DFIJ1 */
#define ATUJ_DFIJ1 381

/* ATU-J OVIJ0 */
#define ATUJ_OVIJ0 384

/* ATU-J OVIJ1 */
#define ATUJ_OVIJ1 385

/* ATU-J DOVIJ0 */
#define ATUJ_DOVIJ0 388

/* ATU-J DOVIJ1 */
#define ATUJ_DOVIJ1 389

/* ADC ADI0 */
#define ADC_ADI0 392

/* ADC ADI1 */
#define ADC_ADI1 396

/* ADC ADID0 */
#define ADC_ADID0 400

/* ADC ADID1 */
#define ADC_ADID1 401

/* ADC ADID2 */
#define ADC_ADID2 402

/* ADC ADID3 */
#define ADC_ADID3 403

/* ADC ADID4 */
#define ADC_ADID4 404

/* ADC ADID5 */
#define ADC_ADID5 405

/* ADC ADID6 */
#define ADC_ADID6 406

/* ADC ADID7 */
#define ADC_ADID7 407

/* ADC ADID8 */
#define ADC_ADID8 408

/* ADC ADID9 */
#define ADC_ADID9 409

/* ADC ADID10 */
#define ADC_ADID10 410

/* ADC ADID11 */
#define ADC_ADID11 411

/* ADC ADID12 */
#define ADC_ADID12 412

/* ADC ADID13 */
#define ADC_ADID13 413

/* ADC ADID14 */
#define ADC_ADID14 414

/* ADC ADID15 */
#define ADC_ADID15 415

/* ADC ADID40 */
#define ADC_ADID40 416

/* ADC ADID41 */
#define ADC_ADID41 417

/* ADC ADID42 */
#define ADC_ADID42 418

/* ADC ADID43 */
#define ADC_ADID43 419

/* ADC ADID44 */
#define ADC_ADID44 420

/* ADC ADID45 */
#define ADC_ADID45 421

/* ADC ADID46 */
#define ADC_ADID46 422

/* ADC ADID47 */
#define ADC_ADID47 423

/* SCIA ERIA */
#define SCIA_ERIA 424

/* SCIA RXIA */
#define SCIA_RXIA 425

/* SCIA TXIA */
#define SCIA_TXIA 426

/* SCIA TEIA */
#define SCIA_TEIA 427

/* SCIB ERIB */
#define SCIB_ERIB 428

/* SCIB RXIB */
#define SCIB_RXIB 429

/* SCIB TXIB */
#define SCIB_TXIB 430

/* SCIB TEIB */
#define SCIB_TEIB 431

/* SCIC ERIC */
#define SCIC_ERIC 432

/* SCIC RXIC */
#define SCIC_RXIC 433

/* SCIC TXIC */
#define SCIC_TXIC 434

/* SCIC TEIC */
#define SCIC_TEIC 435

/* SCID ERID */
#define SCID_ERID 436

/* SCID RXID */
#define SCID_RXID 437

/* SCID TXID */
#define SCID_TXID 438

/* SCID TEID */
#define SCID_TEID 439

/* SCIE ERIE */
#define SCIE_ERIE 440

/* SCIE RXIE */
#define SCIE_RXIE 441

/* SCIE TXIE */
#define SCIE_TXIE 442

/* SCIE TEIE */
#define SCIE_TEIE 443

/* RSPIA SPEIA */
#define RSPIA_SPEIA 444

/* RSPIA SPRIA */
#define RSPIA_SPRIA 445

/* RSPIA SPTIA */
#define RSPIA_SPTIA 446

/* RSPIB SPEIB */
#define RSPIB_SPEIB 448

/* RSPIB SPRIB */
#define RSPIB_SPRIB 449

/* RSPIB SPTIB */
#define RSPIB_SPTIB 450

/* RSPIC SPEIC */
#define RSPIC_SPEIC 452

/* RSPIC SPRIC */
#define RSPIC_SPRIC 453

/* RSPIC SPTIC */
#define RSPIC_SPTIC 454

/* RCANA ERSA */
#define RCANA_ERSA 456

/* RCANA OVRA */
#define RCANA_OVRA 457

/* RCANA RMA0 */
#define RCANA_RMA0 458

/* RCANA RMA1 */
#define RCANA_RMA1 459

/* RCANA SLEA */
#define RCANA_SLEA 460

/* RCANA MBEA */
#define RCANA_MBEA 461

/* RCANB ERSB */
#define RCANB_ERSB 464

/* RCANB OVRB */
#define RCANB_OVRB 465

/* RCANB RMB0 */
#define RCANB_RMB0 466

/* RCANB RMB1 */
#define RCANB_RMB1 467

/* RCANB SLEB */
#define RCANB_SLEB 468

/* RCANB MBEB */
#define RCANB_MBEB 469

/* RCANC ERSC */
#define RCANC_ERSC 472

/* RCANC OVRC */
#define RCANC_OVRC 473

/* RCANC RMC0 */
#define RCANC_RMC0 474

/* RCANC RMC1 */
#define RCANC_RMC1 475

/* RCANC SLEC */
#define RCANC_SLEC 476

/* RCANC MBEC */
#define RCANC_MBEC 477

/* ADMA TE74 */
#define ADMA_TE74 488

#endif  /* __IO7254R_H__ */

